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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drockchip-pinconf.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /omit-if-no-ref/
8 pcfg_pull_up: pcfg-pull-up {
9 bias-pull-up;
12 /omit-if-no-ref/
13 pcfg_pull_down: pcfg-pull-down {
14 bias-pull-down;
17 /omit-if-no-ref/
18 pcfg_pull_none: pcfg-pull-none {
19 bias-disable;
[all …]
H A Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
H A Drk3328.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3328-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3328-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
H A Drk3399.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
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H A Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/px30-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
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/openbmc/linux/drivers/soc/fsl/qbman/
H A Dqman_portal.c1 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
45 static void portal_set_cpu(struct qm_portal_config *pcfg, int cpu) in portal_set_cpu() argument
48 struct device *dev = pcfg->dev; in portal_set_cpu()
51 pcfg->iommu_domain = iommu_domain_alloc(&platform_bus_type); in portal_set_cpu()
52 if (!pcfg->iommu_domain) { in portal_set_cpu()
56 ret = fsl_pamu_configure_l1_stash(pcfg->iommu_domain, cpu); in portal_set_cpu()
62 ret = iommu_attach_device(pcfg->iommu_domain, dev); in portal_set_cpu()
71 qman_set_sdest(pcfg->channel, cpu); in portal_set_cpu()
77 iommu_domain_free(pcfg->iommu_domain); in portal_set_cpu()
78 pcfg->iommu_domain = NULL; in portal_set_cpu()
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H A Dbman_portal.c1 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
39 static struct bman_portal *init_pcfg(struct bm_portal_config *pcfg) in init_pcfg() argument
41 struct bman_portal *p = bman_create_affine_portal(pcfg); in init_pcfg()
44 dev_crit(pcfg->dev, "%s: Portal failure on cpu %d\n", in init_pcfg()
45 __func__, pcfg->cpu); in init_pcfg()
50 affine_bportals[pcfg->cpu] = p; in init_pcfg()
52 dev_info(pcfg->dev, "Portal initialised, cpu %d\n", pcfg->cpu); in init_pcfg()
60 const struct bm_portal_config *pcfg; in bman_offline_cpu() local
65 pcfg = bman_get_bm_portal_config(p); in bman_offline_cpu()
66 if (!pcfg) in bman_offline_cpu()
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H A Dqman_test_stash.c1 /* Copyright 2009 - 2016 Freescale Semiconductor, Inc.
33 #include <linux/dma-mapping.h>
44 * is to allow enough handlers/FQs to truly test the significance of caching -
45 * ie. when cache-expiries are occurring.)
50 * 32-bit "mixer", that is produced using a 32-bit LFSR. When a frame is
55 * expected path, this also provides some quasi-realistic overheads to each
56 * forwarding action - dereferencing *all* the frame data, computation, and
65 * handlers and link-list them (but do no other handler setup).
94 atomic_inc(&bstrap->started); in bstrap_fn()
95 err = bstrap->fn(); in bstrap_fn()
[all …]
/openbmc/linux/arch/mips/txx9/generic/
H A Dsetup_tx4938.c6 * 2003-2005 (c) MontaVista Software, Inc.
7 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
33 if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST) in tx4938_wdr_init()
51 (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) ? in tx4938_machine_restart()
56 while (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDRST)) in tx4938_machine_restart()
59 if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_WDREXEN) { in tx4938_machine_restart()
71 int data = regs->cp0_cause & 4; in tx4938_be_handler()
73 pr_err("%cBE exception at %#lx\n", data ? 'D' : 'I', regs->cp0_epc); in tx4938_be_handler()
75 (unsigned long long)____raw_readq(&tx4938_ccfgptr->ccfg), in tx4938_be_handler()
76 (unsigned long long)____raw_readq(&tx4938_ccfgptr->toea)); in tx4938_be_handler()
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H A Dsetup_tx4927.c6 * 2003-2005 (c) MontaVista Software, Inc.
7 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
31 if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST) in tx4927_wdr_init()
49 (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) ? in tx4927_machine_restart()
54 while (!(____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDRST)) in tx4927_machine_restart()
57 if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_WDREXEN) { in tx4927_machine_restart()
69 int data = regs->cp0_cause & 4; in tx4927_be_handler()
71 pr_err("%cBE exception at %#lx\n", data ? 'D' : 'I', regs->cp0_epc); in tx4927_be_handler()
73 (unsigned long long)____raw_readq(&tx4927_ccfgptr->ccfg), in tx4927_be_handler()
74 (unsigned long long)____raw_readq(&tx4927_ccfgptr->toea)); in tx4927_be_handler()
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/openbmc/linux/sound/soc/qcom/qdsp6/
H A Dq6afe.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
19 #include <sound/soc-dai.h>
22 #include "q6dsp-errno.h"
131 (AFE_PORT_ID_TDM_PORT_RANGE_START+0x50-1)
135 (AFE_PORT_ID_TDM_PORT_RANGE_END - \
385 /* Reserved for 32-bit alignment. This field must be set to 0.*/
429 * Supported values: - #AFE_SLIMBUS_DEVICE_1 - #AFE_SLIMBUS_DEVICE_2
454 * - #AFE_PORT_SAMPLE_RATE_8K
455 * - #AFE_PORT_SAMPLE_RATE_16K
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/openbmc/linux/drivers/soundwire/
H A Dqcom.c1 // SPDX-License-Identifier: GPL-2.0
101 #define SWRM_DP_PORT_CTRL_BANK(n, m) (0x1124 + 0x100 * (n - 1) + 0x40 * m)
102 #define SWRM_DP_PORT_CTRL_2_BANK(n, m) (0x1128 + 0x100 * (n - 1) + 0x40 * m)
103 #define SWRM_DP_BLOCK_CTRL_1(n) (0x112C + 0x100 * (n - 1))
104 #define SWRM_DP_BLOCK_CTRL2_BANK(n, m) (0x1130 + 0x100 * (n - 1) + 0x40 * m)
105 #define SWRM_DP_PORT_HCTRL_BANK(n, m) (0x1134 + 0x100 * (n - 1) + 0x40 * m)
106 #define SWRM_DP_BLOCK_CTRL3_BANK(n, m) (0x1138 + 0x100 * (n - 1) + 0x40 * m)
107 #define SWRM_DP_SAMPLECTRL2_BANK(n, m) (0x113C + 0x100 * (n - 1) + 0x40 * m)
108 #define SWRM_DIN_DPn_PCM_PORT_CTRL(n) (0x1054 + 0x100 * (n - 1))
204 /* Port numbers are 1 - 14 */
[all …]
/openbmc/linux/drivers/dma/
H A Dpl330.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <linux/dma-mapping.h>
46 CCTRL6, /* Cacheable write-through, allocate on writes only */
47 CCTRL7, /* Cacheable write-back, allocate on writes only */
245 * at 1byte/burst for P<->M and M<->M respectively.
247 * should be enough for P<->M and M<->M respectively.
314 struct pl330_config *pcfg; member
382 /* Index of the last submitted request or -1 if the DMA is stopped */
423 /* DMA-Engine Channel */
449 /* For D-to-M and M-to-D channels */
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/openbmc/u-boot/arch/arm/dts/
H A Drv1108.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/rv1108-cru.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
17 interrupt-parent = <&gic>;
27 #address-cells = <1>;
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H A Drk3328.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/rk3328-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
33 #address-cells = <2>;
[all …]
H A Drk3288-fennec.dtsi2 * This file is dual-licensed: you can use it either under the terms
49 ext_gmac: external-gmac-clock {
50 compatible = "fixed-clock";
51 #clock-cells = <0>;
52 clock-frequency = <125000000>;
53 clock-output-names = "ext_gmac";
56 vcc_sys: vsys-regulator {
57 compatible = "regulator-fixed";
58 regulator-name = "vcc_sys";
59 regulator-min-microvolt = <5000000>;
[all …]
H A Drk3399.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd.
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
H A Drk3288-miqi.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
14 ext_gmac: external-gmac-clock {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <125000000>;
18 clock-output-names = "ext_gmac";
21 io_domains: io-domains {
22 compatible = "rockchip,rk3288-io-voltage-domain";
25 audio-supply = <&vcca_33>;
26 flash0-supply = <&vcc_flash>;
[all …]
/openbmc/linux/arch/mips/pci/
H A Dpci-tx4938.c5 * Copyright 2001, 2003-2005 MontaVista Software Inc.
6 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
7 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
24 pr_info("PCIC --%s PCICLK:", in tx4938_report_pciclk()
25 (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ? in tx4938_report_pciclk()
27 if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) { in tx4938_report_pciclk()
28 u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_report_pciclk()
53 pciclk = -1; in tx4938_report_pciclk()
61 __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg); in tx4938_report_pci1clk()
65 pr_info("PCIC1 -- %sPCICLK:%u.%uMHz\n", in tx4938_report_pci1clk()
[all …]
H A Dpci-tx4927.c5 * Copyright 2001, 2003-2005 MontaVista Software Inc.
6 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
7 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
24 pr_info("PCIC --%s PCICLK:", in tx4927_report_pciclk()
25 (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ? in tx4927_report_pciclk()
27 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) { in tx4927_report_pciclk()
28 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg); in tx4927_report_pciclk()
45 pciclk = -1; in tx4927_report_pciclk()
58 if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) { in tx4927_pciclk66_setup()
60 u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg); in tx4927_pciclk66_setup()
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
H A Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc_flash";
[all …]
H A Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
/openbmc/linux/drivers/pci/switch/
H A Dswitchtec.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/io-64-nonatomic-lo-hi.h>
78 u32 device = ioread32(&stdev->mmio_sys_info->device_id); in is_firmware_running()
80 return stdev->pdev->device == device; in is_firmware_running()
89 return ERR_PTR(-ENOMEM); in stuser_create()
91 get_device(&stdev->dev); in stuser_create()
92 stuser->stdev = stdev; in stuser_create()
93 kref_init(&stuser->kref); in stuser_create()
94 INIT_LIST_HEAD(&stuser->list); in stuser_create()
95 init_waitqueue_head(&stuser->cmd_comp); in stuser_create()
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Drockchip,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
18 Please refer to pinctrl-bindings.txt in this directory for details of the
26 various pad settings such as pull-up, etc.
29 defined as gpio sub-nodes of the pinmux controller.
34 - rockchip,px30-pinctrl
35 - rockchip,rk2928-pinctrl
36 - rockchip,rk3036-pinctrl
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