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/openbmc/qemu/hw/intc/
H A Dopenpic.c28 * - Motorola MPC8245 & MPC8540 user manuals.
29 * - Motorola Harrier programmer manual
38 #include "hw/qdev-properties.h"
46 #include "qemu/error-report.h"
79 #define OPENPIC_CPU_REG_SIZE 0x100 + ((MAX_CPU - 1) * 0x1000)
97 #define VIR_MPIC2A 0x00004614 /* IBM MPIC-2A */
167 return -1; in get_current_cpu()
170 return current_cpu->cpu_index; in get_current_cpu()
182 * divide by 4 or 8. For now hard code to 25MZ.
197 set_bit(n_IRQ, q->queue); in IRQ_setbit()
[all …]
H A Dopenpic_kvm.c2 * KVM in-kernel OpenPIC
31 #include "hw/qdev-properties.h"
62 KVMOpenPICState *opp = opaque; in kvm_openpic_write() local
71 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr); in kvm_openpic_write()
80 KVMOpenPICState *opp = KVM_OPENPIC(d); in kvm_openpic_reset() local
83 kvm_openpic_write(opp, 0x1020, GCR_RESET, sizeof(uint32_t)); in kvm_openpic_reset()
88 KVMOpenPICState *opp = opaque; in kvm_openpic_read() local
97 ret = ioctl(opp->fd, KVM_GET_DEVICE_ATTR, &attr); in kvm_openpic_read()
112 .min_access_size = 4,
113 .max_access_size = 4,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/opp/
H A Dti,omap-opp-supply.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/ti,omap-opp-supply.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments OMAP compatible OPP supply
11 registers, which contain OPP-specific voltage information tailored
14 the primary regulator during an OPP transition.
16 Also, some supplies may have an associated vbb-supply, an Adaptive
18 w.r.t the vdd-supply and clk when making an OPP transition. By
19 supplying two regulators to the device that will undergo OPP
[all …]
H A Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. NVMEM OPP
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
17 the CPU frequencies subset and voltage value of each OPP varies based on
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
23 the OPP framework with required information (existing HW bitmap).
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Duniphier-pro5.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
9 compatible = "socionext,uniphier-pro5";
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 enable-method = "psci";
23 next-level-cache = <&l2>;
[all …]
H A Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
15 compatible = "socionext,uniphier-ld20";
16 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&gic>;
21 #address-cells = <2>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
H A Dsm7225.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
19 opp-1804800000 {
20 opp-hz = /bits/ 64 <1804800000>;
21 opp-peak-kBps = <(1804000 * 4 * 2 * 2) (1459200 * 16 * 2)>;
26 opp-2131200000 {
27 opp-hz = /bits/ 64 <2131200000>;
28 opp-peak-kBps = <(2092000 * 4 * 2 * 2) (1459200 * 16 * 2)>;
31 opp-2208000000 {
32 opp-hz = /bits/ 64 <2208000000>;
33 opp-peak-kBps = <(2092000 * 4 * 2 * 2) (1459200 * 16 * 2)>;
H A Dsa8540p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ &cpu0_opp_table;
10 /delete-node/ &cpu4_opp_table;
13 cpu0_opp_table: opp-table-cpu0 {
14 compatible = "operating-points-v2";
15 opp-shared;
17 opp-300000000 {
18 opp-hz = /bits/ 64 <300000000>;
19 opp-peak-kBps = <(300000 * 32)>;
21 opp-403200000 {
[all …]
H A Dmsm8996-v3.0.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 qcom,msm-id = <246 0x30000>;
22 gpu_opp_table_3_0: opp-table-gpu30 {
23 compatible = "operating-points-v2";
25 opp-624000000 {
26 opp-hz = /bits/ 64 <624000000>;
27 opp-level = <7>;
30 opp-560000000 {
31 opp-hz = /bits/ 64 <560000000>;
32 opp-level = <6>;
[all …]
H A Dsm8250.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
12 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/gpio/gpio.h>
[all …]
H A Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
H A Dmsm8996.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/interconnect/qcom,msm8996.h>
11 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa27x.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "dt-bindings/clock/pxa-clock.h"
11 pdma: dma-controller@40000000 {
12 compatible = "marvell,pdma-1.0";
15 #dma-cells = <2>;
17 #dma-channels = <32>;
18 dma-channels = <32>;
19 #dma-requests = <75>;
20 dma-requests = <75>;
24 pxairq: interrupt-controller@40d00000 {
[all …]
/openbmc/linux/arch/powerpc/kvm/
H A Dmpic.c40 #define MAX_TMR 4
41 #define MAX_IPI 4
63 #define OPENPIC_CPU_REG_SIZE (0x100 + ((MAX_CPU - 1) * 0x1000))
116 struct kvm_vcpu *vcpu = current->thread.kvm_vcpu; in get_current_cpu()
117 return vcpu ? vcpu->arch.irq_cpu_id : -1; in get_current_cpu()
120 return -1; in get_current_cpu()
128 static inline void write_IRQreg_idr(struct openpic *opp, int n_IRQ,
133 IRQ_TYPE_FSLINT, /* FSL internal interrupt -- level only */
154 bool level:1; /* level-triggered */
171 #define IVPR_VECTOR(opp, _ivprr_) ((_ivprr_) & (opp)->vector_mask) argument
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_opp.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
34 (opp110->regs->reg)
38 opp110->opp_shift->field_name, opp110->opp_mask->field_name
41 opp110->base.ctx
115 if (params->pixel_encoding == PIXEL_ENCODING_YCBCR422) { in set_truncation()
117 if (params->flags.TRUNCATE_DEPTH == 1) in set_truncation()
122 else if (params->flags.TRUNCATE_DEPTH == 2) in set_truncation()
130 /* on other format-to do */ in set_truncation()
131 if (params->flags.TRUNCATE_ENABLED == 0) in set_truncation()
137 params->flags.TRUNCATE_DEPTH, in set_truncation()
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam33xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
[all …]
H A Dexynos4x12.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
[all …]
H A Dexynos5422-odroid-core.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source
6 * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd.
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
14 #include "exynos5422-cpus.dtsi"
27 stdout-path = "serial2:115200n8";
31 compatible = "samsung,secure-firmware";
35 fixed-rate-clocks {
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dclock_am33xx.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/
62 CONFIG_SYS_MPUCLK, OSC-1, 1, -1, -1, -1, -1};
64 1000, OSC-1, -1, -1, 10, 8, 4};
68 {125, 3, 2, -1, -1, -1, -1}, /* OPP 50 */
69 {-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */
70 {125, 3, 1, -1, -1, -1, -1}, /* OPP 100 */
71 {150, 3, 1, -1, -1, -1, -1}, /* OPP 120 */
72 {125, 2, 1, -1, -1, -1, -1}, /* OPP TB */
73 {625, 11, 1, -1, -1, -1, -1} /* OPP NT */
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_opp.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
31 (oppn10->regs->reg)
35 oppn10->opp_shift->field_name, oppn10->opp_mask->field_name
38 oppn10->base.ctx
54 FMT_TRUNCATE_EN, params->flags.TRUNCATE_ENABLED, in opp1_set_truncation()
55 FMT_TRUNCATE_DEPTH, params->flags.TRUNCATE_DEPTH, in opp1_set_truncation()
56 FMT_TRUNCATE_MODE, params->flags.TRUNCATE_MODE); in opp1_set_truncation()
75 if (params->flags.FRAME_RANDOM == 1) { in opp1_set_spatial_dither()
76 if (params->flags.SPATIAL_DITHER_DEPTH == 0 || params->flags.SPATIAL_DITHER_DEPTH == 1) { in opp1_set_spatial_dither()
80 } else if (params->flags.SPATIAL_DITHER_DEPTH == 2) { in opp1_set_spatial_dither()
[all …]
/openbmc/linux/arch/arm64/boot/dts/apple/
H A Dt8112.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8112", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <2>;
[all …]
/openbmc/linux/Documentation/translations/zh_CN/power/
H A Dopp.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/power/opp.rst
11 操作性能值（OPP）库
14 (C) 2009-2010 Nishanth Menon <nm@ti.com>, 德州仪器公司
21 4. OPP可用性控制函数
28 1.1 何为操作性能值（OPP）？
29 ------------------------------
46 - {300000000, 1000000}
47 - {800000000, 1200000}
[all …]
/openbmc/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "socionext,uniphier-ld20";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
[all …]

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