/openbmc/linux/Documentation/devicetree/bindings/timer/ |
H A D | renesas,mtu2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas Multi-Function Timer Pulse Unit 2 (MTU2) 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 14 The MTU2 is a multi-purpose, multi-channel timer/counter with configurable clock inputs 23 - enum: 24 - renesas,mtu2-r7s72100 # RZ/A1H 25 - const: renesas,mtu2 [all …]
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/openbmc/docs/designs/ |
H A D | target-fail-monitoring.md | 14 [openbmc-systemd.md][1] has a good summary of systemd and the basics of how it 22 cases, the unit which caused the failure will log an error to phosphor-logging 29 critical, but something like fan-control or a power monitoring service, could be 37 See the [phosphor-state-manager][2] repository for background information on 48 phosphor-state-manager code already monitors for these signals but only looks 53 an appropriate error to phosphor-logging. 63 - Must be able to monitor any arbitrary systemd target and log a defined error 65 - Must be configurable 66 - Target: Choose any systemd target 67 - Status: Choose one or more status's to monitor for [all …]
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H A D | bmc-reset-with-host-up.md | 18 A good portion of this is explained in the phosphor-state-manager [README][1]. 28 - /run/openbmc/chassis@0-on 29 - /run/openbmc/host@0-on 31 It should be noted that although full support is not in place for multi-chassis 32 and multi-host systems, the framework is there to build on. 33 `op-reset-chassis-running@.service` is a templated service, checking pgood in 35 /run/openbmc/chassis@%i-on, to indicate power is on for that instance. Similar 36 implementation is done for the host via `phosphor-reset-host-check@.service` and 37 the file /run/openbmc/host@%i-on. 39 If chassis power is on and the host is up, then `obmc-chassis-poweron@.target` [all …]
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/openbmc/linux/arch/sh/mm/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 9 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to 12 On other systems (such as the SH-3 and 4) where an MMU exists, 64 configurable. 77 bool "Support 32-bit physical addressing through PMB" 83 32-bits through the SH-4A PMB. If this is not set, legacy 84 29-bit physical addressing will be used. 104 bool "Non-Uniform Memory Access (NUMA) Support" 163 This enables 8kB pages as supported by SH-X2 and later MMUs. 169 This enables 16kB pages on MMU-less SH systems. [all …]
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/openbmc/linux/net/sched/ |
H A D | sch_hhf.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* net/sched/sch_hhf.c Heavy-Hitter Filter (HHF) 16 /* Heavy-Hitter Filter (HHF) 19 * Flows are classified into two buckets: non-heavy-hitter and heavy-hitter 20 * buckets. Initially, a new flow starts as non-heavy-hitter. Once classified 21 * as heavy-hitter, it is immediately switched to the heavy-hitter bucket. 23 * in which the heavy-hitter bucket is served with less weight. 24 * In other words, non-heavy-hitters (e.g., short bursts of critical traffic) 25 * are isolated from heavy-hitters (e.g., persistent bulk traffic) and also have 28 * To capture heavy-hitters, we use the "multi-stage filter" algorithm in the [all …]
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H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 25 To administer these schedulers, you'll need the user-level utilities 54 in-depth articles. 72 tristate "Multi Band Priority Queueing (PRIO)" 74 Say Y here if you want to use an n-band priority queue packet 81 tristate "Hardware Multiqueue-aware Multi Band Queuing (MULTIQ)" 83 Say Y here if you want to use an n-band queue packet scheduler 199 re-ordering. This is often useful to simulate networks when 219 tristate "Multi-queue priority scheduler (MQPRIO)" 222 Say Y here if you want to use the Multi-queue Priority scheduler. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/soc/ti/ |
H A D | keystone-navigator-qmss.txt | 5 multi-core Navigator. QMSS consist of queue managers, packed-data structure 9 management of the packet queues. Packets are queued/de-queued by writing or 13 descriptor RAM. Descriptor RAM is configurable as internal or external memory. 20 - compatible : Must be "ti,keystone-navigator-qmss". 21 : Must be "ti,66ak2g-navss-qm" for QMSS on K2G SoC. 22 - clocks : phandle to the reference clock for this device. 23 - queue-range : <start number> total range of queue numbers for the device. 24 - linkram0 : <address size> for internal link ram, where size is the total 26 - linkram1 : <address size> for external link ram, where size is the total 29 - qmgrs : child node describing the individual queue managers on the [all …]
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/openbmc/linux/Documentation/admin-guide/perf/ |
H A D | arm-cmn.rst | 5 CMN-600 is a configurable mesh interconnect consisting of a rectangular 17 ---------- 20 see /sys/bus/event_source/devices/arm_cmn_0. Multi-chip systems may link 21 more than one CMN together via external CCIX links - in this situation, 26 definitions - "type" selects the respective node type, and "eventid" the 30 * Since RN-D nodes do not have any distinct events from RN-I nodes, they 48 ----------- 61 REQ or SNP channel, it can be specified as two events - one for each 62 group - with the same nonzero "combine" value. The count for such a
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/openbmc/linux/Documentation/block/ |
H A D | null_blk.rst | 1 .. SPDX-License-Identifier: GPL-2.0 11 block-layer implementations. It emulates a block device of X gigabytes in size. 15 Multi-queue block-layer 17 - Request-based. 18 - Configurable submission queues per device. 20 No block-layer (Known as bio-based) 22 - Bio-based. IO requests are submitted directly to the device driver. 23 - Directly accepts bio data structure and returns them. 30 queue_mode=[0-2]: Default: 2-Multi-queue 31 Selects which block-layer the module should instantiate with. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/ |
H A D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/trivial-devices.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 27 spi-max-frequency: true 31 - enum: 33 - acbel,fsg032 34 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin 35 - ad,ad7414 [all …]
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/openbmc/linux/Documentation/arch/arm/keystone/ |
H A D | knav-qmss.rst | 11 multi-core Navigator. QMSS consist of queue managers, packed-data structure 15 management of the packet queues. Packets are queued/de-queued by writing or 19 descriptor RAM. Descriptor RAM is configurable as internal or external memory. 29 Documentation/devicetree/bindings/soc/ti/keystone-navigator-qmss.txt 40 git://git.ti.com/keystone-rtos/qmss-lld.git 43 channels. This firmware is available under ti-keystone folder of 46 git://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git
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/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/ |
H A D | MemoryChunks.v1_6_2.json | 4 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json", 5 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or… 12 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": { 28 "description": "The available OEM-specific actions for this resource.", 29 …"longDescription": "This property shall contain the available OEM-specific actions for this resour… 53 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": { 68 "$ref": "http://redfish.dmtf.org/schemas/v1/odata-v4.json#/definitions/idRef", 74 "description": "Level of the interleave set for multi-level tiered memory.", 75 …tion": "This property shall contain the level of this interleave set for multi-level tiered memory… 117 …"longDescription": "This Redfish Specification-described type shall contain links to resources tha… [all …]
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/openbmc/linux/Documentation/devicetree/bindings/iommu/ |
H A D | iommu.txt | 13 Example: 32-bit DMA to 64-bit physical addresses 15 * Implement scatter-gather at page level granularity so that the device does 29 IOMMUs can be single-master or multiple-master. Single-master IOMMU devices 30 typically have a fixed association to the master device, whereas multiple- 34 "dma-ranges" property that describes how the physical address space of the 35 IOMMU maps to memory. An empty "dma-ranges" property means that there is a 39 -------------------- 40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an 44 the specific IOMMU. Below are a few examples of typical use-cases: 46 - #iommu-cells = <0>: Single master IOMMU devices are not configurable and [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | ti,tps6594.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Julien Panis <jpanis@baylibre.com> 15 PFSM (Pre-configurable Finite State Machine) managing the state of the device. 16 TPS6594 is the super-set device while TPS6593 and LP8764 are derivatives. 21 - ti,lp8764-q1 22 - ti,tps6593-q1 23 - ti,tps6594-q1 29 ti,primary-pmic: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/regulator/ |
H A D | richtek,rtq2208.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alina Yu <alina_yu@richtek.com> 14 multi-configurable synchronous buck converters and two LDOs. 16 Bucks support "regulator-allowed-modes" and "regulator-mode". The former defines the permitted 25 0 - Auto mode for power saving, which reducing the switching frequency at light load condition 27 …1 - FCCM to meet the strict voltage regulation accuracy, which keeping constant switching frequenc… 35 - richtek,rtq2208 43 richtek,mtp-sel-high: [all …]
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/openbmc/entity-manager/ |
H A D | CONFIG_FORMAT.md | 12 - Configuration files will get replicated and built to support hundreds of 18 - Reactor writers tend to be domain experts on their subsystem, and 28 - Hardware constraints, bugs, and oddities are generally found over time. The 33 - Having separate config files reduces the number of platforms that need to 37 - Having one config file per piece of hardware makes it much easier and clear 39 - Note: This is a "guideline" not a "rule". There are many cases of hardware 42 - Example: SAS modules and cards made by the same company, on the same 44 - Non-Example: Power supplies. While all pmbus power supplies appear 49 3. Configuration files are not a long-ter [all...] |
/openbmc/linux/drivers/regulator/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 38 managed regulators and simple non-configurable regulators. 65 They provide two I2C-controlled DC/DC step-down converters with 85 tristate "Active-semi act8865 voltage regulator" 90 This driver controls a active-semi act8865 voltage output 94 tristate "Active-semi ACT8945A voltage regulator" 97 This driver controls a active-semi ACT8945A voltage regulator 98 via I2C bus. The ACT8945A features three step-down DC/DC converters 99 and four low-dropout linear regulators, along with a ActivePath 110 tristate "Freescale i.MX on-chip ANATOP LDO regulators" [all …]
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/openbmc/linux/sound/soc/tegra/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 tristate "SoC Audio for the Tegra System-on-Chip" 82 Config to enable the Inter-IC Sound (I2S) Controller which 83 implements full-duplex and bidirectional and single direction 84 point-to-point serial interfaces. It can interface with I2S 92 Parametric Equalizer (PEQ) and Multi Band Dynamic Range Compressor 113 converts the multi-bit Pulse Code Modulation (PCM) audio input to 114 oversampled 1-bit Pulse Density Modulation (PDM) output. From the 116 that up-samples the input to the desired sampling rate by 118 the desired 1-bit output via Delta Sigma Modulation (DSM). [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | renesas,rza1-ports.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo+renesas@jmondi.org> 11 - Geert Uytterhoeven <geert+renesas@glider.be> 16 Pin multiplexing and GPIO configuration is performed on a per-pin basis 17 writing configuration values to per-port register sets. 18 Each "port" features up to 16 pins, each of them configurable for GPIO 25 - const: renesas,r7s72100-ports # RZ/A1H [all …]
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/openbmc/linux/include/acpi/platform/ |
H A D | acenv.h | 1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 4 * Name: acenv.h - Host and compiler configuration 6 * Copyright (C) 2000 - 2023, Intel Corp. 15 * to the local environment. This includes compiler-specific, OS-specific, 16 * and machine-specific configuration. 205 * EFI applications can be built with -nostdlib, in this case, it must be 230 /* 64-bit data types */ 255 /* Flush CPU cache - used when going to sleep. Wbinvd or similar. */ 261 /* "inline" keywords - configurable since inline is not standardized */ 273 * Configurable calling conventions: [all …]
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/openbmc/linux/drivers/clk/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 98 multi-function device has one fixed-rate oscillator, clocked 129 be pre-programmed to support other configurations and features not yet 178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 196 For example, the CDCE925 contains two PLLs with spread-spectrum 206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 277 clock. These multi-function devices have two (S2MPS14) or three 278 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. [all …]
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/openbmc/linux/Documentation/gpu/ |
H A D | vkms.rst | 7 .. kernel-doc:: drivers/gpu/drm/vkms/vkms_drv.c 52 sudo modprobe -r vkms 60 `here <https://gitlab.freedesktop.org/drm/igt-gpu-tools>`_ . 65 sudo systemctl isolate multi-user.target 71 Once you are in text only mode, you can run tests using the --device switch 73 to test. IGT_DEVICE can also be used with the run-test.sh script to run the 76 sudo ./build/tests/<name of test> --device "sys:/sys/devices/platform/vkms" 78 sudo IGT_DEVICE="sys:/sys/devices/platform/vkms" ./scripts/run-tests.sh -t <name of test> 83 sudo ./build/tests/kms_writeback --device "sys:/sys/devices/platform/vkms" 85 sudo IGT_DEVICE="sys:/sys/devices/platform/vkms" ./scripts/run-tests.sh -t kms_writeback [all …]
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/openbmc/linux/tools/testing/selftests/bpf/benchs/ |
H A D | bench_local_storage_rcu_tasks_trace.c | 1 // SPDX-License-Identifier: GPL-2.0 72 fprintf(stderr, "benchmark doesn't support multi-producer!\n"); in validate() 94 return -1; in kthread_pid_ticks() 169 if (!bpf_program__attach(ctx.skel->progs.get_local)) { in local_storage_tasks_trace_setup() 174 if (!bpf_program__attach(ctx.skel->progs.pregp_step)) { in local_storage_tasks_trace_setup() 179 if (!bpf_program__attach(ctx.skel->progs.postgp)) { in local_storage_tasks_trace_setup() 193 res->gp_ct = atomic_swap(&ctx.skel->bss->gp_hits, 0); in measure() 194 res->gp_ns = atomic_swap(&ctx.skel->bss->gp_times, 0); in measure() 196 res->stime = ticks - ctx.prev_kthread_stime; in measure() 209 if (ctx.skel->bss->unexpected) { in report_progress() [all …]
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/openbmc/linux/arch/arc/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) 88 source "arch/arc/plat-tb10x/Kconfig" 89 source "arch/arc/plat-axs10x/Kconfig" 90 source "arch/arc/plat-hsdk/Kconfig" 108 ISA for the Next Generation ARC-HS cores 126 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) 128 -Caches: New Prog Model, Region Flush 129 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr 132 bool "ARC-HS" [all …]
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/openbmc/linux/Documentation/driver-api/ |
H A D | interconnect.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 ------------ 16 The interconnect bus is hardware with configurable parameters, which can be 20 on an SoC that can be multi-tiered. 22 Below is a simplified diagram of a real-world SoC interconnect bus topology. 26 +----------------+ +----------------+ 27 | HW Accelerator |--->| M NoC |<---------------+ 28 +----------------+ +----------------+ | 29 | | +------------+ 30 +-----+ +-------------+ V +------+ | | [all …]
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