/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | mediatek,spi-mtk-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bayi Cheng <bayi.cheng@mediatek.com> 11 - Chuanhong Guo <gch981213@gmail.com> 14 This spi controller support single, dual, or quad mode transfer for 15 SPI NOR flash. There should be only one spi slave device following 16 generic spi bindings. It's not recommended to use this controller 17 for devices other than SPI NOR flash due to limited transfer [all …]
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H A D | mediatek,spi-mt65xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: SPI Bus controller for MediaTek ARM SoCs 10 - Leilk Liu <leilk.liu@mediatek.com> 13 - $ref: /schemas/spi/spi-controller.yaml# 18 - items: 19 - enum: 20 - mediatek,mt7629-spi [all …]
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> 14 #include <dt-bindings/gce/mt8173-gce.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | mt8173-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include "mt8173.dtsi" 12 model = "MediaTek MT8173 evaluation board"; 13 chassis-type = "embedded"; 14 compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; 31 compatible = "hdmi-connector"; 37 remote-endpoint = <&hdmi0_out>; 43 compatible = "linux,extcon-usb-gpio"; [all …]
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H A D | mt6795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/mediatek,mt6795-clk.h> 10 #include <dt-bindings/gce/mediatek,mt6795-gce.h> 11 #include <dt-bindings/memory/mt6795-larb-port.h> 12 #include <dt-bindings/pinctrl/mt6795-pinfunc.h> 13 #include <dt-bindings/power/mt6795-power.h> 14 #include <dt-bindings/reset/mediatek,mt6795-resets.h> 18 interrupt-parent = <&sysirq>; [all …]
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H A D | mt8173-elm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include "mt8173.dtsi" 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_fixed_reg>; 28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; 30 pinctrl-names = "default"; [all …]
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H A D | mt8516.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt8516-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/phy/phy.h> 13 #include "mt8516-pinfunc.h" 17 interrupt-parent = <&sysirq>; 18 #address-cells = <2>; 19 #size-cells = <2>; 21 cluster0_opp: opp-table-0 { [all …]
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H A D | mt8186.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com> 6 /dts-v1/; 7 #include <dt-bindings/clock/mt8186-clk.h> 8 #include <dt-bindings/gce/mt8186-gce.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/memory/mt8186-memory-port.h> 12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h> 13 #include <dt-bindings/power/mt8186-power.h> [all …]
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H A D | mt7622.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mt7622-clk.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt7622-power.h> 14 #include <dt-bindings/reset/mt7622-reset.h> 15 #include <dt-bindings/thermal/thermal.h> 19 interrupt-parent = <&sysirq>; 20 #address-cells = <2>; [all …]
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H A D | mt8183.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt8183-clk.h> 9 #include <dt-bindings/gce/mt8183-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8183-larb-port.h> 13 #include <dt-bindings/power/mt8183-power.h> 14 #include <dt-bindings/reset/mt8183-resets.h> 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | mt8195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8195-clk.h> 9 #include <dt-bindings/gce/mt8195-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8195-memory-port.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 15 #include <dt-bindings/power/mt8195-power.h> [all …]
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H A D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8192-larb-port.h> 13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> 14 #include <dt-bindings/phy/phy.h> 15 #include <dt-bindings/power/mt8192-power.h> [all …]
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | mediatek,sysirq.txt | 3 MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI 7 - compatible: should be 8 "mediatek,mt8516-sysirq", "mediatek,mt6577-sysirq": for MT8516 9 "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183 10 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173 11 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135 12 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127 13 "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622 14 "mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq": for MT7623 15 "mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629 [all …]
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/openbmc/linux/Documentation/devicetree/bindings/soc/mediatek/ |
H A D | mediatek,pwrap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Flora Fu <flora.fu@mediatek.com> 11 - Alexandre Mergnat <amergnat@baylibre.com> 14 On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface 17 optionally be encrypted. Also a non standard Dual IO SPI mode can be 23 The signals of these pins are routed over the SPI bus using the pwrap 31 - items: 32 - enum: [all …]
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/openbmc/linux/arch/mips/boot/dts/ralink/ |
H A D | mt7621.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 #include <dt-bindings/interrupt-controller/mips-gic.h> 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/clock/mt7621-clk.h> 5 #include <dt-bindings/reset/mt7621-reset.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 10 compatible = "mediatek,mt7621-soc"; 13 #address-cells = <1>; 14 #size-cells = <0>; [all …]
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/openbmc/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt7623.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2017-2018 MediaTek Inc. 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/clock/mt2701-clk.h> 13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h> 14 #include <dt-bindings/power/mt2701-power.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/phy/phy.h> 17 #include <dt-bindings/reset/mt2701-resets.h> [all …]
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H A D | mt7629.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/mt7629-clk.h> 11 #include <dt-bindings/power/mt7622-power.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/reset/mt7629-resets.h> 18 interrupt-parent = <&sysirq>; 19 #address-cells = <1>; [all …]
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H A D | mt2701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt2701-clk.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/mt2701-power.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/memory/mt2701-larb-port.h> 14 #include <dt-bindings/reset/mt2701-resets.h> 15 #include "mt2701-pinfunc.h" 18 #address-cells = <2>; [all …]
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/openbmc/linux/drivers/spi/ |
H A D | spi-mtk-nor.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // Mediatek SPI NOR controller driver 10 #include <linux/dma-mapping.h> 19 #include <linux/spi/spi.h> 20 #include <linux/spi/spi-mem.h> 23 #define DRIVER_NAME "mtk-spi-nor" 91 // Reading DMA src/dst addresses have to be 16-byte aligned 93 #define MTK_NOR_DMA_ALIGN_MASK (MTK_NOR_DMA_ALIGN - 1) 97 // Buffered page program can do one 128-byte transfer 100 #define CLK_TO_US(sp, clkcnt) DIV_ROUND_UP(clkcnt, sp->spi_freq / 1000000) [all …]
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H A D | spi-mt65xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 17 #include <linux/platform_data/spi-mt65xx.h> 19 #include <linux/spi/spi.h> 20 #include <linux/spi/spi-mem.h> 21 #include <linux/dma-mapping.h> 114 * struct mtk_spi_compatible - device data structure 115 * @need_pad_sel: Enable pad (pins) selection in SPI controller 119 * @no_need_unprepare: Don't unprepare the SPI clk during runtime 132 * struct mtk_spi - SPI driver instance 133 * @base: Start address of the SPI controller registers [all …]
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/openbmc/linux/drivers/soc/mediatek/ |
H A D | mtk-pmic-wrap.c | 1 // SPDX-License-Identifier: GPL-2.0-only 438 /* MT8173 only regs */ 1346 * struct pwrap_slv_type - PMIC device wrapper definitions 1395 return readl(wrp->base + wrp->master->regs[reg]); in pwrap_readl() 1400 writel(val, wrp->base + wrp->master->regs[reg]); in pwrap_writel() 1408 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) in pwrap_get_fsm_state() 1464 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) in pwrap_read16() 1475 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) in pwrap_read16() 1520 return wrp->slave->regops->pwrap_read(wrp, adr, rdata); in pwrap_read() 1535 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) { in pwrap_write16() [all …]
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/openbmc/linux/ |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
/openbmc/ |
D | opengrok1.0.log | 1 2025-01-31 03:00:42.685-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-01-31 03:00:42.799-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |