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/openbmc/u-boot/Documentation/devicetree/bindings/timer/
H A Dfsl,mpc83xx-timer.txt1 MPC83xx timer devices
3 MPC83xx SoCs offer a decrementer interrupt that can be used to implement delay
7 - compatible: must be "fsl,mpc83xx-timer"
9 provided by one of the "fsl,mpc83xx-clk" devices
19 compatible = "fsl,mpc83xx-timer";
/openbmc/u-boot/Documentation/devicetree/bindings/cpu/
H A Dfsl,mpc83xx.txt1 MPC83xx CPU devices
3 MPC83xx SoCs contain a e300 core as their main processor.
6 - compatible: must be one of "fsl,mpc83xx",
17 "fsl,mpc83xx-clk" device
/openbmc/u-boot/Documentation/devicetree/bindings/misc/
H A Dfsl,mpc83xx-serdes.txt1 MPC83xx SerDes controller devices
3 MPC83xx SoCs contain a built-in SerDes controller that determines which
8 - compatible: must be "fsl,mpc83xx-serdes"
20 compatible = "fsl,mpc83xx-serdes";
/openbmc/u-boot/drivers/clk/
H A Dmpc83xx_clk.h174 * @soc_type: The type of MPC83xx SoC for which the clock description should be
179 * Since some clock rate are stored in different places on different MPC83xx
271 * @im: Pointer to the MPC83xx main register map in question
284 * @im: Pointer to the MPC83xx main register map in question
297 * @im: Pointer to the MPC83xx main register map in question
310 * @im: Pointer to the MPC83xx main register map in question
324 * @im: Pointer to the MPC83xx main register map in question
338 * @im: Pointer to the MPC83xx main register map in question
353 * @im: Pointer to the MPC83xx main register map in question
368 * @im: Pointer to the MPC83xx main register map in question
H A DKconfig121 bool "Enable MPC83xx clock driver"
124 Support for the clock driver of the MPC83xx series of SoCs.
/openbmc/u-boot/arch/powerpc/
H A DKconfig11 config MPC83xx config in PowerPC architecture""choice8861fd740104
12 bool "MPC83xx"
42 source "arch/powerpc/cpu/mpc83xx/Kconfig"
/openbmc/u-boot/drivers/cpu/
H A Dmpc83xx_cpu.c16 * struct mpc83xx_cpu_priv - Private data for MPC83xx CPUs
17 * @e300_type: The e300 core type of the MPC83xx CPU
18 * @family: The MPC83xx family the CPU belongs to
19 * @type: The MPC83xx type of the CPU
57 * determine_type() - Determine CPU family of MPC83xx device
92 * determine_type() - Determine CPU type of MPC83xx device
166 * determine_e300_type() - Determine e300 core type of MPC83xx device
329 { .compatible = "fsl,mpc83xx", },
H A Dmpc83xx_cpu.h36 * enum mpc83xx_cpu_family - Identifiers for MPC83xx CPU families
43 * @FAMILY_UNKNOWN: Identifier for an unknown MPC83xx CPU family
56 * enum mpc83xx_cpu_type - Identifiers for MPC83xx CPU types
79 * @TYPE_UNKNOWN: Identifier for an unknown MPC83xx CPU type
H A DKconfig11 bool "Enable MPC83xx CPU driver"
15 Support CPU cores for SoCs of the MPC83xx series.
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A DKconfig1 menu "mpc83xx CPU"
2 depends on MPC83xx
5 default "mpc83xx"
H A Dcpu.c7 * CPU specific code for the MPC83xx family.
15 #include <mpc83xx.h>
/openbmc/u-boot/Documentation/devicetree/bindings/clk/
H A Dfsl,mpc83xx-clk.txt1 MPC83xx system clock devices
3 MPC83xx SoCs supply a variety of clocks to drive various components of a
/openbmc/u-boot/drivers/sysreset/
H A DKconfig68 bool "Enable support MPC83xx SoC family reboot driver"
70 Reboot support for NXP MPC83xx SoCs.
/openbmc/u-boot/drivers/ram/
H A DKconfig38 bool "Enable MPC83XX SDRAM support"
41 Enable support for the internal DDR Memory Controller of the MPC83xx
/openbmc/u-boot/drivers/misc/
H A Dmpc83xx_serdes.c6 * base on the MPC83xx serdes initialization, which is
20 * struct mpc83xx_serdes_priv - Private structure for MPC83xx serdes
175 { .compatible = "fsl,mpc83xx-serdes" },
/openbmc/u-boot/doc/
H A DREADME.mpc83xxads1 Freescale MPC83xx ADS Boards
51 CONFIG_MPC83xx MPC83xx family
/openbmc/u-boot/board/freescale/mpc832xemds/
H A Dpci.c7 * PCI Configuration space access support for MPC83xx PCI Bridge
12 #include <mpc83xx.h>
/openbmc/linux/arch/powerpc/platforms/83xx/
H A Dmisc.c3 * misc setup functions for MPC83xx
22 #include "mpc83xx.h"
H A Dkm83xx.c37 #include "mpc83xx.h"
179 .name = "mpc83xx-km-platform", in define_machine()
/openbmc/u-boot/Documentation/devicetree/bindings/ram/
H A Dfsl,mpc83xx-mem-controller.txt1 MPC83xx RAM controller
13 - compatible: Must be "fsl,mpc83xx-mem-controller"
249 compatible = "fsl,mpc83xx-mem-controller";
/openbmc/u-boot/drivers/timer/
H A DKconfig107 bool "MPC83xx timer support"
111 devices based on the MPC83xx family of SoCs.
/openbmc/u-boot/post/cpu/mpc83xx/
H A Decc.c7 * The code is based on the cpu/mpc83xx/ecc.c written by
12 #include <mpc83xx.h>
/openbmc/u-boot/drivers/gpio/
H A Dmpc83xx_gpio.c3 * Freescale MPC83xx GPIO handling.
7 #include <mpc83xx.h>
/openbmc/u-boot/post/
H A DMakefile11 obj-$(CONFIG_MPC83xx) += cpu/mpc83xx/
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dmpc8xxx-wdt.txt5 "mpc83xx_wdt" for an mpc83xx

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