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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
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H A Dti,omap3isp.txt4 The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
9 compatible : must contain "ti,omap3-isp"
17 syscon : the phandle and register offset to the Complex I/O or CSI-PHY
19 ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
20 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
21 #clock-cells : Must be 1 --- the ISP provides two external clocks,
24 clock bindings in ../clock/clock-bindings.txt.
27 ---------------------
30 video-interfaces.txt in the same directory.
33 0 - parallel (CCDC)
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/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Dst,st-mipid02.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/i2c/st,st-mipid02.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge
10 - Benjamin Mugnier <benjamin.mugnier@foss.st.com>
11 - Sylvain Petinot <sylvain.petinot@foss.st.com>
14 MIPID02 has two CSI-2 input ports, only one of those ports can be
15 active at a time. Active port input stream will be de-serialized
17 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sandeep Panda <spanda@codeaurora.org>
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
37 vccio-supply:
40 vpll-supply:
43 vcca-supply:
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H A Dsamsung,mipi-dsim.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Jagan Teki <jagan@amarulasolutions.com>
12 - Marek Szyprowski <m.szyprowski@samsung.com>
21 - enum:
22 - samsung,exynos3250-mipi-dsi
23 - samsung,exynos4210-mipi-dsi
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/openbmc/linux/drivers/media/i2c/
H A Dst-mipid02.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for ST MIPID02 CSI-2 to PARALLEL bridge
19 #include <media/v4l2-async.h>
20 #include <media/v4l2-ctrls.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-fwnode.h>
23 #include <media/v4l2-subdev.h>
196 fmt->code = MEDIA_BUS_FMT_SBGGR8_1X8; in init_format()
197 fmt->field = V4L2_FIELD_NONE; in init_format()
198 fmt->colorspace = V4L2_COLORSPACE_SRGB; in init_format()
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H A Dst-vgxy61.c1 // SPDX-License-Identifier: GPL-2.0
20 #include <media/mipi-csi2.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-fwnode.h>
25 #include <media/v4l2-subdev.h>
465 * Freq range is [6Mhz-27Mhz] already checked. in compute_pll_parameters_by_freq()
466 * Output of divider should be in [6Mhz-12Mhz[. in compute_pll_parameters_by_freq()
484 return div64_u64((u64)sensor->data_rate_in_mbps * sensor->nb_of_lane, in get_pixel_rate()
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H A Dov5640.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright (C) 2014-2017 Mentor Graphics Inc.
8 #include <linux/clk-provider.h>
22 #include <media/v4l2-async.h>
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-event.h>
26 #include <media/v4l2-fwnode.h>
27 #include <media/v4l2-subdev.h>
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/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779a0-falcon-csi-dsi.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Falcon CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-lanes = <0>;
22 data-lanes = <1 2 3 4>;
23 remote-endpoint = <&max96712_out0>;
33 #address-cells = <1>;
34 #size-cells = <0>;
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/openbmc/linux/drivers/media/v4l2-core/
H A Dv4l2-fwnode.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * formerly was located in v4l2-of.c.
11 * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
27 #include <media/v4l2-async.h>
28 #include <media/v4l2-fwnode.h>
29 #include <media/v4l2-subdev.h>
31 #include "v4l2-subdev-priv.h"
45 "MIPI CSI-2 C-PHY",
49 "MIPI CSI-1",
57 "MIPI CSI-2 D-PHY",
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/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-n9.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n9.dts - Device Tree file for Nokia N9
8 /dts-v1/;
10 #include "omap3-n950-n9.dtsi"
11 #include <dt-bindings/input/input.h>
15 compatible = "nokia,omap3-n9", "ti,omap3630", "ti,omap3";
23 vana-supply = <&vaux3>;
25 clock-frequency = <9600000>;
26 flash-leds = <&as3645a_flash &as3645a_indicator>;
29 link-frequencies = /bits/ 64 <199200000 210000000 499200000>;
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H A Domap3-n950.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n950.dts - Device Tree file for Nokia N950
8 /dts-v1/;
10 #include "omap3-n950-n9.dtsi"
11 #include <dt-bindings/input/input.h>
15 compatible = "nokia,omap3-n950", "ti,omap3630", "ti,omap3";
18 compatible = "gpio-keys";
23 linux,input-type = <EV_SW>;
25 wakeup-source;
26 pinctrl-names = "default";
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/openbmc/linux/include/media/
H A Dv4l2-mediabus.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <linux/v4l2-mediabus.h>
60 /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */
62 /* FIELD = 1/0 - Field1 (odd)/Field2 (even) */
64 /* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */
71 /* Clock non-continuous mode support. */
77 * struct v4l2_mbus_config_mipi_csi2 - MIPI CSI-2 data bus configuration
79 * @data_lanes: an array of physical data lane indexes
80 * @clock_lane: physical lane index of the clock lane
94 * struct v4l2_mbus_config_parallel - parallel data bus configuration
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-phg.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "imx8mm-tqma8mqml.dtsi"
12 compatible = "cloos,imx8mm-phg", "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
20 stdout-path = &uart2;
24 compatible = "gpio-beeper";
25 pinctrl-0 = <&pinctrl_beeper>;
30 compatible = "gpio-leds";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_gpio_led>;
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/openbmc/u-boot/drivers/video/exynos/
H A Dexynos_mipi_dsi_common.c1 // SPDX-License-Identifier: GPL-2.0+
28 /* MIPI-DSIM status types. */
36 /* define DSI lane types. */
62 if ((data1 - data_cnt) < 4) { in exynos_mipi_dsi_long_data_wr()
63 if ((data1 - data_cnt) == 3) { in exynos_mipi_dsi_long_data_wr()
71 } else if ((data1 - data_cnt) == 2) { in exynos_mipi_dsi_long_data_wr()
76 } else if ((data1 - data_cnt) == 1) { in exynos_mipi_dsi_long_data_wr()
103 if (dsim->state == DSIM_STATE_ULPS) { in exynos_mipi_dsi_wr_data()
106 return -EINVAL; in exynos_mipi_dsi_wr_data()
109 delay_val = MHZ / dsim->dsim_config->esc_clk; in exynos_mipi_dsi_wr_data()
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/openbmc/linux/drivers/gpu/drm/bridge/
H A Dti-sn65dsi86.c1 // SPDX-License-Identifier: GPL-2.0
134 * struct ti_sn65dsi86 - Platform data for ti-sn65dsi86 driver.
135 * @bridge_aux: AUX-bus sub device for MIPI-to-eDP bridge functionality.
136 * @gpio_aux: AUX-bus sub device for GPIO controller functionality.
137 * @aux_aux: AUX-bus sub device for eDP AUX channel functionality.
138 * @pwm_aux: AUX-bus sub device for PWM controller functionality.
153 * @ln_polrs: Value for the 4-bit LN_POLRS field of SN_ENH_FRAME_REG.
159 * serves double-duty of keeping track of the direction and
165 * each other's read-modify-write.
230 ret = regmap_bulk_read(pdata->regmap, reg, buf, ARRAY_SIZE(buf)); in ti_sn65dsi86_read_u16()
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H A Dsamsung-dsim.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <linux/media-bus-format.h>
25 #include <drm/bridge/samsung-dsim.h>
111 #define DSIM_MAIN_VRESOL(x, num_bits) (((x) & ((1 << (num_bits)) - 1)) << 16)
112 #define DSIM_MAIN_HRESOL(x, num_bits) (((x) & ((1 << (num_bits)) - 1)) << 0)
490 * downstream driver - drivers/gpu/drm/bridge/sec-dsim.c
523 writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in samsung_dsim_write()
528 return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in samsung_dsim_read()
533 if (wait_for_completion_timeout(&dsi->completed, msecs_to_jiffies(300))) in samsung_dsim_wait_for_reset()
536 dev_err(dsi->dev, "timeout waiting for reset\n"); in samsung_dsim_wait_for_reset()
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/openbmc/linux/include/drm/
H A Ddrm_connector.h54 DRM_FORCE_ON_DIGITAL, /* for DVI-I use digital connector */
58 * enum drm_connector_status - status for a &drm_connector
73 * nothing there. It is driver-dependent whether a connector with this
80 * flicker (like load-detection when the connector is in use), or when a
81 * hardware resource isn't available (like when load-detection needs a
91 * enum drm_connector_registration_state - userspace registration status for
124 * - An unregistered connector may only have its DPMS changed from
125 * On->Off. Once DPMS is changed to Off, it may not be switched back
127 * - Modesets are not allowed on unregistered connectors, unless they
131 * - Removing a CRTC from an unregistered connector is OK, but new
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