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/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dbrcm,iproc-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,iproc-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom iProc PCIe controller with the platform bus interface
10 - Ray Jui <ray.jui@broadcom.com>
11 - Scott Branden <scott.branden@broadcom.com>
14 - $ref: /schemas/pci/pci-bus.yaml#
19 - enum:
22 - brcm,iproc-pcie
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/openbmc/linux/drivers/pci/controller/
H A Dpcie-iproc-platform.c1 // SPDX-License-Identifier: GPL-2.0
19 #include "pcie-iproc.h"
23 .compatible = "brcm,iproc-pcie",
26 .compatible = "brcm,iproc-pcie-paxb-v2",
29 .compatible = "brcm,iproc-pcie-paxc",
32 .compatible = "brcm,iproc-pcie-paxc-v2",
41 struct device *dev = &pdev->dev; in iproc_pltfm_pcie_probe()
42 struct iproc_pcie *pcie; in iproc_pltfm_pcie_probe() local
43 struct device_node *np = dev->of_node; in iproc_pltfm_pcie_probe()
48 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in iproc_pltfm_pcie_probe()
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H A Dpcie-iproc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2014-2015 Broadcom Corporation
10 * enum iproc_pcie_type - iProc PCIe interface type
11 * @IPROC_PCIE_PAXB_BCMA: BCMA-based host controllers
12 * @IPROC_PCIE_PAXB: PAXB-based host controllers for
14 * @IPROC_PCIE_PAXB_V2: PAXB-based host controllers for Stingray SoCs
15 * @IPROC_PCIE_PAXC: PAXC-based host controllers
16 * @IPROC_PCIE_PAXC_V2: PAXC-based host controllers (second generation)
33 * struct iproc_pcie_ob - iProc PCIe outbound mapping
35 * the iProc PCIe core
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
7 tristate "Aardvark PCIe controller"
13 Add support for Aardvark 64bit PCIe Host Controller. This
18 tristate "Altera PCIe controller"
21 Say Y here if you want to enable PCIe controller support on Altera
25 tristate "Altera PCIe MSI feature"
29 Say Y here if you want PCIe MSI support for the Altera FPGA.
38 tristate "Apple PCIe controller"
44 Say Y here if you want to enable PCIe controller support on Apple
45 system-on-chips, like the Apple M1. This is required for the USB
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H A Dpcie-iproc-msi.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "pcie-iproc.h"
52 * struct iproc_msi_grp - iProc MSI group
54 * One MSI group is allocated per GIC interrupt, serviced by one iProc MSI
57 * @msi: pointer to iProc MSI data
68 * struct iproc_msi - iProc event queue based MSI
73 * @pcie: pointer to iProc PCIe data
94 struct iproc_pcie *pcie; member
132 struct iproc_pcie *pcie = msi->pcie; in iproc_msi_read_reg() local
134 return readl_relaxed(pcie->base + msi->reg_offsets[eq][reg]); in iproc_msi_read_reg()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PCIE_CADENCE) += cadence/
3 obj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o
4 obj-$(CONFIG_PCI_IXP4XX) += pci-ixp4xx.o
5 obj-$(CONFIG_PCI_HYPERV) += pci-hyperv.o
6 obj-$(CONFIG_PCI_HYPERV_INTERFACE) += pci-hyperv-intf.o
7 obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
8 obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
9 obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o
10 obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
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H A Dpcie-iproc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014 Hauke Mehrtens <hauke@hauke-m.de>
9 #include <linux/pci-ecam.h>
17 #include <linux/irqchip/arm-gic-v3.h>
24 #include "pcie-iproc.h"
91 * struct iproc_pcie_ob_map - iProc PCIe outbound mapping controller-specific
138 * enum iproc_pcie_ib_map_type - iProc PCIe inbound mapping type
150 * struct iproc_pcie_ib_map - iProc PCIe inbound mapping controller-specific
159 * @imap_addr_offset: register offset between the upper and lower 32-bit
229 * iProc PCIe host registers
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H A Dpcie-iproc-bcma.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
15 #include "pcie-iproc.h"
21 dev->class = PCI_CLASS_BRIDGE_PCI_NORMAL; in bcma_pcie2_fixup_class()
28 struct iproc_pcie *pcie = dev->sysdata; in iproc_bcma_pcie_map_irq() local
29 struct bcma_device *bdev = container_of(pcie->dev, struct bcma_device, dev); in iproc_bcma_pcie_map_irq()
36 struct device *dev = &bdev->dev; in iproc_bcma_pcie_probe()
37 struct iproc_pcie *pcie; in iproc_bcma_pcie_probe() local
41 bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); in iproc_bcma_pcie_probe()
43 return -ENOMEM; in iproc_bcma_pcie_probe()
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/openbmc/linux/arch/arm64/boot/dts/broadcom/northstar2/
H A Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
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/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-hr2.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
39 interrupt-parent = <&gic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
49 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
56 compatible = "arm,cortex-a9-pmu";
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H A Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
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H A Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 compatible = "arm,cortex-a9";
59 next-level-cache = <&L2>;
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H A Dbcm-ns.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
6 #include <dt-bindings/clock/bcm-nsp.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dbrcm,mdio-mux-iproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/brcm,mdio-mux-iproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MDIO bus multiplexer found in Broadcom iProc based SoCs.
10 - Florian Fainelli <f.fainelli@gmail.com>
14 external to SoCs and could accept MDIO transaction compatible to C-22 or
15 C-45 Clause. When child bus is selected, one needs to select these two
19 - $ref: /schemas/net/mdio-mux.yaml#
23 const: brcm,mdio-mux-iproc
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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dbrcm,iproc-mhb.txt1 Broadcom iProc Multi Host Bridge (MHB)
3 Certain Broadcom iProc SoCs have a multi host bridge (MHB) block that controls
4 the connection and configuration of 1) internal PCIe serdes; 2) PCIe endpoint
10 - compatible: should contain:
11 "brcm,sr-mhb", "syscon" for Stingray
12 - reg: base address and range of the MHB registers
16 compatible = "brcm,sr-mhb", "syscon";
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dbrcm,iproc-clocks.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/brcm,iproc-clocks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom iProc Family Clocks
10 - Ray Jui <rjui@broadcom.com>
11 - Scott Branden <sbranden@broadcom.com>
14 The iProc clock controller manages clocks that are common to the iProc family.
15 An SoC from the iProc family may have several PLLs, e.g., ARMPLL, GENPLL,
25 - brcm,bcm63138-armpll
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/openbmc/linux/Documentation/devicetree/bindings/arm/bcm/
H A Dbrcm,hr2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 are based on Broadcom's iProc SoC architecture and feature a single core Cortex
12 A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND
13 flash and a PCIe attached integrated switching engine.
16 - Florian Fainelli <f.fainelli@gmail.com>
23 - enum:
24 - ubnt,unifi-switch8
25 - const: brcm,bcm53342
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/openbmc/linux/arch/arm/mach-bcm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
10 comment "IPROC architected SoCs"
24 This enables support for systems based on Broadcom IPROC architected SoCs.
25 The IPROC complex contains one or more ARM CPUs along with common
27 uArchitecture containing peripherals outside of the IPROC complex.
63 Ethernet PHYs, DDR3 memory, PCIE Gen-2, USB 2.0 and USB 3.0, serial and
147 can be disabled for an SMP-enabled kernel.
175 BCM53573 series is set of SoCs using ARM Cortex-A7 CPUs with wireless
196 Say Y if you intend to run the kernel on a Broadcom ARM-based STB
199 This enables support for Broadcom ARM-based set-top box chipsets,
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/openbmc/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a72";
49 enable-method = "psci";
50 next-level-cache = <&CLUSTER0_L2>;
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H A Dstingray-pcie.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
6 pcie8: pcie@60400000 {
7 compatible = "brcm,iproc-pcie-paxc-v2";
9 linux,pci-domain = <8>;
11 bus-range = <0x0 0x1>;
13 #address-cells = <3>;
14 #size-cells = <2>;
18 dma-coherent;
20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
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/openbmc/linux/drivers/gpio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
47 this symbol, but new drivers should use the generic gpio-regmap
57 non-sleeping contexts. They can make bitbanged serial protocols
118 Enables support for the idio-16 library functions. The idio-16 library
120 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16.
122 If built as a module its name will be gpio-idio-16.
128 tristate "GPIO driver for 74xx-ICs with MMIO access"
132 Say yes here to support GPIO functionality for 74xx-compatible ICs
149 If driver is built as a module it will be called gpio-altera.
202 tristate "BRCM XGS iProc GPIO support"
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
4 ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
6 obj-$(CONFIG_GPIOLIB) += gpiolib.o
7 obj-$(CONFIG_GPIOLIB) += gpiolib-devres.o
8 obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
9 obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
10 obj-$(CONFIG_GPIO_CDEV) += gpiolib-cdev.o
11 obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
12 obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
13 obj-$(CONFIG_GPIOLIB) += gpiolib-swnode.o
[all …]
/openbmc/linux/drivers/i2c/busses/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 for Cypress CCGx Type-C controller. Individual bus drivers
25 controller is part of the 7101 device, which is an ACPI-compliant
29 will be called i2c-ali1535.
37 controller is part of the 7101 device, which is an ACPI-compliant
41 will be called i2c-ali1563.
51 will be called i2c-ali15x3.
63 will be called i2c-amd756.
70 S4882 motherboard. On this 4-CPU board, the SMBus is multiplexed
76 will be called i2c-amd756-s4882.
[all …]
/openbmc/linux/drivers/clk/bcm/
H A Dclk-sr.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-sr.h>
12 #include "clk-iproc.h"
88 iproc_pll_clk_setup(pdev->dev.of_node, in sr_genpll0_clk_init()
147 iproc_pll_clk_setup(pdev->dev.of_node, in sr_genpll2_clk_init()
186 CLK_OF_DECLARE(sr_genpll3_clk, "brcm,sr-genpll3", sr_genpll3_clk_init);
236 iproc_pll_clk_setup(pdev->dev.of_node, in sr_genpll4_clk_init()
275 iproc_pll_clk_setup(pdev->dev.of_node, in sr_genpll5_clk_init()
320 iproc_pll_clk_setup(pdev->dev.of_node, in sr_lcpll0_clk_init()
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/openbmc/linux/drivers/pci/
H A Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
20 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
37 * Retrain the link of a downstream PCIe port by hand if necessary.
42 * 2 x PCIe x1 device, P/N 41433, plugged into the SiFive HiFive Unmatched
91 int ret = -ENOTTY; in pcie_failed_link_retrain()
94 !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting) in pcie_failed_link_retrain()
103 pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n"); in pcie_failed_link_retrain()
170 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
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