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/openbmc/linux/drivers/gpu/drm/fsl-dcu/
H A Dfsl_tcon.c80 tcon->ipg_clk = of_clk_get_by_name(np, "ipg"); in fsl_tcon_init()
81 if (IS_ERR(tcon->ipg_clk)) { in fsl_tcon_init()
86 ret = clk_prepare_enable(tcon->ipg_clk); in fsl_tcon_init()
104 clk_disable_unprepare(tcon->ipg_clk); in fsl_tcon_free()
105 clk_put(tcon->ipg_clk); in fsl_tcon_free()
H A Dfsl_tcon.h20 struct clk *ipg_clk; member
/openbmc/linux/drivers/irqchip/
H A Dirq-imx-irqsteer.c31 struct clk *ipg_clk; member
177 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_irqsteer_probe()
178 if (IS_ERR(data->ipg_clk)) in imx_irqsteer_probe()
179 return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk), in imx_irqsteer_probe()
206 ret = clk_prepare_enable(data->ipg_clk); in imx_irqsteer_probe()
248 clk_disable_unprepare(data->ipg_clk); in imx_irqsteer_probe()
263 clk_disable_unprepare(irqsteer_data->ipg_clk); in imx_irqsteer_remove()
293 clk_disable_unprepare(irqsteer_data->ipg_clk); in imx_irqsteer_suspend()
303 ret = clk_prepare_enable(irqsteer_data->ipg_clk); in imx_irqsteer_resume()
H A Dirq-imx-intmux.c74 struct clk *ipg_clk; member
225 data->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_intmux_probe()
226 if (IS_ERR(data->ipg_clk)) in imx_intmux_probe()
227 return dev_err_probe(&pdev->dev, PTR_ERR(data->ipg_clk), in imx_intmux_probe()
237 ret = clk_prepare_enable(data->ipg_clk); in imx_intmux_probe()
281 clk_disable_unprepare(data->ipg_clk); in imx_intmux_probe()
317 clk_disable_unprepare(data->ipg_clk); in imx_intmux_runtime_suspend()
328 ret = clk_prepare_enable(data->ipg_clk); in imx_intmux_runtime_resume()
/openbmc/linux/drivers/pwm/
H A Dpwm-fsl-ftm.c50 struct clk *ipg_clk; member
92 ret = clk_prepare_enable(fpc->ipg_clk); in fsl_pwm_request()
112 clk_disable_unprepare(fpc->ipg_clk); in fsl_pwm_free()
360 ret = clk_prepare_enable(fpc->ipg_clk); in fsl_pwm_init()
368 clk_disable_unprepare(fpc->ipg_clk); in fsl_pwm_init()
440 * ipg_clk is the interface clock for the IP. If not provided, use the in fsl_pwm_probe()
443 fpc->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in fsl_pwm_probe()
444 if (IS_ERR(fpc->ipg_clk)) in fsl_pwm_probe()
445 fpc->ipg_clk = fpc->clk[FSL_PWM_CLK_SYS]; in fsl_pwm_probe()
477 clk_disable_unprepare(fpc->ipg_clk); in fsl_pwm_suspend()
[all …]
/openbmc/linux/drivers/iio/adc/
H A Dimx93_adc.c74 struct clk *ipg_clk; member
267 *val = clk_get_rate(adc->ipg_clk); in imx93_adc_read_raw()
328 adc->ipg_clk = devm_clk_get(dev, "ipg"); in imx93_adc_probe()
329 if (IS_ERR(adc->ipg_clk)) in imx93_adc_probe()
330 return dev_err_probe(dev, PTR_ERR(adc->ipg_clk), in imx93_adc_probe()
353 ret = clk_prepare_enable(adc->ipg_clk); in imx93_adc_probe()
392 clk_disable_unprepare(adc->ipg_clk); in imx93_adc_probe()
415 clk_disable_unprepare(adc->ipg_clk); in imx93_adc_remove()
427 clk_disable_unprepare(adc->ipg_clk); in imx93_adc_runtime_suspend()
447 ret = clk_prepare_enable(adc->ipg_clk); in imx93_adc_runtime_resume()
H A Dimx8qxp-adc.c95 struct clk *ipg_clk; member
339 adc->ipg_clk = devm_clk_get(dev, "ipg"); in imx8qxp_adc_probe()
340 if (IS_ERR(adc->ipg_clk)) in imx8qxp_adc_probe()
341 return dev_err_probe(dev, PTR_ERR(adc->ipg_clk), "Failed getting clock\n"); in imx8qxp_adc_probe()
369 ret = clk_prepare_enable(adc->ipg_clk); in imx8qxp_adc_probe()
398 clk_disable_unprepare(adc->ipg_clk); in imx8qxp_adc_probe()
420 clk_disable_unprepare(adc->ipg_clk); in imx8qxp_adc_remove()
437 clk_disable_unprepare(adc->ipg_clk); in imx8qxp_adc_runtime_suspend()
461 ret = clk_prepare_enable(adc->ipg_clk); in imx8qxp_adc_runtime_resume()
/openbmc/u-boot/drivers/misc/
H A Dmxc_ocotp.c250 u32 ipg_clk; in set_timing() local
254 ipg_clk = mxc_get_clock(MXC_IPG_CLK); in set_timing()
256 fsource = DIV_ROUND_UP((ipg_clk / 1000) * BV_TIMING_FSOURCE_NS, in set_timing()
258 prog = DIV_ROUND_CLOSEST(ipg_clk * BV_TIMING_PROG_US, 1000000) + 1; in set_timing()
274 u32 ipg_clk; in set_timing() local
278 ipg_clk = mxc_get_clock(MXC_IPG_CLK); in set_timing()
280 relax = DIV_ROUND_UP(ipg_clk * BV_TIMING_RELAX_NS, 1000000000) - 1; in set_timing()
281 strobe_read = DIV_ROUND_UP(ipg_clk * BV_TIMING_STROBE_READ_NS, in set_timing()
283 strobe_prog = DIV_ROUND_CLOSEST(ipg_clk * BV_TIMING_STROBE_PROG_US, in set_timing()
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,micfil.yaml52 - const: ipg_clk
86 clock-names = "ipg_clk", "ipg_clk_app";
/openbmc/linux/sound/soc/fsl/
H A Dfsl_asrc_common.h63 * @ipg_clk: clock source to drive peripheral
85 struct clk *ipg_clk; member
H A Dfsl_audmix.c477 priv->ipg_clk = devm_clk_get(dev, "ipg"); in fsl_audmix_probe()
478 if (IS_ERR(priv->ipg_clk)) { in fsl_audmix_probe()
480 return PTR_ERR(priv->ipg_clk); in fsl_audmix_probe()
525 ret = clk_prepare_enable(priv->ipg_clk); in fsl_audmix_runtime_resume()
543 clk_disable_unprepare(priv->ipg_clk); in fsl_audmix_runtime_suspend()
H A Dfsl_asrc.c999 * On iMX6, ipg_clk = 133MHz, REG_ASR76K = 0x06D6, REG_ASR56K = 0x0947 in fsl_asrc_init()
1001 ipg_rate = clk_get_rate(asrc->ipg_clk); in fsl_asrc_init()
1123 asrc->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in fsl_asrc_probe()
1124 if (IS_ERR(asrc->ipg_clk)) { in fsl_asrc_probe()
1126 return PTR_ERR(asrc->ipg_clk); in fsl_asrc_probe()
1273 ret = clk_prepare_enable(asrc->ipg_clk); in fsl_asrc_runtime_resume()
1331 clk_disable_unprepare(asrc->ipg_clk); in fsl_asrc_runtime_resume()
1352 clk_disable_unprepare(asrc->ipg_clk); in fsl_asrc_runtime_suspend()
H A Dfsl_xcvr.c32 struct clk *ipg_clk; member
1266 xcvr->ipg_clk = devm_clk_get(dev, "ipg"); in fsl_xcvr_probe()
1267 if (IS_ERR(xcvr->ipg_clk)) { in fsl_xcvr_probe()
1269 return PTR_ERR(xcvr->ipg_clk); in fsl_xcvr_probe()
1396 clk_disable_unprepare(xcvr->ipg_clk); in fsl_xcvr_runtime_suspend()
1412 ret = clk_prepare_enable(xcvr->ipg_clk); in fsl_xcvr_runtime_resume()
1480 clk_disable_unprepare(xcvr->ipg_clk); in fsl_xcvr_runtime_resume()
H A Dfsl_audmix.h98 struct clk *ipg_clk; member
/openbmc/linux/drivers/pmdomain/imx/
H A Dgpc.c462 struct clk *ipg_clk; in imx_gpc_probe() local
466 ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in imx_gpc_probe()
467 if (IS_ERR(ipg_clk)) in imx_gpc_probe()
468 return PTR_ERR(ipg_clk); in imx_gpc_probe()
469 ipg_rate_mhz = clk_get_rate(ipg_clk) / 1000000; in imx_gpc_probe()
/openbmc/qemu/hw/timer/
H A Dimx_gpt.c80 CLK_IPG, /* 001 ipg_clk, 532MHz*/
91 CLK_IPG, /* 001 ipg_clk, 532MHz*/
102 CLK_IPG, /* 001 ipg_clk, 532MHz*/
113 CLK_IPG, /* 001 ipg_clk, 532MHz*/
124 CLK_IPG, /* 001 ipg_clk, 532MHz*/
H A Dimx_epit.c60 CLK_IPG, /* 01 ipg_clk, ~532MHz */
/openbmc/u-boot/arch/arm/include/asm/arch-mx35/
H A Dclock.h42 IPG_CLK, enumerator
/openbmc/linux/drivers/nvmem/
H A Dimx-ocotp.c246 * ipg_clk. OTP writes will work at maximum bus frequencies as long in imx_ocotp_set_imx6_timing()
250 * correctly that are independent of the ipg_clk. Those values are not in imx_ocotp_set_imx6_timing()
265 * of ipg_clk periods." where Tpgm and Trd refer to STROBE_PROG in imx_ocotp_set_imx6_timing()
/openbmc/linux/drivers/tty/serial/
H A Dfsl_lpuart.c264 struct clk *ipg_clk; member
412 ret = clk_prepare_enable(sport->ipg_clk); in __lpuart_enable_clks()
418 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
423 clk_disable_unprepare(sport->ipg_clk); in __lpuart_enable_clks()
434 return clk_get_rate(sport->ipg_clk); in lpuart_get_baud_clk_rate()
2801 ret = clk_prepare_enable(sport->ipg_clk); in lpuart_global_reset()
2819 clk_disable_unprepare(sport->ipg_clk); in lpuart_global_reset()
2837 clk_disable_unprepare(sport->ipg_clk); in lpuart_global_reset()
2884 sport->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); in lpuart_probe()
2885 if (IS_ERR(sport->ipg_clk)) { in lpuart_probe()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dfsl,fec.yaml100 The "ahb", for MAC ipg_clk, ipg_clk_mac that are bus clock.
/openbmc/u-boot/drivers/net/
H A Dfec_mxc.c1327 ret = clk_get_by_name(dev, "ipg", &priv->ipg_clk); in fecmxc_probe()
1332 ret = clk_enable(&priv->ipg_clk); in fecmxc_probe()
1338 priv->clk_rate = clk_get_rate(&priv->ipg_clk); in fecmxc_probe()
H A Dfec_mxc.h266 struct clk ipg_clk; member
/openbmc/u-boot/arch/arm/cpu/arm1136/mx35/
H A Dgeneric.c222 case IPG_CLK: in mxc_get_main_clock()
/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A Dpsci-mx7.c638 * (46 + PDNSCR_SW + PDNSCR_SW2ISO ) ( 1/IPG_CLK frequency ). in psci_system_suspend()

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