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/openbmc/linux/include/linux/fsl/
H A Dguts.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 #include <linux/io.h>
29 u32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
30 u32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */
31 u32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and
34 u32 pordevsr; /* 0x.000c - POR I/O Device Status Register */
35 u32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */
36 u32 pordevsr2; /* 0x.0014 - POR device status register 2 */
37 u8 res018[0x20 - 0x18];
38 u32 porcir; /* 0x.0020 - POR Configuration Information
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,rzn1-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzn1-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - enum:
17 - renesas,r9a06g032-pinctrl # RZ/N1D
18 - renesas,r9a06g033-pinctrl # RZ/N1S
19 - const: renesas,rzn1-pinctrl # Generic RZ/N1
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Drockchip,i2s-tdm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
25 - rockchip,rk3308-i2s-tdm
26 - rockchip,rk3568-i2s-tdm
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/openbmc/qemu/docs/system/
H A Dintroduction.rst7 ---------------------------
14 .. list-table:: Supported Accelerators
15 :header-rows: 1
17 * - Accelerator
18 - Host OS
19 - Host Architectures
20 * - KVM
21 - Linux
22 - Arm (64 bit only), MIPS, PPC, RISC-V, s390x, x86
23 * - Xen
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/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_sspp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
52 * DPU_SSPP_RECT_SOLO - multirect disabled
53 * DPU_SSPP_RECT_0 - rect0 of a multirect pipe
54 * DPU_SSPP_RECT_1 - rect1 of a multirect pipe
167 * struct dpu_hw_pipe_ts_cfg - traffic shaper configuration
177 * struct dpu_sw_pipe - software pipe description
180 * @mode: parallel or time multiplex multirect mode
189 * struct dpu_hw_sspp_ops - interface to the SSPP Hw driver functions
195 * setup_format - setup pixel format cropping rectangle, flip
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/openbmc/linux/drivers/video/fbdev/
H A Ds3fb.c2 * linux/drivers/video/s3fb.c -- Frame buffer device driver for S3 Trio/Virge
4 * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org>
30 #include <linux/i2c-algo-bit.h>
48 /* ------------------------------------------------------------------------- */
148 /* ------------------------------------------------------------------------- */
158 MODULE_AUTHOR("(c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org>");
163 MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)");
165 MODULE_PARM_DESC(mode, "Default video mode ('640x480-8@60', etc) (deprecated)");
167 MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)");
173 /* ------------------------------------------------------------------------- */
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H A Dssd1307fb.c1 // SPDX-License-Identifier: GPL-2.0-or-later
122 array->type = type; in ssd1307fb_alloc_array()
136 dev_err(&client->dev, "Couldn't send I2C command.\n"); in ssd1307fb_write_array()
150 return -ENOMEM; in ssd1307fb_write_cmd()
152 array->data[0] = cmd; in ssd1307fb_write_cmd()
163 u8 col_end = col_start + cols - 1; in ssd1307fb_set_col_range()
166 if (col_start == par->col_start && col_end == par->col_end) in ssd1307fb_set_col_range()
169 ret = ssd1307fb_write_cmd(par->client, SSD1307FB_SET_COL_RANGE); in ssd1307fb_set_col_range()
173 ret = ssd1307fb_write_cmd(par->client, col_start); in ssd1307fb_set_col_range()
177 ret = ssd1307fb_write_cmd(par->client, col_end); in ssd1307fb_set_col_range()
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H A Darkfb.c2 * linux/drivers/video/arkfb.c -- Frame buffer device driver for ARK 2000PV
42 /* ------------------------------------------------------------------------- */
95 /* ------------------------------------------------------------------------- */
100 static char *mode_option = "640x480-8@60";
107 MODULE_PARM_DESC(mode_option, "Default video mode ('640x480-8@60', etc)");
109 MODULE_PARM_DESC(mode, "Default video mode ('640x480-8@60', etc) (deprecated)");
117 /* ------------------------------------------------------------------------- */
122 const u8 *font = map->data; in arkfb_settile()
123 u8 __iomem *fb = (u8 __iomem *)info->screen_base; in arkfb_settile()
126 if ((map->width != 8) || (map->height != 16) || in arkfb_settile()
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/openbmc/linux/fs/smb/client/
H A Dsmb1ops.c1 // SPDX-License-Identifier: GPL-2.0-only
33 struct smb_hdr *in_buf = (struct smb_hdr *)rqst->rq_iov[0].iov_base; in send_nt_cancel()
35 /* -4 for RFC1001 length and +2 for BCC field */ in send_nt_cancel()
36 in_buf->smb_buf_length = cpu_to_be32(sizeof(struct smb_hdr) - 4 + 2); in send_nt_cancel()
37 in_buf->Command = SMB_COM_NT_CANCEL; in send_nt_cancel()
38 in_buf->WordCount = 0; in send_nt_cancel()
42 rc = cifs_sign_smb(in_buf, server, &mid->sequence_number); in send_nt_cancel()
53 --server->sequence_number; in send_nt_cancel()
54 rc = smb_send(server, in_buf, be32_to_cpu(in_buf->smb_buf_length)); in send_nt_cancel()
56 server->sequence_number--; in send_nt_cancel()
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H A Dcifsglob.h1 /* SPDX-License-Identifier: LGPL-2.1 */
58 * max attribute cache timeout (jiffies) - 2^30
112 #define CIFS_DFS_ROOT_SES(ses) ((ses)->dfs_root_ses ?: (ses))
183 struct shash_desc *hmacsha256; /* hmac-sha256 hash function, for SMB2 signatures */
185 struct shash_desc *aes_cmac; /* block-cipher based MAC function, for SMB3 signatures */
187 struct crypto_aead *enc; /* smb3 encryption AEAD TFM (AES-CCM and AES-GCM) */
188 struct crypto_aead *dec; /* smb3 decryption AEAD TFM (AES-CCM and AES-GCM) */
222 } io; member
257 size_t rq_iter_size; /* Amount of data in ->rq_iter */
307 * message field DataRemaining for out-of-band data read (e.g through
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/openbmc/linux/drivers/input/serio/
H A Di8042.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 1999-2004 Vojtech Pavlik
26 #include <asm/io.h>
61 enum i8042_controller_reset_mode *arg = kp->arg; in i8042_set_reset()
88 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
130 …enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-c…
206 ret = -EBUSY; in i8042_install_filter()
227 ret = -EINVAL; in i8042_remove_filter()
253 return -(i == I8042_CTL_TIMEOUT); in i8042_wait_read()
264 return -(i == I8042_CTL_TIMEOUT); in i8042_wait_write()
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/openbmc/linux/Documentation/virt/uml/
H A Duser_mode_linux_howto_v2.rst1 .. SPDX-License-Identifier: GPL-2.0
25 Most OSes today have built-in support for a number of "fake"
27 User Mode Linux takes this concept to the ultimate extreme - there
30 concepts which map onto something provided by the host - files, sockets,
36 The UML kernel is just a process running on Linux - same as any other
57 * You can run a usermode kernel as a non-root user (you may need to
99 This is extremely easy on Debian - you can do it using debootstrap. It is
100 also easy on OpenWRT - the build process can build UML images. All other
101 distros - YMMV.
114 or by running ``tune2fs -o discard /dev/ubdXX`` will request UML to
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/openbmc/linux/arch/powerpc/include/asm/
H A D8xx_immap.h10 * functional files.....but anyone else is welcome to try. -- Dan
95 /*-----------------------------------------------------------------------
96 * BR - Memory Controller: Base Register 16-9
112 /*-----------------------------------------------------------------------
113 * OR - Memory Controller: Option Register 16-11
118 /* Address Multiplex */
227 /* The key to unlock registers maintained by keep-alive power.
396 uint fec_grp_hash_table_high; /* upper 32-bits of hash table */
397 uint fec_grp_hash_table_low; /* lower 32-bits of hash table */
412 uint fec_r_bound; /* end of RAM (read-only) */
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/openbmc/u-boot/board/freescale/p1_p2_rdb_pc/
H A Dp1_p2_rdb_pc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
17 #include <asm/io.h>
35 #define GPIO_GETH_SW_DATA (1 << (31 - GPIO_GETH_SW_PIN))
39 #define GPIO_SLIC_DATA (1 << (31 - GPIO_SLIC_PIN))
44 #define GPIO_DDR_RST_DATA (1 << (31 - GPIO_DDR_RST_PIN))
46 #define GPIO_2BIT_MASK (0x3 << (32 - (GPIO_DDR_RST_PIN + 1) * 2))
59 {1, 1, 2, 0, 0}, /* GPIO7/PB1 - LOAD_DEFAULT_N */
61 {1, 8, 1, 1, 0}, /* GPIO10/PB8 - DDR_RST */
63 {0, 15, 1, 0, 0}, /* GPIO11/A15 - WDI */
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/openbmc/linux/sound/soc/rockchip/
H A Drockchip_i2s_tdm.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // ALSA SoC Audio Layer - Rockchip I2S/TDM Controller driver
5 // Author: Sugar Zhang <sugar.zhang@rock-chips.com>
9 #include <linux/clk-provider.h>
25 #define DRV_NAME "rockchip-i2s-tdm"
94 clk_disable_unprepare(i2s_tdm->mclk_tx); in i2s_tdm_disable_unprepare_mclk()
95 clk_disable_unprepare(i2s_tdm->mclk_rx); in i2s_tdm_disable_unprepare_mclk()
99 * i2s_tdm_prepare_enable_mclk - prepare to enable all mclks, disable them on
112 ret = clk_prepare_enable(i2s_tdm->mclk_tx); in i2s_tdm_prepare_enable_mclk()
115 ret = clk_prepare_enable(i2s_tdm->mclk_rx); in i2s_tdm_prepare_enable_mclk()
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/openbmc/linux/Documentation/scsi/
H A DChangeLog.megaraid1 Release Date : Thu Nov 16 15:32:35 EST 2006 -
9 and re-initialize its internal RAID structure.
14 2. Authors email-id domain name changed from lsil.com to lsi.com.
17 Release Date : Fri May 19 09:31:45 EST 2006 - Seokmann Ju <sju@lsil.com>
23 Root Cause: the driver registered controllers as 64-bit DMA capable
26 identifying 64-bit DMA capable controllers.
28 > -----Original Message-----
31 > To: linux-scsi@vger.kernel.org; Kolli, Neela; Mukker, Atul;
86 issue on 64-bit platform.
93 > -----Original Message-----
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/openbmc/u-boot/arch/powerpc/include/asm/
H A Dfsl_lbc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2004-2008,2010-2011 Freescale Semiconductor, Inc.
16 /* BR - Base Registers
84 /* OR - Option Registers
142 #define P2SZ_TO_AM(s) ((~((s) - 1)) & 0xffff8000) /* must be pow of 2 */
224 /* MxMR - UPM Machine A/B/C Mode Registers
253 #define MxMR_AMx_MSK 0x07000000 /* Addess Multiplex Size Mask */
285 /* LBCR - Local Bus Configuration Register
300 /* LCRR - Clock Ratio Register
343 /* LTEDR - Transfer Error Check Disable Register
[all …]
H A Dimmap_85xx.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Copyright 2007-2012 Freescale Semiconductor, Inc.
47 /* Local-Access Registers & ECM Registers */
123 u8 res[4096 - 1 * sizeof(struct fsl_i2c_base)];
298 u32 l2srbar0; /* L2 memory-mapped SRAM base addr 0 */
300 u32 l2srbar1; /* L2 memory-mapped SRAM base addr 1 */
365 u32 ostbd; /* Out-of-Sequence(OOS) TX Buffer Desc */
419 u32 tr64; /* TX & RX 64-byte Frame Counter */
420 u32 tr127; /* TX & RX 65-127 byte Frame Counter */
421 u32 tr255; /* TX & RX 128-255 byte Frame Counter */
[all …]
/openbmc/linux/drivers/phy/motorola/
H A Dphy-cpcap-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * board-mapphone-usb.c and cpcap-usb-det.c:
8 * Copyright (C) 2007 - 2011 Motorola, Inc.
15 #include <linux/io.h>
26 #include <linux/mfd/motorola-cpcap.h>
136 error = iio_read_channel_processed(ddata->vbus, &value); in cpcap_usb_vbus_valid()
140 dev_err(ddata->dev, "error reading VBUS: %i\n", error); in cpcap_usb_vbus_valid()
147 otg->host = host; in cpcap_usb_phy_set_host()
149 otg->state = OTG_STATE_UNDEFINED; in cpcap_usb_phy_set_host()
157 otg->gadget = gadget; in cpcap_usb_phy_set_peripheral()
[all …]
/openbmc/linux/drivers/media/platform/cadence/
H A Dcdns-csi2tx.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Cadence MIPI-CSI2 TX Controller
5 * Copyright (C) 2017-2019 Cadence Design Systems Inc.
10 #include <linux/io.h>
18 #include <media/mipi-csi2.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-fwnode.h>
22 #include <media/v4l2-subdev.h>
163 if (code->pad || code->index >= ARRAY_SIZE(csi2tx_formats)) in csi2tx_enum_mbus_code()
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/openbmc/u-boot/drivers/net/
H A Dks8851_mll.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <asm/io.h>
29 * union ks_tx_hdr - tx header data
31 * @txw: The header as 16bit, little-endian words
43 * struct ks_net - KS8851 driver private data
46 * @frame_head_info : frame header information for multi-pkt rx.
69 /* Receive multiplex framer header info */
110 writew(offset | (BE0 << shift_bit), dev->iobase + 2); in ks_rdreg8()
112 return (u8)(readw(dev->iobase) >> shift_data); in ks_rdreg8()
117 writew(offset | ((BE1 | BE0) << (offset & 0x02)), dev->iobase + 2); in ks_rdreg16()
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/openbmc/linux/drivers/scsi/
H A Dncr53c8xx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 ** Device driver for the PCI-SCSI NCR538XX controller family.
6 ** Copyright (C) 1998-2001 Gerard Roudier <groudier@free.fr>
9 **-----------------------------------------------------------------------------
23 ** Stefan Esser <se@mi.Uni-Koeln.de>
62 /* ---------------------------------------------------------------------
65 ** ---------------------------------------------------------------------
143 * Disallow disconnections at boot-up
179 * Settle time after reset at boot-up
184 ** Bridge quirks work-around option defaulted to 1.
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/openbmc/linux/include/media/
H A Dv4l2-subdev.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * V4L2 sub-device support header.
12 #include <linux/v4l2-subdev.h>
13 #include <media/media-entity.h>
14 #include <media/v4l2-async.h>
15 #include <media/v4l2-common.h>
16 #include <media/v4l2-dev.h>
17 #include <media/v4l2-fh.h>
18 #include <media/v4l2-mediabus.h>
44 * struct v4l2_decode_vbi_line - used to decode_vbi_line
[all …]
/openbmc/linux/drivers/memory/
H A Domap-gpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2005-2006 Nokia Corporation
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
21 #include <linux/io.h>
32 #include <linux/omap-gpmc.h>
36 #include <linux/platform_data/mtd-nand-omap2.h>
38 #define DEVICE_NAME "omap-gpmc"
257 /* Define chip-selects as reserved by default until probe completes */
305 * gpmc_get_clk_period - get period of selected clock domain in ps
342 return (time_ns * 1000 + tick_ps - 1) / tick_ps; in gpmc_ns_to_clk_ticks()
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/openbmc/linux/drivers/net/ethernet/sun/
H A Dcassini.h1 /* SPDX-License-Identifier: GPL-2.0+ */
29 /* cassini register map: 2M memory mapped in 32-bit memory space accessible as
30 * 32-bit words. there is no i/o port access. REG_ addresses are
62 /* top level interrupts [0-9] are auto-cleared to 0 when the status
63 * register is read. second level interrupts [13 - 18] are cleared at
64 * the source. tx completion register 3 is replicated in [19 - 31]
104 len of non-reassembly pkt
183 #define BIM_CFG_64BIT_DISABLE 0x004 /* disable 64-bit mode */
185 #define BIM_CFG_32BIT 0x010 /* (ro) 1 = 32-bit slot, 0 = 64-bit */
216 reset when hot-swap is being
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