| /openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
| H A D | interconnect.txt | 1 Interconnect Provider Device Tree Bindings
4 The purpose of this document is to define a common set of generic interconnect
8 = interconnect providers =
10 The interconnect provider binding is intended to represent the interconnect
11 controllers in the system. Each provider registers a set of interconnect
12 nodes, which expose the interconnect related capabilities of the interconnect
14 etc. The consumer drivers set constraints on interconnect path (or endpoints)
15 depending on the use case. Interconnect providers can also be interconnect
16 consumers, such as in the case where two network-on-chip fabrics interface
20 - compatible : contains the interconnect provider compatible string
[all …]
|
| H A D | qcom,qcm2290.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,qcm2290.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QCM2290 Network-On-Chip interconnect
10 - Shawn Guo <shawn.guo@linaro.org>
13 The Qualcomm QCM2290 interconnect providers support adjusting the
22 - qcom,qcm2290-bimc
23 - qcom,qcm2290-cnoc
24 - qcom,qcm2290-snoc
[all …]
|
| H A D | qcom,sm6350-rpmh.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6350-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6350 RPMh Network-On-Chip Interconnect
10 - Luca Weiss <luca.weiss@fairphone.com>
13 Qualcomm RPMh-based interconnect provider on SM6350.
16 - $ref: qcom,rpmh-common.yaml#
21 - qcom,sm6350-aggre1-noc
22 - qcom,sm6350-aggre2-noc
[all …]
|
| H A D | qcom,rpm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,rpm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPM Network-On-Chip Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
13 RPM interconnect providers support system bandwidth requirements through
23 - qcom,msm8916-bimc
24 - qcom,msm8916-pcnoc
25 - qcom,msm8916-snoc
[all …]
|
| H A D | qcom,qdu1000-rpmh.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,qdu1000-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on QDU1000
10 - Georgi Djakov <djakov@kernel.org>
11 - Odelu Kukatla <quic_okukatla@quicinc.com>
14 RPMh interconnect providers support system bandwidth requirements through
24 - qcom,qdu1000-clk-virt
25 - qcom,qdu1000-gem-noc
[all …]
|
| H A D | qcom,sc7280-rpmh.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konrad.dybcio@linaro.org>
14 RPMh interconnect providers support system bandwidth requirements through
17 See also:: include/dt-bindings/interconnect/qcom,sc7280.h
22 - qcom,sc7280-aggre1-noc
[all …]
|
| H A D | qcom,msm8974.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8974.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM8974 Network-On-Chip Interconnect
10 - Brian Masney <masneyb@onstation.org>
13 The Qualcomm MSM8974 interconnect providers support setting system
14 bandwidth requirements between various network-on-chip fabrics.
22 - qcom,msm8974-bimc
23 - qcom,msm8974-cnoc
[all …]
|
| H A D | qcom,osm-l3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider
10 - Sibi Sankar <quic_sibis@quicinc.com>
14 The OSM L3 interconnect provider aggregates the L3 bandwidth requests
20 - items:
21 - enum:
22 - qcom,sc7180-osm-l3
[all …]
|
| H A D | qcom,sm8450-rpmh.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konrad.dybcio@linaro.org>
14 RPMh interconnect providers support system bandwidth requirements through
17 See also:: include/dt-bindings/interconnect/qcom,sm8450.h
22 - qcom,sm8450-aggre1-noc
[all …]
|
| H A D | qcom,sm8550-rpmh.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550
10 - Abel Vesa <abel.vesa@linaro.org>
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 RPMh interconnect providers support system bandwidth requirements through
21 See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h
26 - qcom,sm8550-aggre1-noc
[all …]
|
| H A D | qcom,rpmh.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
11 - Odelu Kukatla <okukatla@codeaurora.org>
14 RPMh interconnect providers support system bandwidth requirements through
27 - qcom,sc7180-aggre1-noc
28 - qcom,sc7180-aggre2-noc
[all …]
|
| H A D | fsl,imx8m-noc.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interconnect/fsl,imx8m-noc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
18 for normal (non-secure) world.
20 The buses are based on externally licensed IPs such as ARM NIC-301 and
22 interconnect IPs into imx SOCs.
27 - items:
28 - enum:
[all …]
|
| H A D | qcom,sc8280xp-rpmh.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,sc8280xp-rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SC8280XP
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konrad.dybcio@linaro.org>
14 RPMh interconnect providers support system bandwidth requirements through
17 See also:: include/dt-bindings/interconnect/qcom,sc8280xp.h
22 - qcom,sc8280xp-aggre1-noc
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/bus/ |
| H A D | ti-sysc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments interconnect target module
10 - Tony Lindgren <tony@atomide.com>
13 Texas Instruments SoCs can have a generic interconnect target module
14 for devices connected to various interconnects such as L3 interconnect
15 using Arteris NoC, and L4 interconnect using Sonics s3220. This module
18 than that it is mostly independent of the interconnect.
[all …]
|
| H A D | baikal,bt1-axi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/bus/baikal,bt1-axi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 AXI-bus
11 - Serge Semin <fancer.lancer@gmail.com>
14 AXI3-bus is the main communication bus of Baikal-T1 SoC connecting all
15 high-speed peripheral IP-cores with RAM controller and with MIPS P5600
16 cores. Traffic arbitration is done by means of DW AXI Interconnect (so
17 called AXI Main Interconnect) routing IO requests from one block to
[all …]
|
| /openbmc/linux/drivers/net/ipa/ |
| H A D | ipa_power.c | 1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2022 Linaro Ltd.
9 #include <linux/interconnect.h>
38 * enum ipa_power_flag - IPA power flags
54 * struct ipa_power - IPA power management information
60 * @interconnect_count: Number of elements in interconnect[]
61 * @interconnect: Interconnect array
70 struct icc_bulk_data interconnect[]; member
77 struct icc_bulk_data *interconnect; in ipa_interconnect_init() local
[all …]
|
| /openbmc/linux/drivers/interconnect/ |
| H A D | core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Interconnect framework core driver
5 * Copyright (c) 2017-2019, Linaro Ltd.
13 #include <linux/interconnect.h>
14 #include <linux/interconnect-provider.h>
39 seq_printf(s, "%-42s %12u %12u\n", in icc_summary_show_one()
40 n->name, n->avg_bw, n->peak_bw); in icc_summary_show_one()
48 seq_puts(s, "--------------------------------------------------------------------\n"); in icc_summary_show()
55 list_for_each_entry(n, &provider->nodes, node_list) { in icc_summary_show()
59 hlist_for_each_entry(r, &n->req_list, req_node) { in icc_summary_show()
[all …]
|
| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | sa8775p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,icc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
[all …]
|
| H A D | sdm670.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,osm-l3.h>
14 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/phy/phy-qcom-qusb2.h>
17 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
|
| H A D | sc8180x.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interconnect/qcom,sc8180x.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/arm/sunxi/ |
| H A D | allwinner,sun4i-a10-mbus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun4i-a10-mbus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
20 the interconnects and interconnect-names properties set to the MBUS
21 controller and with "dma-mem" as the interconnect name.
24 "#interconnect-cells":
31 - allwinner,sun5i-a13-mbus
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/devfreq/ |
| H A D | nvidia,tegra30-actmon.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
23 - nvidia,tegra30-actmon
24 - nvidia,tegra114-actmon
25 - nvidia,tegra124-actmon
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/soc/imx/ |
| H A D | fsl,imx8mm-vpu-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mm-vpu-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/arm/omap/ |
| H A D | l4.txt | 1 L4 interconnect bindings
3 These bindings describe the OMAP SoCs L4 interconnect bus.
6 - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
7 Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
8 Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
9 Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus
10 Should be "ti,omap4-l4-per" for OMAP4 family l4 per bus
11 Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus
12 Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus
13 Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus
[all …]
|
| /openbmc/linux/drivers/devfreq/ |
| H A D | imx-bus.c | 1 // SPDX-License-Identifier: GPL-2.0
43 *freq = clk_get_rate(priv->clk); in imx_bus_get_cur_freq()
45 return 0; in imx_bus_get_cur_freq()
53 platform_device_unregister(priv->icc_pdev); in imx_bus_exit()
56 /* imx_bus_init_icc() - register matching icc provider if required */
62 if (!of_get_property(dev->of_node, "#interconnect-cells", NULL)) in imx_bus_init_icc()
63 return 0; in imx_bus_init_icc()
65 dev_warn(dev, "imx interconnect drivers disabled\n"); in imx_bus_init_icc()
66 return 0; in imx_bus_init_icc()
71 dev_err(dev, "unknown interconnect driver\n"); in imx_bus_init_icc()
[all …]
|