/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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H A D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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H A D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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H A D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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H A D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 16 * Also for U-Boot there must be a pre-existing /memory node. 55 compatible = "fsl,imx-ckil", "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <32768>; [all …]
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H A D | imx6ul.dtsi | 9 #include <dt-bindings/clock/imx6ul-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6ul-pinfunc.h" 54 #address-cells = <1>; 55 #size-cells = <0>; 58 compatible = "arm,cortex-a7"; 61 clock-latency = <61036>; /* two CLK32 periods */ 62 operating-points = < [all …]
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H A D | imx6sl.dtsi | 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "imx6sl-pinfunc.h" 12 #include <dt-bindings/clock/imx6sl-clock.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 19 * pre-existing /chosen node to be available to insert the 21 * Also for U-Boot there must be a pre-existing /memory node. 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a9"; [all …]
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H A D | imx6ull.dtsi | 2 * Copyright 2015-2016 Freescale Semiconductor, Inc. 9 #include <dt-bindings/clock/imx6ul-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6ull-pinfunc.h" 14 #include "imx6ull-pinfunc-snvs.h" 52 #address-cells = <1>; 53 #size-cells = <0>; 56 compatible = "arm,cortex-a7"; [all …]
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H A D | imx6sx.dtsi | 9 #include <dt-bindings/clock/imx6sx-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6sx-pinfunc.h" 55 #address-cells = <1>; 56 #size-cells = <0>; 59 compatible = "arm,cortex-a9"; 62 next-level-cache = <&L2>; 63 operating-points = < [all …]
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H A D | imx6sll.dtsi | 9 #include <dt-bindings/clock/imx6sll-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include "imx6sll-pinfunc.h" 43 #address-cells = <1>; 44 #size-cells = <0>; 47 compatible = "arm,cortex-a9"; 50 next-level-cache = <&L2>; 51 operating-points = < 58 fsl,soc-operating-points = < [all …]
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H A D | imx7s.dtsi | 5 * This file is dual-licensed: you can use it either under the terms 44 #include <dt-bindings/clock/imx7d-clock.h> 45 #include <dt-bindings/power/imx7-power.h> 46 #include <dt-bindings/gpio/gpio.h> 47 #include <dt-bindings/input/input.h> 48 #include <dt-bindings/interrupt-controller/arm-gic.h> 49 #include "imx7d-pinfunc.h" 52 #address-cells = <1>; 53 #size-cells = <1>; 56 * pre-existing /chosen node to be available to insert the [all …]
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H A D | fsl-imx8mq.dtsi | 16 #include "fsl-imx8-ca53.dtsi" 17 #include <dt-bindings/clock/imx8mq-clock.h> 18 #include <dt-bindings/gpio/gpio.h> 19 #include <dt-bindings/input/input.h> 20 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 #include <dt-bindings/pinctrl/pins-imx8mq.h> 22 #include <dt-bindings/thermal/thermal.h> 26 interrupt-parent = <&gpc>; 27 #address-cells = <2>; 28 #size-cells = <2>; [all …]
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/openbmc/linux/arch/arm/mach-imx/ |
H A D | anatop.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2013-2015 Freescale Semiconductor, Inc. 4 * Copyright 2017-2018 NXP. 35 static struct regmap *anatop; variable 41 regmap_read(anatop, ANADIG_ANA_MISC0, &val); in imx_anatop_enable_weak2p5() 47 regmap_write(anatop, reg, BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG); in imx_anatop_enable_weak2p5() 52 regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_fet_odrive() 58 regmap_write(anatop, ANADIG_REG_2P5 + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_2p5_pulldown() 64 regmap_write(anatop, ANADIG_ANA_MISC0 + (enable ? REG_SET : REG_CLR), in imx_anatop_disconnect_high_snvs() 103 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); in imx_init_revision_from_anatop() [all …]
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H A D | mach-imx6q.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2011-2013 Freescale Semiconductor, Inc. 15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 23 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */ 44 * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High 45 * as they are used for slots1-7 PERST# 54 if (dev->devfn != 0) in ventana_pciesw_early_fixup() 58 dw |= 0xaaa8; // GPIO1-7 outputs in ventana_pciesw_early_fixup() 62 dw |= 0xfe; // GPIO1-7 output high in ventana_pciesw_early_fixup() 87 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-fec"); in imx6q_1588_init() [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-y := cpu.o system.o irq-common.o 4 obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o 6 obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o 8 obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o mach-imx31.o 9 obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o 11 imx5-pm-$(CONFIG_PM) += pm-imx5.o 12 obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y) 14 obj-$(CONFIG_MXC_TZIC) += tzic.o 15 obj-$(CONFIG_MXC_AVIC) += avic.o [all …]
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | fsl,mxs-usbphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/fsl,mxs-usbphy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xu Yang <xu.yang_2@nxp.com> 15 - enum: 16 - fsl,imx23-usbphy 17 - fsl,imx7ulp-usbphy 18 - fsl,vf610-usbphy 19 - items: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/thermal/ |
H A D | imx-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/imx-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 11 - Anson Huang <Anson.Huang@nxp.com> 16 - enum: 17 - fsl,imx6q-tempmon 18 - fsl,imx6sx-tempmon 19 - fsl,imx7d-tempmon [all …]
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/openbmc/u-boot/board/k+p/kp_imx6q_tpc/ |
H A D | kp_imx6q_tpc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * K+P iMX6Q KP_IMX6Q_TPC board configuration 11 #include <asm/arch/imx-regs.h> 13 #include <asm/arch/mx6-pins.h> 17 #include <asm/mach-imx/boot_mode.h> 18 #include <asm/mach-imx/iomux-v3.h> 19 #include <asm/mach-imx/mxc_i2c.h> 29 #include <usb/ehci-ci.h> 71 gd->ram_size = imx_ddr_size(); in dram_init() 77 * Use always serial for U-Boot console [all …]
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/openbmc/linux/Documentation/devicetree/bindings/usb/ |
H A D | ci-hdrc-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xu Yang <xu.yang_2@nxp.com> 11 - Peng Fan <peng.fan@nxp.com> 16 - enum: 17 - chipidea,usb2 18 - lsi,zevio-usb 19 - nuvoton,npcm750-udc [all …]
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/openbmc/linux/drivers/usb/phy/ |
H A D | phy-mxs-usb.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2012-2014 Freescale Semiconductor, Inc. 72 /* Anatop Registers */ 188 { .compatible = "fsl,imx6sx-usbphy", .data = &imx6sx_phy_data, }, 189 { .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, }, 190 { .compatible = "fsl,imx6q-usbphy", .data = &imx6q_phy_data, }, 191 { .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, }, 192 { .compatible = "fsl,vf610-usbphy", .data = &vf610_phy_data, }, 193 { .compatible = "fsl,imx6ul-usbphy", .data = &imx6ul_phy_data, }, 194 { .compatible = "fsl,imx7ulp-usbphy", .data = &imx7ulp_phy_data, }, [all …]
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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/openbmc/u-boot/board/toradex/colibri-imx6ull/ |
H A D | colibri-imx6ull.c | 1 // SPDX-License-Identifier: GPL-2.0+ 8 #include <asm/arch/imx-regs.h> 9 #include <asm/arch-mx6/clock.h> 10 #include <asm/arch-mx6/imx-regs.h> 11 #include <asm/arch-mx6/mx6ull_pins.h> 14 #include <asm/mach-imx/boot_mode.h> 15 #include <asm/mach-imx/iomux-v3.h> 30 #include <usb/ehci-ci.h> 31 #include "../common/tdx-common.h" 60 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); in dram_init() [all …]
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/openbmc/u-boot/board/toradex/colibri_imx7/ |
H A D | colibri_imx7.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2016-2018 Toradex AG 8 #include <asm/arch/imx-regs.h> 9 #include <asm/arch/mx7-pins.h> 12 #include <asm/mach-imx/iomux-v3.h> 28 #include <usb/ehci-ci.h> 29 #include "../common/tdx-common.h" 52 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, imx_ddr_size()); in dram_init() 213 * Use 50M anatop REF_CLK1 for ENET1, clear gpr1[13], set gpr1[17] in setup_fec() 216 clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], in setup_fec() [all …]
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