/openbmc/linux/Documentation/devicetree/bindings/pwm/ |
H A D | imx-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX PWM controller 10 - Philipp Zabel <p.zabel@pengutronix.de> 13 - $ref: pwm.yaml# 16 "#pwm-cells": 18 Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml 21 - 2 [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx27.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include "imx27-pinfunc.h" 7 #include <dt-bindings/clock/imx27-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 43 aitc: aitc-interrupt-controller@10040000 { [all …]
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H A D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx51-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 42 tzic: tz-interrupt-controller@e0000000 { [all …]
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H A D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6ul-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6ul-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 57 #address-cells = <1>; [all …]
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H A D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
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H A D | imx31.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright 2016-2018 Vladimir Zapolskiy <vz@mleia.com> 4 // Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 * pre-existing /chosen node to be available to insert the 34 #address-cells = <1>; 35 #size-cells = <0>; 38 compatible = "arm,arm1136jf-s"; 44 avic: interrupt-controller@68000000 { [all …]
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H A D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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H A D | imx50.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include "imx50-pinfunc.h" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/imx5-clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a8"; [all …]
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H A D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
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H A D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; [all …]
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H A D | imx27-apf27dev.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2013 Armadeus Systems - <support@armadeus.com> 7 #include "imx27-apf27.dts" 11 compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27"; 14 model = "Chimei-LW700AT9003"; 15 bits-per-pixel = <16>; /* non-standard but required */ 16 fsl,pcr = <0xfae80083>; /* non-standard but required */ 17 display-timings { 18 native-mode = <&timing0>; 20 clock-frequency = <33000033>; [all …]
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H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
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H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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H A D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | imx6ul.dtsi | 9 #include <dt-bindings/clock/imx6ul-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6ul-pinfunc.h" 54 #address-cells = <1>; 55 #size-cells = <0>; 58 compatible = "arm,cortex-a7"; 61 clock-latency = <61036>; /* two CLK32 periods */ 62 operating-points = < [all …]
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H A D | imx6sx.dtsi | 9 #include <dt-bindings/clock/imx6sx-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6sx-pinfunc.h" 55 #address-cells = <1>; 56 #size-cells = <0>; 59 compatible = "arm,cortex-a9"; 62 next-level-cache = <&L2>; 63 operating-points = < [all …]
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H A D | imx6ull.dtsi | 2 * Copyright 2015-2016 Freescale Semiconductor, Inc. 9 #include <dt-bindings/clock/imx6ul-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include "imx6ull-pinfunc.h" 14 #include "imx6ull-pinfunc-snvs.h" 52 #address-cells = <1>; 53 #size-cells = <0>; 56 compatible = "arm,cortex-a7"; [all …]
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H A D | imx6sll.dtsi | 9 #include <dt-bindings/clock/imx6sll-clock.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include "imx6sll-pinfunc.h" 43 #address-cells = <1>; 44 #size-cells = <0>; 47 compatible = "arm,cortex-a9"; 50 next-level-cache = <&L2>; 51 operating-points = < 58 fsl,soc-operating-points = < [all …]
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H A D | imx6sl.dtsi | 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "imx6sl-pinfunc.h" 12 #include <dt-bindings/clock/imx6sl-clock.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 19 * pre-existing /chosen node to be available to insert the 21 * Also for U-Boot there must be a pre-existing /memory node. 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a9"; [all …]
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H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 16 * Also for U-Boot there must be a pre-existing /memory node. 55 compatible = "fsl,imx-ckil", "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <32768>; [all …]
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H A D | imx7s.dtsi | 5 * This file is dual-licensed: you can use it either under the terms 44 #include <dt-bindings/clock/imx7d-clock.h> 45 #include <dt-bindings/power/imx7-power.h> 46 #include <dt-bindings/gpio/gpio.h> 47 #include <dt-bindings/input/input.h> 48 #include <dt-bindings/interrupt-controller/arm-gic.h> 49 #include "imx7d-pinfunc.h" 52 #address-cells = <1>; 53 #size-cells = <1>; 56 * pre-existing /chosen node to be available to insert the [all …]
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 11 compatible = "simple-bus"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 lsio_mem_clk: clock-lsio-mem { 18 compatible = "fixed-clock"; 19 #clock-cells = <0>; [all …]
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H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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/openbmc/linux/drivers/pwm/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_PWM) += core.o 3 obj-$(CONFIG_PWM_SYSFS) += sysfs.o 4 obj-$(CONFIG_PWM_AB8500) += pwm-ab8500.o 5 obj-$(CONFIG_PWM_APPLE) += pwm-apple.o 6 obj-$(CONFIG_PWM_ATMEL) += pwm-atmel.o 7 obj-$(CONFIG_PWM_ATMEL_HLCDC_PWM) += pwm-atmel-hlcdc.o 8 obj-$(CONFIG_PWM_ATMEL_TCB) += pwm-atmel-tcb.o 9 obj-$(CONFIG_PWM_BCM_IPROC) += pwm-bcm-iproc.o 10 obj-$(CONFIG_PWM_BCM_KONA) += pwm-bcm-kona.o [all …]
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H A D | pwm-imx27.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * simple driver for PWM (Pulse Width Modulator) controller 5 * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com> 8 * - When disabled the output is driven to 0 independent of the configured 22 #include <linux/pwm.h> 25 #define MX3_PWMCR 0x00 /* PWM Control Register */ 26 #define MX3_PWMSR 0x04 /* PWM Status Register */ 27 #define MX3_PWMSAR 0x0C /* PWM Sample Register */ 28 #define MX3_PWMPR 0x10 /* PWM Period Register */ 29 #define MX3_PWMCNR 0x14 /* PWM Counter Register */ [all …]
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