Searched +full:iatu +full:- +full:capable (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | snps,dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller 17 # and make sure it's assigned with the vendor-specific compatible string. 21 const: snps,dw-pcie-ep 23 - compatible [all …]
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H A D | baikal,bt1-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/baikal,bt1-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Baikal-T1 PCIe Root Port Controller 10 - Serge Semin <fancer.lancer@gmail.com> 13 Embedded into Baikal-T1 SoC Root Complex controller with a single port 14 activated. It's based on the DWC RC PCIe v4.60a IP-core, which is configured 15 to have just a single Root Port function and is capable of establishing the 18 performed by software. There four in- and four outbound iATU regions [all …]
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H A D | snps,dw-pcie.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 16 # Please create a separate DT-schema for your DWC PCIe Root Port controller 17 # and make sure it's assigned with the vendor-specific compatible string. 21 const: snps,dw-pcie 23 - compatible [all …]
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H A D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 23 Interface - DBI. In accordance with the reference manual the register 24 configuration space belongs to the Configuration-Dependent Module (CDM) 25 and is split up into several sub-parts Standard PCIe configuration 26 space, Port Logic Registers (PL), Shadow Config-space Registers, [all …]
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