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/openbmc/linux/drivers/net/ethernet/intel/e1000e/
H A Dmac.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
7 * e1000e_get_bus_info_pcie - Get PCIe bus information
8 * @hw: pointer to the HW structure
14 s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw) in e1000e_get_bus_info_pcie() argument
16 struct e1000_mac_info *mac = &hw->mac; in e1000e_get_bus_info_pcie()
17 struct e1000_bus_info *bus = &hw->bus; in e1000e_get_bus_info_pcie()
18 struct e1000_adapter *adapter = hw->adapter; in e1000e_get_bus_info_pcie()
21 cap_offset = adapter->pdev->pcie_cap; in e1000e_get_bus_info_pcie()
23 bus->width = e1000_bus_width_unknown; in e1000e_get_bus_info_pcie()
[all …]
H A D82571.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
22 static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);
23 static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);
24 static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);
25 static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw);
26 static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
28 static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);
29 static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);
30 static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);
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H A Dphy.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
7 static s32 e1000_wait_autoneg(struct e1000_hw *hw);
8 static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
11 static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
37 * e1000e_check_reset_block_generic - Check if PHY reset is blocked
38 * @hw: pointer to the HW structure
44 s32 e1000e_check_reset_block_generic(struct e1000_hw *hw) in e1000e_check_reset_block_generic() argument
54 * e1000e_get_phy_id - Retrieve the PHY ID and revision
55 * @hw: pointer to the HW structure
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H A Dich8lan.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
5 * 82562G-2 10/100 Network Connection
7 * 82562GT-2 10/100 Network Connection
9 * 82562V-2 10/100 Network Connection
10 * 82566DC-2 Gigabit Network Connection
12 * 82566DM-2 Gigabit Network Connection
19 * 82567LM-2 Gigabit Network Connection
20 * 82567LF-2 Gigabit Network Connection
21 * 82567V-2 Gigabit Network Connection
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/openbmc/linux/drivers/net/ethernet/intel/e1000/
H A De1000_hw.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
11 static s32 e1000_check_downshift(struct e1000_hw *hw);
12 static s32 e1000_check_polarity(struct e1000_hw *hw,
14 static void e1000_clear_hw_cntrs(struct e1000_hw *hw);
15 static void e1000_clear_vfta(struct e1000_hw *hw);
16 static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw,
18 static s32 e1000_config_fc_after_link_up(struct e1000_hw *hw);
19 static s32 e1000_detect_gig_phy(struct e1000_hw *hw);
20 static s32 e1000_get_auto_rd_done(struct e1000_hw *hw);
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/openbmc/linux/drivers/net/ethernet/intel/igc/
H A Digc_mac.c1 // SPDX-License-Identifier: GPL-2.0
11 * igc_disable_pcie_master - Disables PCI-express master access
12 * @hw: pointer to the HW structure
14 * Returns 0 (0) if successful, else returns -10
15 * (-IGC_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
18 * Disables PCI-Express master access and verifies there are no pending
21 s32 igc_disable_pcie_master(struct igc_hw *hw) in igc_disable_pcie_master() argument
25 u32 ctrl; in igc_disable_pcie_master() local
27 ctrl = rd32(IGC_CTRL); in igc_disable_pcie_master()
28 ctrl |= IGC_CTRL_GIO_MASTER_DISABLE; in igc_disable_pcie_master()
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H A Digc_phy.c1 // SPDX-License-Identifier: GPL-2.0
8 * igc_check_reset_block - Check if PHY reset is blocked
9 * @hw: pointer to the HW structure
15 s32 igc_check_reset_block(struct igc_hw *hw) in igc_check_reset_block() argument
26 * igc_get_phy_id - Retrieve the PHY ID and revision
27 * @hw: pointer to the HW structure
32 s32 igc_get_phy_id(struct igc_hw *hw) in igc_get_phy_id() argument
34 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id()
38 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
42 phy->id = (u32)(phy_id << 16); in igc_get_phy_id()
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H A Digc_base.c1 // SPDX-License-Identifier: GPL-2.0
13 * igc_reset_hw_base - Reset hardware
14 * @hw: pointer to the HW structure
19 static s32 igc_reset_hw_base(struct igc_hw *hw) in igc_reset_hw_base() argument
22 u32 ctrl; in igc_reset_hw_base() local
24 /* Prevent the PCI-E bus from sticking if there is no TLP connection in igc_reset_hw_base()
27 ret_val = igc_disable_pcie_master(hw); in igc_reset_hw_base()
29 hw_dbg("PCI-E Master disable polling has failed\n"); in igc_reset_hw_base()
40 ctrl = rd32(IGC_CTRL); in igc_reset_hw_base()
43 wr32(IGC_CTRL, ctrl | IGC_CTRL_RST); in igc_reset_hw_base()
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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dst,stm32-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
35 description: enable hardware flow control (deprecated)
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H A Dst-asc.txt1 *st-asc(Serial Port)
4 - compatible : Should be "st,asc".
5 - reg, reg-names, interrupts, interrupt-names : Standard way to define device
7 Documentation/devicetree/bindings/resource-names.txt
10 - st,hw-flow-ctrl bool flag to enable hardware flow control.
11 - st,force-m1 bool flat to force asc to be in Mode-1 recommended
/openbmc/u-boot/drivers/net/
H A De1000.c1 // SPDX-License-Identifier: GPL-2.0+
3 Intel Pro 1000 for ppcboot/das-u-boot
4 Drivers are port from Intel's Linux driver e1000-4.3.15
11 Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.
16 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
60 * Normally U-Boot does not support this anyway. To fix it in this driver,
127 static int e1000_setup_link(struct e1000_hw *hw);
128 static int e1000_setup_fiber_link(struct e1000_hw *hw);
129 static int e1000_setup_copper_link(struct e1000_hw *hw);
130 static int e1000_phy_setup_autoneg(struct e1000_hw *hw);
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/openbmc/linux/drivers/net/ethernet/intel/igb/
H A De1000_mac.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
14 static s32 igb_set_default_fc(struct e1000_hw *hw);
15 static void igb_set_fc_watermarks(struct e1000_hw *hw);
18 * igb_get_bus_info_pcie - Get PCIe bus information
19 * @hw: pointer to the HW structure
25 s32 igb_get_bus_info_pcie(struct e1000_hw *hw) in igb_get_bus_info_pcie() argument
27 struct e1000_bus_info *bus = &hw->bus; in igb_get_bus_info_pcie()
32 bus->type = e1000_bus_type_pci_express; in igb_get_bus_info_pcie()
34 ret_val = igb_read_pcie_cap_reg(hw, in igb_get_bus_info_pcie()
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H A De1000_phy.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
10 static s32 igb_phy_setup_autoneg(struct e1000_hw *hw);
11 static void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw,
13 static s32 igb_wait_autoneg(struct e1000_hw *hw);
14 static s32 igb_set_master_slave_mode(struct e1000_hw *hw);
31 * igb_check_reset_block - Check if PHY reset is blocked
32 * @hw: pointer to the HW structure
38 s32 igb_check_reset_block(struct e1000_hw *hw) in igb_check_reset_block() argument
48 * igb_get_phy_id - Retrieve the PHY ID and revision
[all …]
/openbmc/qemu/hw/dma/
H A Dpl080.c11 #include "hw/sysbus.h"
15 #include "hw/dma/pl080.h"
16 #include "hw/hw.h"
17 #include "hw/irq.h"
18 #include "hw/qdev-properties.h"
46 VMSTATE_UINT32(ctrl, pl080_channel),
83 bool tclevel = (s->tc_int & s->tc_mask); in pl080_update()
84 bool errlevel = (s->err_int & s->err_mask); in pl080_update()
86 qemu_set_irq(s->interr, errlevel); in pl080_update()
87 qemu_set_irq(s->inttc, tclevel); in pl080_update()
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/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_82598.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
18 static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
21 static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
25 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
26 * @hw: pointer to the HW structure
30 * than the 10ms recommended by the pci-e spec. To address this we need to
34 static void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw) in ixgbe_set_pcie_completion_timeout() argument
36 u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR); in ixgbe_set_pcie_completion_timeout()
39 if (ixgbe_removed(hw->hw_addr)) in ixgbe_set_pcie_completion_timeout()
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H A Dixgbe_82599.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
19 static void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
20 static void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
21 static void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
24 static s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
27 static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
28 static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
30 static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
33 static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,
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H A Dixgbe_x550.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
15 static s32 ixgbe_get_invariants_X550_x(struct ixgbe_hw *hw) in ixgbe_get_invariants_X550_x() argument
17 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_get_invariants_X550_x()
18 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_get_invariants_X550_x()
19 struct ixgbe_link_info *link = &hw->link; in ixgbe_get_invariants_X550_x()
22 ixgbe_get_invariants_X540(hw); in ixgbe_get_invariants_X550_x()
24 if (mac->ops.get_media_type(hw) != ixgbe_media_type_copper) in ixgbe_get_invariants_X550_x()
25 phy->ops.set_phy_power = NULL; in ixgbe_get_invariants_X550_x()
27 link->addr = IXGBE_CS4227; in ixgbe_get_invariants_X550_x()
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/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp157a-iot-box.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "stm32mp157a-stinger96.dtsi"
11 compatible = "shiratech,stm32mp157a-iot-box", "st,stm32mp157";
13 wlan_pwr: regulator-wlan {
14 compatible = "regulator-fixed";
16 regulator-name = "wl-reg";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
21 enable-active-high;
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/openbmc/linux/drivers/net/ethernet/netronome/nfp/flower/
H A Dcmsg.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
18 return (struct nfp_flower_cmsg_hdr *)skb->data; in nfp_flower_cmsg_get_hdr()
35 ch->pad = 0; in nfp_flower_cmsg_alloc()
36 ch->version = NFP_FLOWER_CMSG_VER1; in nfp_flower_cmsg_alloc()
37 ch->type = type; in nfp_flower_cmsg_alloc()
55 memset(msg->reserved, 0, sizeof(msg->reserved)); in nfp_flower_cmsg_mac_repr_start()
56 msg->num_ports = num_ports; in nfp_flower_cmsg_mac_repr_start()
69 msg->ports[idx].idx = idx; in nfp_flower_cmsg_mac_repr_add()
70 msg->ports[idx].info = nbi & NFP_FLOWER_CMSG_MAC_REPR_NBI; in nfp_flower_cmsg_mac_repr_add()
[all …]
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/en_accel/
H A Dipsec_offload.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
43 (mdev->priv.steering->mode == MLX5_FLOW_STEERING_MODE_DMFS || in mlx5_ipsec_device_caps()
44 (mdev->priv.steering->mode == MLX5_FLOW_STEERING_MODE_SMFS && in mlx5_ipsec_device_caps()
84 * because we use up to 24 bit in flow table metadata in mlx5_ipsec_device_caps()
95 struct mlx5_accel_esp_xfrm_attrs *attrs = &sa_entry->attrs; in mlx5e_ipsec_packet_setup()
99 if (attrs->replay_esn.trigger) { in mlx5e_ipsec_packet_setup()
102 if (attrs->dir == XFRM_DEV_OFFLOAD_IN) { in mlx5e_ipsec_packet_setup()
104 attrs->replay_esn.replay_window); in mlx5e_ipsec_packet_setup()
109 attrs->replay_esn.esn); in mlx5e_ipsec_packet_setup()
117 * in flow steering to perform matching against. Please be in mlx5e_ipsec_packet_setup()
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/openbmc/linux/samples/pktgen/
H A Dpktgen_sample03_burst_single_flow.sh2 # SPDX-License-Identifier: GPL-2.0
4 # Script for max single flow performance
5 # - If correctly tuned[1], single CPU 10G wirespeed small pkts is possible[2]
7 # Using pktgen "burst" option (use -b $N)
8 # - To boost max performance
9 # - Avail since: kernel v3.18
10 # * commit 38b2cf2982dc73 ("net: pktgen: packet bursting via skb->xmit_more")
11 # - This avoids writing the HW tailptr on every driver xmit
12 # - The performance boost is impressive, see commit and blog [2]
14 # Notice: On purpose generates a single (UDP) flow towards target,
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/openbmc/linux/drivers/net/ethernet/marvell/
H A Dsky2.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * of the original driver such as link fail-over and link management because
19 #include <linux/dma-mapping.h>
53 #define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
69 #define RING_NEXT(x, s) (((x)+1) & ((s)-1))
76 static int debug = -1; /* defaults above */
84 static int disable_msi = -1;
93 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
94 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
95 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
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H A Dskge.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * of the original driver such as link fail-over and link management because
28 #include <linux/dma-mapping.h>
60 MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
68 static int debug = -1; /* defaults above */
76 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x4300) }, /* SK-9xx */
78 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x4320) }, /* SK-98xx V2.0 */
79 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b01) }, /* D-Link DGE-530T (rev.B) */
80 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4c00) }, /* D-Link DGE-530T */
81 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4302) }, /* D-Link DGE-530T Rev C1 */
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/openbmc/linux/drivers/usb/serial/
H A Dark3116.c1 // SPDX-License-Identifier: GPL-2.0+
9 * - implements a driver for the arkmicro ark3116 chipset (vendor=0x6547,
10 * productid=0x0232) (used in a datacable called KQ-U8A)
12 * Supports full modem status lines, break, hardware flow control. Does not
13 * support software flow control, since I do not know how to enable it in hw.
52 struct usb_device *dev = serial->dev; in is_irda()
53 if (le16_to_cpu(dev->descriptor.idVendor) == 0x18ec && in is_irda()
54 le16_to_cpu(dev->descriptor.idProduct) == 0x3118) in is_irda()
62 /* protects hw register updates */
82 result = usb_control_msg(serial->dev, in ark3116_write_reg()
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/openbmc/linux/drivers/net/ethernet/atheros/atlx/
H A Datl2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2006 - 2007 Atheros Corporation. All rights reserved.
4 * Copyright(c) 2007 - 2008 Chris Snook <csnook@redhat.com>
7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
12 #include <linux/dma-mapping.h>
47 * atl2_pci_tbl - PCI Device ID Table
59 * atl2_sw_init - Initialize general software structures (struct atl2_adapter)
68 struct atl2_hw *hw = &adapter->hw; in atl2_sw_init() local
69 struct pci_dev *pdev = adapter->pdev; in atl2_sw_init()
72 hw->vendor_id = pdev->vendor; in atl2_sw_init()
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