/openbmc/linux/Documentation/admin-guide/hw-vuln/ |
H A D | l1tf.rst | 148 'L1D vulnerable' L1D flushing is disabled 176 Flushing the L1D evicts not only the data which should not be accessed 178 data. Flushing the L1D has a performance impact as the processor has to 191 The conditional mode avoids L1D flushing after VMEXITs which execute 373 the hypervisors, i.e. unconditional L1D flushing 386 mitigation, i.e. conditional L1D flushing 395 i.e. conditional L1D flushing. 413 The default is 'flush'. For details about L1D flushing see :ref:`l1d_flush`. 421 The KVM hypervisor mitigation mechanism, flushing the L1D cache when 466 To avoid the overhead of the default L1D flushing on VMENTER the [all …]
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H A D | l1d_flush.rst | 1 L1D Flushing 38 If the underlying CPU supports L1D flushing in hardware, the hardware 66 **NOTE** : The opt-in of a task for L1D flushing works only when the task's 68 requested L1D flushing is scheduled on a SMT-enabled core the kernel sends
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/openbmc/linux/fs/btrfs/ |
H A D | space-info.c | 63 * MAKING RESERVATIONS, FLUSHING NORMALLY (non-priority) 92 * MAKING RESERVATIONS, FLUSHING HIGH PRIORITY 99 * THE FLUSHING STATES 369 * If we aren't flushing all things, let us overcommit up to in calc_available_free_space() 602 * flushing loops and hope for the best. Delalloc will expand in shrink_delalloc() 634 * marked clean. We don't use filemap_fwrite for flushing in shrink_delalloc() 680 * flushing so we can stop flushing if we decide we don't need in shrink_delalloc() 825 * We may be flushing because suddenly we have less space than we had in btrfs_calc_reclaim_metadata_size() 828 * appropriate pressure on the flushing state machine. in btrfs_calc_reclaim_metadata_size() 861 * that devoted to other reservations then there's no sense in flushing, in need_preemptive_reclaim() [all …]
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/openbmc/linux/Documentation/core-api/ |
H A D | cachetlb.rst | 2 Cache and TLB Flushing Under Linux 7 This document describes the cache/tlb flushing interfaces called 17 thinking SMP cache/tlb flushing must be so inefficient, this is in 23 First, the TLB flushing interfaces, since they are the simplest. The 56 Here we are flushing a specific range of (user) virtual 108 Next, we have the cache flushing interfaces. In general, when Linux 130 The cache flushing routines below need only deal with cache flushing 165 Here we are flushing a specific range of (user) virtual 215 Here in these two interfaces we are flushing a specific range 343 Any necessary cache flushing or other coherency operations [all …]
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/openbmc/linux/arch/x86/include/asm/ |
H A D | mmu.h | 31 * Any code that needs to do any sort of TLB flushing for this 34 * flushing code keep track of what needs flushing.
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H A D | set_memory.h | 25 * - Flushing TLBs 26 * - Flushing CPU caches
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/openbmc/linux/arch/parisc/include/asm/ |
H A D | tlbflush.h | 5 /* TLB flushing routines.... */ 33 * and not flushing the whole tlb. 41 /* Except for very small threads, flushing the whole TLB is in flush_tlb_mm()
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/openbmc/linux/Documentation/arch/x86/ |
H A D | pti.rst | 96 allows us to skip flushing the entire TLB when switching page 119 h. INVPCID is a TLB-flushing instruction which allows flushing 123 flushing a kernel address, we need to flush all PCIDs, so a 124 single kernel address flush will require a TLB-flushing CR3
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/openbmc/qemu/util/ |
H A D | cacheflush.c | 2 * Info about, and flushing the host cpu caches. 139 * entire hierarchy, and is used by userspace cache flushing. in arch_cache_info() 225 * Architecture (+ OS) specific cache flushing mechanisms. 230 /* Caches are coherent and do not require flushing; symbol inline. */ 325 * flushing procedure. See in flush_idcache_range()
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/openbmc/linux/arch/openrisc/include/asm/ |
H A D | cacheflush.h | 20 * Helper function for flushing or invalidating entire pages from data 28 * Data cache flushing always happen on the local cpu. Instruction cache
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/openbmc/linux/arch/arm/mm/ |
H A D | mm.h | 15 * is reserved for VIPT aliasing flushing by generic code. 22 /* PFN alias flushing, for VIPT caches */
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/openbmc/linux/arch/powerpc/mm/nohash/ |
H A D | tlb.c | 3 * This file contains the routines for TLB flushing. 120 * Base TLB flushing operations: 133 * These are the base non-SMP variants of page and mm flushing 318 * Currently, for range flushing, we just do a full mm flush. This should
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/openbmc/linux/arch/powerpc/include/asm/nohash/ |
H A D | tlbflush.h | 6 * TLB flushing: 19 * TLB flushing for software loaded TLB chips
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/openbmc/linux/drivers/md/bcache/ |
H A D | journal.h | 25 * moving gc we work around it by flushing the btree to disk before updating the 74 * If the journal fills up, we start flushing dirty btree nodes until we can 75 * allocate space for a journal write again - preferentially flushing btree
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/openbmc/linux/arch/powerpc/mm/book3s32/ |
H A D | tlb.c | 3 * This file contains the routines for TLB flushing. 33 * TLB flushing:
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/openbmc/linux/arch/sh/mm/ |
H A D | tlbflush_32.c | 2 * TLB flushing operations for SH with an MMU. 130 * This is the most destructive of the TLB flushing options, in __flush_tlb_global()
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/openbmc/linux/arch/sh/include/asm/ |
H A D | cacheflush.h | 8 * Cache flushing: 12 * - flush_cache_dup mm(mm) handles cache flushing when forking
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/openbmc/linux/drivers/ssb/ |
H A D | driver_gige.c | 212 /* Write flushing is controlled by the Flush Status Control register. in ssb_gige_probe() 214 * to disable the IRQ mask while flushing to avoid concurrency. in ssb_gige_probe() 215 * Note that automatic write flushing does _not_ work from in ssb_gige_probe()
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/openbmc/linux/mm/ |
H A D | percpu-vm.c | 122 * unmapped. Flush cache. As each flushing trial can be very 180 * returned to vmalloc as vmalloc will handle TLB flushing lazily. 182 * As with pcpu_pre_unmap_flush(), TLB flushing also is done at once 252 * As with pcpu_pre_unmap_flush(), TLB flushing also is done at once
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/openbmc/linux/include/trace/events/ |
H A D | jbd2.h | 261 __field( unsigned long, flushing ) 275 __entry->flushing = stats->rs_flushing; 283 "locked %u flushing %u logging %u handle_count %u " 290 jiffies_to_msecs(__entry->flushing),
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/openbmc/linux/Documentation/block/ |
H A D | writeback_cache_control.rst | 45 worry if the underlying devices need any explicit cache flushing and how 71 driver needs to tell the block layer that it supports flushing caches by
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/openbmc/linux/Documentation/networking/devlink/ |
H A D | mlx5.rst | 145 Recover by flushing the tx queue and reset it. 148 Recover by flushing and re-creating all PTP channels. 178 Recover (if needed) by flushing the related queue and reset it.
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/openbmc/linux/drivers/gpu/drm/i915/gem/ |
H A D | i915_gem_object_types.h | 144 * up over-flushing in some places. 424 * engine we only need to care about flushing any writes through the CPU 437 * flushing the surface just before doing the scanout. This does mean 495 * flushing might be needed at various points. 497 * Another part of @cache_dirty is managing flushing when first 504 * whether we actually need apply the big sledgehammer of flushing all
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/openbmc/linux/arch/mips/include/asm/ |
H A D | cacheflush.h | 16 /* Cache flushing: 20 * - flush_cache_dup mm(mm) handles cache flushing when forking
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/openbmc/linux/drivers/accessibility/speakup/ |
H A D | synth.c | 41 .flushing = 0, 78 if (speakup_info.flushing) { in _spk_do_catch_up() 79 speakup_info.flushing = 0; in _spk_do_catch_up() 199 speakup_info.flushing = 1; in spk_do_flush()
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