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/openbmc/linux/drivers/net/ethernet/marvell/prestera/
H A Dprestera_counter.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
40 COUNTER_FLAG_READY = 0,
47 return block->counter_flag[id - block->offset] == COUNTER_FLAG_READY; in prestera_counter_is_ready()
50 static void prestera_counter_lock(struct prestera_counter *counter) in prestera_counter_lock() argument
52 mutex_lock(&counter->mtx); in prestera_counter_lock()
55 static void prestera_counter_unlock(struct prestera_counter *counter) in prestera_counter_unlock() argument
57 mutex_unlock(&counter->mtx); in prestera_counter_unlock()
62 mutex_lock(&block->mtx); in prestera_counter_block_lock()
67 mutex_unlock(&block->mtx); in prestera_counter_block_unlock()
72 return refcount_inc_not_zero(&block->refcnt); in prestera_counter_block_incref()
[all …]
/openbmc/linux/drivers/comedi/drivers/
H A Dni_tio.c1 // SPDX-License-Identifier: GPL-2.0+
11 * Author: J.P. Mellor <jpmellor@rose-hulman.edu>,
19 * This module is not used directly by end-users. Rather, it
22 * originally based on the counter code from ni_660x.c and
26 * DAQ 660x Register-Level Programmer Manual (NI 370505A-01)
27 * DAQ 6601/6602 User Manual (NI 322137B-01)
28 * 340934b.pdf DAQ-STC reference manual
42 #define NI_M_TIMEBASE_1_CLK 0x0 /* 20MHz */
43 #define NI_M_PFI_CLK(x) (((x) < 10) ? (1 + (x)) : (0xb + (x)))
44 #define NI_M_RTSI_CLK(x) (((x) == 7) ? 0x1b : (0xb + (x)))
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H A Dni_tiocmd.c1 // SPDX-License-Identifier: GPL-2.0+
11 * Author: J.P. Mellor <jpmellor@rose-hulman.edu>,
19 * This module is not used directly by end-users. Rather, it
26 * DAQ 660x Register-Level Programmer Manual (NI 370505A-01)
27 * DAQ 6601/6602 User Manual (NI 322137B-01)
28 * 340934b.pdf DAQ-STC reference manual
38 static void ni_tio_configure_dma(struct ni_gpct *counter, in ni_tio_configure_dma() argument
41 struct ni_gpct_device *counter_dev = counter->counter_dev; in ni_tio_configure_dma()
42 unsigned int cidx = counter->counter_index; in ni_tio_configure_dma()
47 bits = 0; in ni_tio_configure_dma()
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H A Dcomedi_8254.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Generic 8254 timer/counter support
9 * COMEDI - Linux Control and Measurement Device Interface
15 * Description: Generic 8254 timer/counter support
20 * This module is not used directly by end-users. Rather, it is used by other
31 * comedi_device dev->pacer and will be freed by the comedi core during
42 * I8254_MODE1 Hardware retriggerable one-shot
53 * Writes an initial value to a counter.
55 * The largest possible initial count is 0; this is equivalent to 2^16
58 * NOTE: The counter does not stop when it reaches zero. In Mode 0, 1, 4,
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/openbmc/linux/tools/testing/selftests/netfilter/
H A Dnft_meta.sh5 # Kselftest framework requirement - SKIP code is 4.
7 sfx=$(mktemp -u "XXXXXXXX")
8 ns0="ns0-$sfx"
10 if ! nft --version > /dev/null 2>&1; then
21 ip -net "$ns0" link set lo up
22 ip -net "$ns0" addr add 127.0.0.1 dev lo
27 lastyear=$((currentyear-1))
28 ip netns exec "$ns0" nft -f /dev/stdin <<EOF
30 counter iifcount {}
31 counter iifnamecount {}
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/openbmc/linux/drivers/counter/
H A Dcounter-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * Generic Counter interface
7 #include <linux/counter.h>
22 #include "counter-chrdev.h"
23 #include "counter-sysfs.h"
25 #define COUNTER_NAME "counter"
27 /* Provides a unique ID for each counter device */
31 struct counter_device counter; member
42 struct counter_device *const counter = in counter_device_release() local
45 counter_chrdev_remove(counter); in counter_device_release()
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H A Dcounter-chrdev.c1 // SPDX-License-Identifier: GPL-2.0
3 * Generic Counter character device interface
7 #include <linux/counter.h>
24 #include "counter-chrdev.h"
68 struct counter_device *const counter = filp->private_data; in counter_chrdev_read() local
72 if (!counter->ops) in counter_chrdev_read()
73 return -ENODEV; in counter_chrdev_read()
76 return -EINVAL; in counter_chrdev_read()
79 if (kfifo_is_empty(&counter->events)) { in counter_chrdev_read()
80 if (filp->f_flags & O_NONBLOCK) in counter_chrdev_read()
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H A Dti-ecap-capture.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/counter.h>
24 #define ECAP_CEVT1 0
37 #define ECAP_TSCNT_REG 0x00
39 #define ECAP_CAP_REG(i) (((i) << 2) + 0x08)
41 #define ECAP_ECCTL_REG 0x28
43 #define ECAP_EV_MODE_MASK GENMASK(7, 0)
55 #define ECAP_ECINT_EN_FLG_REG 0x2c
59 #define ECAP_ECINT_CLR_FRC_REG 0x30
60 #define ECAP_INT_CLR_BIT BIT(0)
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H A Drz-mtu3-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas RZ/G2L MTU3a Counter driver
9 #include <linux/counter.h>
10 #include <linux/mfd/rz-mtu3.h>
23 * TCNT: Timer Counter
25 * TCNTLW: Timer Longword Counter
36 #define RZ_MTU3_TMDR1_PH_CNT_MODE_MASK (0xf)
40 * 0: 16-bit, 1: 32-bit
42 #define RZ_MTU3_TMDR3_LWA (0)
46 * 0: MTCLKA and MTCLKB, 1: MTCLKC and MTCLKD
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H A Dinterrupt-cnt.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/counter.h>
17 #define INTERRUPT_CNT_NAME "interrupt-cnt"
32 struct counter_device *counter = dev_id; in interrupt_cnt_isr() local
33 struct interrupt_cnt_priv *priv = counter_priv(counter); in interrupt_cnt_isr()
35 atomic_inc(&priv->count); in interrupt_cnt_isr()
37 counter_push_event(counter, COUNTER_EVENT_CHANGE_OF_STATE, 0); in interrupt_cnt_isr()
42 static int interrupt_cnt_enable_read(struct counter_device *counter, in interrupt_cnt_enable_read() argument
45 struct interrupt_cnt_priv *priv = counter_priv(counter); in interrupt_cnt_enable_read()
47 guard(mutex)(&priv->lock); in interrupt_cnt_enable_read()
[all …]
H A Dti-eqep.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Counter driver for Texas Instruments Enhanced Quadrature Encoder Pulse (eQEP)
10 #include <linux/counter.h>
19 /* 32-bit registers */
20 #define QPOSCNT 0x0
21 #define QPOSINIT 0x4
22 #define QPOSMAX 0x8
23 #define QPOSCMP 0xc
24 #define QPOSILAT 0x10
25 #define QPOSSLAT 0x14
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H A Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Timer Encoder and Counter driver
10 #include <linux/counter.h>
11 #include <linux/mfd/stm32-timers.h>
18 #define TIM_CCMR_CCXS (BIT(8) | BIT(0))
46 static int stm32_count_read(struct counter_device *counter, in stm32_count_read() argument
49 struct stm32_timer_cnt *const priv = counter_priv(counter); in stm32_count_read()
52 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
55 return 0; in stm32_count_read()
58 static int stm32_count_write(struct counter_device *counter, in stm32_count_write() argument
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H A Di8254.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/counter.h>
21 #define I8254_CONTROL_REG 0x3
30 #define I8254_RW_TWO_BYTE 0x3
31 #define I8254_MODE_INTERRUPT_ON_TERMINAL_COUNT 0
38 #define I8254_COUNTER_LATCH(_counter) I8254_CONTROL(_counter, 0x0, 0x0)
44 * struct i8254 - I8254 device private data structure
46 * @preset: array of Counter Register states
57 static int i8254_count_read(struct counter_device *const counter, struct counter_count *const count, in i8254_count_read() argument
60 struct i8254 *const priv = counter_priv(counter); in i8254_count_read()
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H A Dcounter-sysfs.c1 // SPDX-License-Identifier: GPL-2.0
3 * Generic Counter sysfs interface
6 #include <linux/counter.h>
20 #include "counter-sysfs.h"
28 * struct counter_attribute - Counter sysfs attribute
30 * @l: node to add Counter attribute to attribute group list
31 * @comp: Counter component callbacks and data
32 * @scope: Counter scope of the attribute
48 * struct counter_attribute_group - container for attribute group
62 [COUNTER_FUNCTION_PULSE_DIRECTION] = "pulse-direction",
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H A Dstm32-lptimer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Encoder and Counter driver
9 * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
14 #include <linux/counter.h>
15 #include <linux/mfd/stm32-lptimer.h>
37 ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val); in stm32_lptim_is_enabled()
51 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val); in stm32_lptim_set_enable_state()
56 clk_disable(priv->clk); in stm32_lptim_set_enable_state()
57 priv->enabled = false; in stm32_lptim_set_enable_state()
58 return 0; in stm32_lptim_set_enable_state()
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H A D104-quad-8.c1 // SPDX-License-Identifier: GPL-2.0
3 * Counter driver for the ACCES 104-QUAD-8
6 * This driver supports the ACCES 104-QUAD-8 and ACCES 104-QUAD-4.
10 #include <linux/counter.h>
31 module_param_hw_array(base, uint, ioport, &num_quad8, 0);
32 MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
36 module_param_hw_array(irq, uint, irq, &num_irq, 0);
37 MODULE_PARM_DESC(irq, "ACCES 104-QUAD-8 interrupt line numbers");
43 #define QUAD8_INTERRUPT_STATUS 0x10
44 #define QUAD8_CHANNEL_OPERATION 0x11
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H A Dftm-quaddec.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/counter.h>
37 if (ftm->big_endian) in ftm_read()
38 *data = ioread32be(ftm->ftm_base + offset); in ftm_read()
40 *data = ioread32(ftm->ftm_base + offset); in ftm_read()
45 if (ftm->big_endian) in ftm_write()
46 iowrite32be(data, ftm->ftm_base + offset); in ftm_write()
48 iowrite32(data, ftm->ftm_base + offset); in ftm_write()
70 /* Reset hardware counter to CNTIN */ in ftm_reset_counter()
71 ftm_write(ftm, FTM_CNT, 0x0); in ftm_reset_counter()
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/openbmc/linux/drivers/infiniband/core/
H A Dcounters.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
19 return -EINVAL; in __counter_set_mode()
20 if (port_counter->num_counters) in __counter_set_mode()
21 return -EBUSY; in __counter_set_mode()
24 port_counter->mode.mode = new_mode; in __counter_set_mode()
25 port_counter->mode.mask = new_mask; in __counter_set_mode()
26 return 0; in __counter_set_mode()
30 * rdma_counter_set_auto_mode() - Turn on/off per-port auto mode
37 * Return 0 on success. If counter mode wasn't changed then it is considered
39 * Return -EBUSY when changing to auto mode while there are bounded counters.
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/openbmc/linux/arch/arm/include/asm/
H A Datomic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
25 #define arch_atomic_read(v) READ_ONCE((v)->counter)
26 #define arch_atomic_set(v,i) WRITE_ONCE(((v)->counter), (i))
42 prefetchw(&v->counter); \
44 "1: ldrex %0, [%3]\n" \
45 " " #asm_op " %0, %0, %4\n" \
46 " strex %1, %0, [%3]\n" \
47 " teq %1, #0\n" \
49 : "=&r" (result), "=&r" (tmp), "+Qo" (v->counter) \
50 : "r" (&v->counter), "Ir" (i) \
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/openbmc/linux/mm/
H A Dpage_counter.c1 // SPDX-License-Identifier: GPL-2.0
22 if (!c->parent) in propagate_protected_usage()
25 protected = min(usage, READ_ONCE(c->min)); in propagate_protected_usage()
26 old_protected = atomic_long_read(&c->min_usage); in propagate_protected_usage()
28 old_protected = atomic_long_xchg(&c->min_usage, protected); in propagate_protected_usage()
29 delta = protected - old_protected; in propagate_protected_usage()
31 atomic_long_add(delta, &c->parent->children_min_usage); in propagate_protected_usage()
34 protected = min(usage, READ_ONCE(c->low)); in propagate_protected_usage()
35 old_protected = atomic_long_read(&c->low_usage); in propagate_protected_usage()
37 old_protected = atomic_long_xchg(&c->low_usage, protected); in propagate_protected_usage()
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/openbmc/linux/tools/perf/
H A Ddesign.txt3 ------------------------------
7 as instructions executed, cachemisses suffered, or branches mis-predicted -
9 trigger interrupts when a threshold number of events have passed - and can
12 The Linux Performance Counter subsystem provides an abstraction of these
13 hardware capabilities. It provides per task and per CPU counters, counter
15 provides "virtual" 64-bit counters, regardless of the width of the
19 There's one file descriptor per virtual counter used.
29 VFS system calls: read() can be used to read the counter, fcntl()
35 When creating a new counter fd, 'perf_event_attr' is:
40 * specific (raw) counter configuration data, if unset, the next
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/openbmc/u-boot/include/asm-generic/
H A Datomic.h1 /* SPDX-License-Identifier: GPL-2.0+ */
6 typedef struct { volatile int counter; } atomic_t; member
8 typedef struct { volatile long long counter; } atomic64_t; member
10 typedef struct { volatile long counter; } atomic64_t; member
15 #define atomic_read(v) ((v)->counter)
16 #define atomic_set(v, i) ((v)->counter = (i))
22 unsigned long flags = 0; in atomic_add()
25 v->counter += i; in atomic_add()
31 unsigned long flags = 0; in atomic_sub()
34 v->counter -= i; in atomic_sub()
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/openbmc/openbmc-test-automation/ipmi/
H A Dtest_ipmi_poh_counter.robot2 Documentation This suite tests IPMI POH Counter Support in OpenBMC.
3 ... Feature: IPMI POH Counter Support
5 ... POH (Power-On Hours) counter is the incremental count of power ON
10 ... Testcases added -
11 ... Get POH Counter Command Via IPMI
12 ... Verify Get POH Counter With Invalid Data Request Via IPMI
13 ... Verify POH Counter Reading With Wait Time
14 ... Verify POH Counter Reading With Host Power Off
15 ... Verify POH Counter Reading With Host Power On
17 ... Script compares Minutes per count and Counter reading for the above scenarios.
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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dfs_counters.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
83 * dump (access to struct mlx5_fc) after a counter is destroyed.
85 * access to counter list:
86 * - create (user context)
87 * - mlx5_fc_create() only adds to an addlist to be used by
91 * - spawn thread to do the actual destroy
93 * - destroy (user context)
94 * - add a counter to lockless dellist
95 * - spawn thread to do the actual del
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/openbmc/linux/drivers/perf/
H A Dfsl_imx8_ddr_perf.c1 // SPDX-License-Identifier: GPL-2.0
18 #define COUNTER_CNTL 0x0
19 #define COUNTER_READ 0x20
21 #define COUNTER_DPCR1 0x30
23 #define CNTL_OVER 0x1
24 #define CNTL_CLEAR 0x2
25 #define CNTL_EN 0x4
26 #define CNTL_EN_MASK 0xFFFFFFFB
27 #define CNTL_CLEAR_MASK 0xFFFFFFFD
28 #define CNTL_OVER_MASK 0xFFFFFFFE
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