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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-adc-mt63603 Contact: gene_chen@richtek.com
6 Calculating with scale and offset returns voltage in uV
10 Contact: gene_chen@richtek.com
12 Indicated MT6360 VBUS ADC with lower accuracy(+-75mA)
14 Calculating with scale and offset returns voltage in uV
18 Contact: gene_chen@richtek.com
20 Indicated MT6360 VBUS ADC with higher accuracy(+-30mA)
22 Calculating with scale and offset returns voltage in uV
26 Contact: gene_chen@richtek.com
29 Calculating with scale and offset returns voltage in uV
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H A Ddebugfs-tpmi1 What: /sys/kernel/debug/tpmi-<n>/pfs_dump
4 Contact: srinivas.pandruvada@linux.intel.com
8 tpmi_id, number of entries, entry size, offset, vsec offset, lock status
12 What: /sys/kernel/debug/tpmi-<n>/tpmi-id-<n>/mem_dump
15 Contact: srinivas.pandruvada@linux.intel.com
20 What: /sys/kernel/debug/tpmi-<n>/tpmi-id-<n>/mem_write
23 Contact: srinivas.pandruvada@linux.intel.com
25 Allows to write at any offset. It doesn't check for Read/Write access
26 as hardware will not allow to write at read-only memory. This write is
27 at offset multiples of 4. The format is instance,offset,contents.
/openbmc/linux/drivers/gpio/
H A Dgpio-tps68470.c1 // SPDX-License-Identifier: GPL-2.0
8 * Antti Laakso <antti.laakso@intel.com>
9 * Tianshu Qiu <tian.shu.qiu@intel.com>
10 * Jian Xu Zheng <jian.xu.zheng@intel.com>
11 * Yuning Pu <yuning.pu@intel.com>
29 static int tps68470_gpio_get(struct gpio_chip *gc, unsigned int offset) in tps68470_gpio_get() argument
32 struct regmap *regmap = tps68470_gpio->tps68470_regmap; in tps68470_gpio_get()
36 if (offset >= TPS68470_N_REGULAR_GPIO) { in tps68470_gpio_get()
37 offset -= TPS68470_N_REGULAR_GPIO; in tps68470_gpio_get()
43 dev_err(tps68470_gpio->gc.parent, "reg 0x%x read failed\n", in tps68470_gpio_get()
[all …]
H A Dgpio-lp87565.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
4 * Keerthy <j-keerthy@ti.com>
21 static int lp87565_gpio_get(struct gpio_chip *chip, unsigned int offset) in lp87565_gpio_get() argument
26 ret = regmap_read(gpio->map, LP87565_REG_GPIO_IN, &val); in lp87565_gpio_get()
30 return !!(val & BIT(offset)); in lp87565_gpio_get()
33 static void lp87565_gpio_set(struct gpio_chip *chip, unsigned int offset, in lp87565_gpio_set() argument
38 regmap_update_bits(gpio->map, LP87565_REG_GPIO_OUT, in lp87565_gpio_set()
39 BIT(offset), value ? BIT(offset) : 0); in lp87565_gpio_set()
43 unsigned int offset) in lp87565_gpio_get_direction() argument
[all …]
H A Dgpio-tps65086.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2023 Texas Instruments Incorporated - https://www.ti.com/
4 * Andrew Davis <afd@ti.com>
21 unsigned offset) in tps65086_gpio_get_direction() argument
28 unsigned offset) in tps65086_gpio_direction_input() argument
31 return -EINVAL; in tps65086_gpio_direction_input()
35 unsigned offset, int value) in tps65086_gpio_direction_output() argument
40 regmap_update_bits(gpio->tps->regmap, TPS65086_GPOCTRL, in tps65086_gpio_direction_output()
41 BIT(4 + offset), value ? BIT(4 + offset) : 0); in tps65086_gpio_direction_output()
46 static int tps65086_gpio_get(struct gpio_chip *chip, unsigned offset) in tps65086_gpio_get() argument
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H A Dgpio-lp873x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
4 * Keerthy <j-keerthy@ti.com>
25 unsigned int offset) in lp873x_gpio_get_direction() argument
32 unsigned int offset) in lp873x_gpio_direction_input() argument
35 return -EINVAL; in lp873x_gpio_direction_input()
39 unsigned int offset, int value) in lp873x_gpio_direction_output() argument
44 return regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, in lp873x_gpio_direction_output()
45 BIT(offset * BITS_PER_GPO), in lp873x_gpio_direction_output()
46 value ? BIT(offset * BITS_PER_GPO) : 0); in lp873x_gpio_direction_output()
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H A Dgpio-tps65912.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
6 * Andrew F. Davis <afd@ti.com>
24 unsigned offset) in tps65912_gpio_get_direction() argument
30 ret = regmap_read(gpio->tps->regmap, TPS65912_GPIO1 + offset, &val); in tps65912_gpio_get_direction()
40 static int tps65912_gpio_direction_input(struct gpio_chip *gc, unsigned offset) in tps65912_gpio_direction_input() argument
44 return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, in tps65912_gpio_direction_input()
49 unsigned offset, int value) in tps65912_gpio_direction_output() argument
54 regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, in tps65912_gpio_direction_output()
57 return regmap_update_bits(gpio->tps->regmap, TPS65912_GPIO1 + offset, in tps65912_gpio_direction_output()
[all …]
H A Dgpio-bd71815.c1 // SPDX-License-Identifier: GPL-2.0
5 * Author: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
8 * Author: yanglsh@embest-tech.com
18 #include <linux/mfd/rohm-bd71815.h>
28 static int bd71815gpo_get(struct gpio_chip *chip, unsigned int offset) in bd71815gpo_get() argument
33 ret = regmap_read(bd71815->regmap, BD71815_REG_GPO, &val); in bd71815gpo_get()
37 return (val >> offset) & 1; in bd71815gpo_get()
40 static void bd71815gpo_set(struct gpio_chip *chip, unsigned int offset, in bd71815gpo_set() argument
46 bit = BIT(offset); in bd71815gpo_set()
49 ret = regmap_set_bits(bd71815->regmap, BD71815_REG_GPO, bit); in bd71815gpo_set()
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/openbmc/linux/drivers/clk/meson/
H A Dmeson8b.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Author: Carlo Caione <carlo@endlessm.com>
7 * Michael Turquette <mturquette@baylibre.com>
20 * [0] https://dn.odroid.com/S805/Datasheet/S805_Datasheet%20V0.8%2020150126.pdf
22 #define HHI_GP_PLL_CNTL 0x40 /* 0x10 offset in data sheet */
23 #define HHI_GP_PLL_CNTL2 0x44 /* 0x11 offset in data sheet */
24 #define HHI_GP_PLL_CNTL3 0x48 /* 0x12 offset in data sheet */
25 #define HHI_GP_PLL_CNTL4 0x4C /* 0x13 offset in data sheet */
26 #define HHI_GP_PLL_CNTL5 0x50 /* 0x14 offset in data sheet */
27 #define HHI_VIID_CLK_DIV 0x128 /* 0x4a offset in data sheet */
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/openbmc/linux/include/crypto/
H A Dscatterwalk.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
6 * Copyright (c) 2002 Adam J. Richter <adam@yggdrasil.com>
7 * Copyright (c) 2004 Jean-Luc Cooke <jlcooke@certainkey.com>
31 unsigned int len = walk->sg->offset + walk->sg->length - walk->offset; in scatterwalk_pagelen()
32 unsigned int len_this_page = offset_in_page(~walk->offset) + 1; in scatterwalk_pagelen()
46 walk->offset += nbytes; in scatterwalk_advance()
51 return sg_page(walk->sg) + (walk->offset >> PAGE_SHIFT); in scatterwalk_page()
62 walk->sg = sg; in scatterwalk_start()
63 walk->offset = sg->offset; in scatterwalk_start()
[all …]
/openbmc/linux/drivers/net/dsa/mv88e6xxx/
H A Dptp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Erik Hons <erik.hons@ni.com>
9 * Brandon Streiff <brandon.streiff@ni.com>
10 * Dane Wagner <dane.wagner@ni.com>
18 /* Offset 0x00: TAI Global Config */
33 /* Offset 0x01: Timestamp Clock Period (ps) */
36 /* Offset 0x02/0x03: Trigger Generation Amount */
40 /* Offset 0x04: Clock Compensation */
43 /* Offset 0x05: Trigger Configuration */
46 /* Offset 0x06: Ingress Rate Limiter Clock Generation Amount */
[all …]
H A Dhwtstamp.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Erik Hons <erik.hons@ni.com>
9 * Brandon Streiff <brandon.streiff@ni.com>
10 * Dane Wagner <dane.wagner@ni.com>
19 /* Offset 0x00: PTP EtherType */
22 /* Offset 0x01: Message Type Timestamp Enables */
30 /* Offset 0x02: Timestamp Arrival Capture Pointers */
33 /* Offset 0x05: PTP Global Configuration */
39 /* Offset 0x07: PTP Global Configuration */
48 /* Offset 0x08: PTP Interrupt Status */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dsolomon,ssd1307fb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Maxime Ripard <mripard@kernel.org>
11 - Javier Martinez Canillas <javierm@redhat.com>
17 - enum:
18 - solomon,ssd1305fb-i2c
19 - solomon,ssd1306fb-i2c
20 - solomon,ssd1307fb-i2c
21 - solomon,ssd1309fb-i2c
[all …]
/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dmmio.c2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
25 * Kevin Tian <kevin.tian@intel.com>
29 * Tina Zhang <tina.zhang@intel.com>
30 * Min He <min.he@intel.com>
31 * Niu Bing <bing.niu@intel.com>
32 * Zhi Wang <zhi.a.wang@intel.com>
44 * intel_vgpu_gpa_to_mmio_offset - translate a GPA to MMIO offset
54 return gpa - gttmmio_gpa; in intel_vgpu_gpa_to_mmio_offset()
58 (reg >= 0 && reg < gvt->device_info.mmio_size)
61 (reg >= gvt->device_info.gtt_start_offset \
[all …]
H A Dmmio.h2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
25 * Kevin Tian <kevin.tian@intel.com>
29 * Tina Zhang <tina.zhang@intel.com>
30 * Min He <min.he@intel.com>
31 * Niu Bing <bing.niu@intel.com>
32 * Zhi Wang <zhi.a.wang@intel.com>
63 u32 offset; member
79 int (*handler)(struct intel_gvt *gvt, u32 offset, void *data),
83 unsigned int offset);
96 int intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
[all …]
H A Dcfg_space.c2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
24 * Eddie Dong <eddie.dong@intel.com>
25 * Jike Song <jike.song@intel.com>
28 * Zhi Wang <zhi.a.wang@intel.com>
29 * Min He <min.he@intel.com>
30 * Bing Niu <bing.niu@intel.com>
45 /* bitmap for writable bits (RW or RW1C bits, but cannot co-exist in one
53 [PCI_BASE_ADDRESS_0 ... PCI_CARDBUS_CIS - 1] = 0xff,
59 * vgpu_pci_cfg_mem_write - write virtual cfg space memory
61 * @off: offset
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/openbmc/linux/drivers/soc/fsl/qe/
H A Dqe_common.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Author: Scott Wood <scottwood@freescale.com>
7 * Copyright 2007-2008,2010 Freescale Semiconductor, Inc.
11 * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
12 * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
14 * Vitaly Bordug <vbordug@ru.mvista.com>
56 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); in cpm_muram_init()
59 np = of_find_node_by_name(NULL, "data-only"); in cpm_muram_init()
62 ret = -ENODEV; in cpm_muram_init()
67 muram_pool = gen_pool_create(0, -1); in cpm_muram_init()
[all …]
/openbmc/u-boot/arch/mips/lib/
H A Dasm-offsets.c1 // SPDX-License-Identifier: GPL-2.0+
3 * offset.c: Calculate pt_regs and task_struct offsets.
9 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
20 OFFSET(PT_R0, pt_regs, regs[0]); in output_ptreg_defines()
21 OFFSET(PT_R1, pt_regs, regs[1]); in output_ptreg_defines()
22 OFFSET(PT_R2, pt_regs, regs[2]); in output_ptreg_defines()
23 OFFSET(PT_R3, pt_regs, regs[3]); in output_ptreg_defines()
24 OFFSET(PT_R4, pt_regs, regs[4]); in output_ptreg_defines()
25 OFFSET(PT_R5, pt_regs, regs[5]); in output_ptreg_defines()
26 OFFSET(PT_R6, pt_regs, regs[6]); in output_ptreg_defines()
[all …]
/openbmc/linux/drivers/fpga/
H A Ddfl-afu.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017-2018 Intel Corporation, Inc.
8 * Wu Hao <hao.wu@intel.com>
9 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
10 * Joseph Grecco <joe.grecco@intel.com>
11 * Enno Luebbers <enno.luebbers@intel.com>
12 * Tim Whisonant <tim.whisonant@intel.com>
13 * Ananda Ravuri <ananda.ravuri@intel.com>
14 * Henry Mitchel <henry.mitchel@intel.com>
25 * struct dfl_afu_mmio_region - afu mmio region data structure
[all …]
/openbmc/openbmc/poky/meta/recipes-kernel/lttng/lttng-tools/
H A D0001-compat-Define-off64_t-as-off_t-on-linux.patch2 From: Jérémie Galarneau <jeremie.galarneau@efficios.com>
3 Date: Tue, 17 Jan 2023 16:57:35 -0500
11 "arrange for 64-bit file offsets, known as large-file support."
13 As such, it is safe to assume off_t is 64-bit wide. This is checked by a
14 static_assert to catch any platform where autoconf would let a 32-bit
17 Upstream-Status: Submitted [https://review.lttng.org/c/lttng-tools/+/9268]
18 Reported-by: Khem Raj <raj.khem@gmail.com>
19 Signed-off-by: Jérémie Galarneau <jeremie.galarneau@efficios.com>
20 Change-Id: If2c6007a8c85bc3f3065002af8a7538b882fb4a8
21 ---
[all …]
/openbmc/linux/arch/hexagon/kernel/
H A Dasm-offsets.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
9 * Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
21 files typically used in c. Specifically, it generates asm-offsets.h */
32 OFFSET(_PT_SYSCALL_NR, pt_regs, syscall_nr); in main()
33 OFFSET(_PT_GPUGP, pt_regs, gpugp); in main()
34 OFFSET(_PT_CS1CS0, pt_regs, cs1cs0); in main()
35 OFFSET(_PT_R3130, pt_regs, r3130); in main()
36 OFFSET(_PT_R2928, pt_regs, r2928); in main()
37 OFFSET(_PT_R2726, pt_regs, r2726); in main()
[all …]
/openbmc/qemu/hw/display/
H A Ddpcd.c5 * http://www.greensocs.com/ , email: info@greensocs.com
8 * Frederic Konrad <fred.konrad@greensocs.com>
45 * The DCPD is 0x7FFFF length but read as 0 after offset 0x5FF.
52 static uint64_t dpcd_read(void *opaque, hwaddr offset, unsigned size) in dpcd_read() argument
57 if (offset < DPCD_READABLE_AREA) { in dpcd_read()
58 ret = e->dpcd_info[offset]; in dpcd_read()
60 qemu_log_mask(LOG_GUEST_ERROR, "dpcd: Bad offset 0x%" HWADDR_PRIX "\n", in dpcd_read()
61 offset); in dpcd_read()
64 trace_dpcd_read(offset, ret); in dpcd_read()
69 static void dpcd_write(void *opaque, hwaddr offset, uint64_t value, in dpcd_write() argument
[all …]
/openbmc/openbmc/meta-google/dynamic-layers/nuvoton-layer/recipes-bsp/images/npcm7xx-igps/
H A D0001-Set-FIU0_DRD_CFG-and-FIU_Clk_divider-for-gbmc-hoth.patch2 From: Benjamin Fair <benjaminfair@google.com>
3 Date: Wed, 20 Nov 2019 14:20:38 -0800
8 Signed-off-by: Benjamin Fair <benjaminfair@google.com>
9 Signed-off-by: Brandon Kim <brandonkim@google.com>
11 ---
12 ImageGeneration/references/BootBlockAndHeader_EB.xml | 4 ++--
13 ImageGeneration/references/UbootHeader_EB.xml | 2 +-
14 2 files changed, 3 insertions(+), 3 deletions(-)
16 diff --git a/ImageGeneration/references/BootBlockAndHeader_EB.xml b/ImageGeneration/references/Boot…
18 --- a/ImageGeneration/references/BootBlockAndHeader_EB.xml
[all …]
/openbmc/qemu/block/
H A Dreqlist.c8 * Dietmar Maurer (dietmar@proxmox.com)
9 * Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
12 * See the COPYING file in the top-level directory.
20 void reqlist_init_req(BlockReqList *reqs, BlockReq *req, int64_t offset, in reqlist_init_req() argument
24 .offset = offset, in reqlist_init_req()
27 qemu_co_queue_init(&req->wait_queue); in reqlist_init_req()
31 BlockReq *reqlist_find_conflict(BlockReqList *reqs, int64_t offset, in reqlist_find_conflict() argument
37 if (ranges_overlap(offset, bytes, r->offset, r->bytes)) { in reqlist_find_conflict()
45 bool coroutine_fn reqlist_wait_one(BlockReqList *reqs, int64_t offset, in reqlist_wait_one() argument
48 BlockReq *r = reqlist_find_conflict(reqs, offset, bytes); in reqlist_wait_one()
[all …]
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dpinmux.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2011
4 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
5 * Tom Cubie <tangliang@allwinnertech.com>
15 u32 offset = GPIO_CFG_OFFSET(bank_offset); in sunxi_gpio_set_cfgbank() local
17 clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset); in sunxi_gpio_set_cfgbank()
31 u32 offset = GPIO_CFG_OFFSET(bank_offset); in sunxi_gpio_get_cfgbank() local
34 cfg = readl(&pio->cfg[0] + index); in sunxi_gpio_get_cfgbank()
35 cfg >>= offset; in sunxi_gpio_get_cfgbank()
52 u32 offset = GPIO_DRV_OFFSET(pin); in sunxi_gpio_set_drv() local
[all …]

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