/openbmc/u-boot/doc/uImage.FIT/ |
H A D | command_syntax_extensions.txt | 14 --------------------- 20 Note: U-Boot supports two methods of booting a PowerPC Linux kernel: old way, 22 kernel is passed a pointer to the FDT. The boot method is indicated for each 26 1. bootm boot image at the current address, equivalent to 2,3,8 30 3. bootm <addr1> /* multi-image at <addr1> */ 31 4. bootm <addr1> - /* multi-image at <addr1> */ 34 7. bootm <addr1> - <addr3> /* single image at <addr1> */ 39 10. bootm [<addr1>]#<conf>[#<extra-conf[#...]] 43 14. bootm [<addr1>]:<subimg1> - [<addr3>]:<subimg3> 44 15. bootm [<addr1>]:<subimg1> - <addr3> [all …]
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/openbmc/pldm/oem/ibm/libpldmresponder/ |
H A D | inband_code_update.hpp | 27 * notification to phosphor-software-manager app 33 * @param[in] dBusIntf - D-Bus handler pointer 44 /* @brief Method to return the current boot side 48 /* @brief Method to return the next boot side 52 /* @brief Method to set the current boot side or 53 * perform a rename operation on current boot side 54 * @param[in] currSide - current side to be set to 59 /* @brief Method to set the next boot side 60 * @param[in] nextSide - next boot side to be set to 65 /* @brief Method to set the running and non-running [all …]
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/openbmc/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
H A D | hip04-bootwrapper.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-bootwrapper.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Bootwrapper boot method 10 - Wei Xu <xuwei5@hisilicon.com> 12 description: Bootwrapper boot method (software protocol on SMP) 17 - const: hisilicon,hip04-bootwrapper 19 boot-method: 20 $ref: /schemas/types.yaml#/definitions/uint32-array [all …]
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/openbmc/linux/Documentation/firmware-guide/acpi/ |
H A D | chromeos-acpi-device.rst | 1 .. SPDX-License-Identifier: GPL-2.0 11 .. flat-table:: Supported ACPI Objects 13 :header-rows: 1 15 * - Object 16 - Description 18 * - CHSW 19 - Chrome OS switch positions 21 * - HWID 22 - Chrome OS hardware ID 24 * - FWID [all …]
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/openbmc/docs/designs/ |
H A D | redfish-postcodes.md | 11 BIOS Power-On Self-Test (POST) codes are exposed on DBUS but not currently over 12 Redfish. This describes a method to expose the BIOS POST codes over the Redfish 57 "@odata.id": "/redfish/v1/Systems/system/LogServices/PostCodes/Entries/B1-03", 59 "Created": "2019-12-06T14:10:30+00:00", 61 "Id": "B1-03", 62 "Message": "Boot Count: 4: TS Offset: 0.0033; POST Code: 0x43", 92 "Description": "BIOS Power-On Self-Test Code received.", 93 "Message": "Boot Count: %1: TS Offset: %2; POST Code: %3", 123 xyz.openbmc_project.State.Boot.PostCode service. The existing interface tracks 124 POST codes for the past 100 host boot events and the current boot cycle index. [all …]
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/openbmc/openbmc/meta-yadro/recipes-phosphor/ipmi/phosphor-ipmi-host/ |
H A D | 0002-Add-support-for-boot-initiator-mailbox.patch | 4 Subject: [PATCH] Add support for boot initiator mailbox 7 (boot initiator mailbox). The format of mailbox is 15 It is expected that a machine-specific override for 16 phosphor-settingsd sets the supported state and 21 Change-Id: Iccbf74c0775f20c70e8deaa7b0a8bd995ebbffea 22 Signed-off-by: Alexander Amelkin <a.amelkin@yadro.com> 23 Signed-off-by: Ivan Mikhaylov <i.mikhaylov@yadro.com> 25 --- 26 chassishandler.cpp | 329 ++++++++++++++++++++++++++++++++++++++++++++- 28 2 files changed, 326 insertions(+), 4 deletions(-) [all …]
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/openbmc/openbmc/meta-fii/meta-mori/recipes-phosphor/dbus/led-policy-mori/ |
H A D | led-config.yaml | 1 - name: OS state path group 5 - meta: PATH 8 - name: Chassis power state path group 12 - meta: PATH 15 - name: OS state property group 20 - interface: xyz.openbmc_project.State.OperatingSystem.Status 24 - name: Chassis power state property group 29 - interface: xyz.openbmc_project.State.Chassis 33 - name: watch OS state 41 - name: watch power state [all …]
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/openbmc/linux/arch/arm64/kernel/ |
H A D | cpu_ops.c | 1 // SPDX-License-Identifier: GPL-2.0-only 46 if (!strcmp(name, (*ops)->name)) in cpu_get_ops() 64 pr_err("Failed to find device node for boot cpu\n"); in cpu_read_enable_method() 68 enable_method = of_get_property(dn, "enable-method", NULL); in cpu_read_enable_method() 71 * The boot CPU may not have an enable method (e.g. in cpu_read_enable_method() 72 * when spin-table is used for secondaries). in cpu_read_enable_method() 76 pr_err("%pOF: missing enable-method property\n", in cpu_read_enable_method() 84 * In ACPI systems the boot CPU does not require in cpu_read_enable_method() 85 * checking the enable method since for some in cpu_read_enable_method() 86 * boot protocol (ie parking protocol) it need not in cpu_read_enable_method() [all …]
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/openbmc/phosphor-power/phosphor-regulators/docs/ |
H A D | design.md | 3 This document describes the high-level design of the `phosphor-regulators` 6 The low-level design is documented using doxygen comments in the source files. 13 The `phosphor-regulators` application is a single-threaded C++ executable. It is 17 The application is driven by a system-specific JSON configuration file. The JSON 24 - Manager 25 - Top level class created in `main()`. 26 - Loads the JSON configuration file. 27 - Implements the D-Bus `configure` and `monitor` methods. 28 - Contains a System object. 29 - System [all …]
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/openbmc/phosphor-bmc-code-mgmt/bmc/ubi/ |
H A D | item_updater_helper.cpp | 7 #include <phosphor-logging/lg2.hpp> 21 std::string serviceFile = "obmc-flash-bmc-setenv@" + entryId + "\\x3d" + in setEntry() 23 auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, in setEntry() local 25 method.append(serviceFile, "replace"); in setEntry() 26 bus.call_noreply(method); in setEntry() 32 auto serviceFile = "obmc-flash-bmc-setenv@" + entryId + ".service"; in clearEntry() 33 auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, in clearEntry() local 35 method.append(serviceFile, "replace"); in clearEntry() 36 bus.call_noreply(method); in clearEntry() 42 auto method = bus.new_method_call(SYSTEMD_BUSNAME, SYSTEMD_PATH, in cleanup() local [all …]
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/openbmc/u-boot/doc/driver-model/ |
H A D | README.txt | 4 This README contains high-level information about driver model, a unified 5 way of declaring and accessing drivers in U-Boot. The original work was done 20 ----------- 22 Uclass - a group of devices which operate in the same way. A uclass provides 28 Driver - some code which talks to a peripheral and presents a higher-level 31 Device - an instance of a driver, tied to a particular port or peripheral. 35 ------------- 37 Build U-Boot sandbox and run it: 41 ./u-boot -d u-boot.dtb 43 (type 'reset' to exit U-Boot) [all …]
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/openbmc/qemu/docs/system/ |
H A D | bootindex.rst | 1 Managing device boot order with bootindex properties 4 QEMU can tell QEMU-aware guest firmware (like the x86 PC BIOS) 6 A simple way to set this order is to use the ``-boot order=`` option, 14 boot priority. There is no particular order in which devices with no 19 not support ``-boot order=``; on those machines you must always 23 a short-form option like ``-hda`` or ``-cdrom``, so to use 25 into long-form ``-drive`` and ``-device`` option pairs. 28 ------- 33 .. parsed-literal:: 35 |qemu_system| -drive file=disk1.img,if=none,id=disk1 \\ [all …]
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/openbmc/openpower-occ-control/ |
H A D | utils.cpp | 3 #include <systemd/sd-event.h> 6 #include <phosphor-logging/elog-errors.hpp> 7 #include <phosphor-logging/lg2.hpp> 10 #include <xyz/openbmc_project/State/Boot/Progress/server.hpp> 25 using BootProgress = sdbusplus::xyz::openbmc_project::State::Boot::server:: 52 return mapperResponse.cbegin()->first; in getService() 68 auto method = bus.new_method_call(service.c_str(), objectPath.c_str(), in getProperty() local 70 method.append(interface, propertyName); in getProperty() 72 auto reply = bus.call(method); in getProperty() 81 * @param[in] objectPath - Name of the object containing the property [all …]
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/openbmc/openpower-hw-diags/util/ |
H A D | dbus.cpp | 3 #include <xyz/openbmc_project/State/Boot/Progress/server.hpp> 11 //------------------------------------------------------------------------------ 31 auto method = bus.new_method_call(objectMapperService, objectMapperPath, in find() local 35 method.append(std::string{"/"}, 0, in find() 38 auto reply = bus.call(method); in find() 48 o_service = object.second.begin()->first; // return service in find() 75 auto method = bus.new_method_call(objectMapperService, objectMapperPath, in findService() local 80 method.append(i_path, std::vector<std::string>{i_interface}); in findService() 82 auto reply = bus.call(method); in findService() 91 o_service = response.begin()->first; in findService() [all …]
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/State/Boot/ |
H A D | PostCode.interface.yaml | 2 Monitor Post code coming and buffer all of them based on boot cycle into 6 - name: CurrentBootCycleCount 9 It is used to indicate number of boot cycles that have post codes 11 - name: MaxBootCycleNum 14 The max cached boot cycles for post code. It is used to indicate end 15 user what's the max boot number, and make sure get command parameter 18 - name: GetPostCodesWithTimeStamp 20 Method to get the cached post codes of the indicated boot cycle with 23 - name: Index 26 Index indicates which boot cycle of post codes is requested. 1 [all …]
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/openbmc/linux/Documentation/devicetree/bindings/arm/bcm/ |
H A D | brcm,bcm63138.txt | 1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings 2 ----------------------------------------------------------- 4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the 11 An optional Boot lookup table Device Tree node is required for secondary CPU 13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an 14 'enable-method' property. 16 Required properties for the Boot lookup table node: 17 - compatible: should be "brcm,bcm63138-bootlut" 18 - reg: register base address and length for the Boot Lookup table 21 - enable-method: should be "brcm,bcm63138" [all …]
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/openbmc/openbmc-test-automation/lib/ |
H A D | utils.robot | 174 ... Set Variable echo ${os_password} | sudo -S reboot 197 ... Set Variable echo ${os_password} | sudo -S shutdown${time_string} 252 Old Get Boot Progress 253 [Documentation] Get the boot progress the old way (via org location). 266 Set Boot Progress Method 269 # The boot progress data has moved from an 'org' location to an 'xyz' 270 # location. This keyword will determine whether the new method of getting 271 # the boot progress is valid and will set the global boot_prog_method 273 # prior call to this function or via a -v parm), this keyword will simply 281 # -v boot_prog_method:Old to force old behavior on such builds. [all …]
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/openbmc/linux/arch/arm/kernel/ |
H A D | devtree.c | 1 // SPDX-License-Identifier: GPL-2.0-only 25 #include <asm/mach-types.h> 37 const char *method; in set_smp_ops_by_method() local 40 if (of_property_read_string(node, "enable-method", &method)) in set_smp_ops_by_method() 43 for (; m->method; m++) in set_smp_ops_by_method() 44 if (!strcmp(m->method, method)) { in set_smp_ops_by_method() 45 smp_set_ops(m->ops); in set_smp_ops_by_method() 60 * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree 79 u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; in arm_dt_init_cpu_maps() 116 * requires that if detected the boot CPU must be assigned in arm_dt_init_cpu_maps() [all …]
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/openbmc/linux/Documentation/arch/arm64/ |
H A D | arm-acpi.rst | 7 Base Boot Requirements) [1] specifications. Both BSA and BBR are publicly 23 industry-standard Arm systems, they also apply to more than one operating 25 ACPI and Linux only, on an Arm system -- that is, what Linux expects of 30 ---------------- 33 exist in Linux for describing non-enumerable hardware, after all. In this 40 - ACPI’s byte code (AML) allows the platform to encode hardware behavior, 45 - ACPI’s OSPM defines a power management model that constrains what the 49 - In the enterprise server environment, ACPI has established bindings (such 55 - Choosing a single interface to describe the abstraction between a platform 61 - The new ACPI governance process works well and Linux is now at the same [all …]
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/openbmc/docs/architecture/code-update/ |
H A D | code-update-deprecated.md | 5 - The REST APIs described below are deprecated. Please follow 6 [code-update.md](code-update.md) for the new APIs to do code update. 7 - The rest part of this document is still valid. 10 [host-code-update.md](host-code-update.md) 13 `tmp/deploy/images/<platform>/`. The `image-*` symlinks correspond to components 16 - `image-bmc` → `obmc-phosphor-image-<platform>-<timestamp>.static.mtd` 20 - `image-kernel` → `fitImage-obmc-phosphor-initramfs-<platform>.bin` 25 - `image-rofs` → `obmc-phosphor-image-<platform>.squashfs-xz` 27 The read-only OpenBMC filesystem 29 - `image-rwfs` → `rwfs.jffs2` [all …]
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/openbmc/u-boot/board/sunxi/ |
H A D | README.sunxi64 | 1 Allwinner 64-bit boards README 4 Newer Allwinner SoCs feature ARMv8 cores (ARM Cortex-A53) with support for 5 both the 64-bit AArch64 mode and the ARMv7 compatible 32-bit AArch32 mode. 8 These SoCs are wired to start in AArch32 mode on reset and execute 32-bit 9 code from the Boot ROM (BROM). As this has some implications on U-Boot, this 10 file describes how to make full use of the 64-bit capabilities. 14 - Build the ARM Trusted Firmware binary (see "ARM Trusted Firmware (ATF)" below) 15 $ cd /src/arm-trusted-firmware 17 - Build U-Boot (see "SPL/U-Boot" below) 19 $ make pine64_plus_defconfig && make -j5 [all …]
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/openbmc/u-boot/doc/ |
H A D | README.virtio | 1 # SPDX-License-Identifier: GPL-2.0+ 8 This document describes the information about U-Boot support for VirtIO [1] 12 -------------- 17 paravirtualization. In the U-Boot case, the guest is U-Boot itself, while the 18 virtual environment are normally QEMU [2] targets like ARM, RISC-V and x86. 21 ------ 24 embedded devices models like ARM/RISC-V, which does not normally come with 29 and PCI transport options are supported in U-Boot. 36 - qemu_arm_defconfig 37 - qemu_arm64_defconfig [all …]
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Certs/ |
H A D | README.md | 12 ### Signed Certificate upload Design flow(Pre-generated) 14 - The REST Server copies the certificate and private key file to a temporary 16 - REST server should map the URI to the target DBus application (Certs) object. 17 The recommendation for the D-Bus application implementing certificate D-Bus 19 - The URI /xyz/openbmc_project/certs/server/https maps to instance of the 21 - The URI /xyz/openbmc_project/certs/client/ldap maps to instance of the 23 - The URI /xyz/openbmc_project/certs/authority/truststore maps to instance of 25 - REST server should call the install method of the certificate application 27 - Certificate manager application also implements d-bus object 29 "certificates specific d-bus objects" installed in the system. This d-bus [all …]
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/openbmc/docs/ |
H A D | REST-cheatsheet.md | 13 The original REST server, from the phosphor-rest-server repository, uses 15 use the same cookie jar files for read-only REST methods like GET, but requires 17 the URL for non-read-only methods. 20 server. The phosphor-rest-server repository was archived in October 2022. 24 - Using just the cookie jar files for the phosphor-rest server: 27 …$ curl -c cjar -b cjar -k -H "Content-Type: application/json" -X POST https://${bmc}/login -d "{\"… 29 - If passing in the username/password as part of the URL, no unique login call 40 $ curl -k -X GET https://root:0penBmc@${bmc}/xyz/openbmc_project/list 43 - Token based authentication. 47 …-k -H "Content-Type: application/json" -X POST https://${bmc}/login -d '{"username" : "root", "pa… [all …]
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/openbmc/u-boot/arch/arm/cpu/armv8/ |
H A D | Kconfig | 15 bool "Enable multiple CPUs to enter into U-Boot" 21 CPUECTLR_EL1.SMPEN bit before U-Boot. 36 bool "Support spin-table enable method" 39 Say Y here to support "spin-table" enable method for booting Linux. 42 - Specify enable-method = "spin-table" in each CPU node in the 43 Device Tree you are using to boot the kernel 44 - Bring secondary CPUs into U-Boot proper in a board specific 49 U-Boot automatically does: 50 - Set "cpu-release-addr" property of each CPU node 52 - Reserve the code for the spin-table and the release address [all …]
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