1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
29eb8f674SGrant Likely /*
39eb8f674SGrant Likely * linux/arch/arm/kernel/devtree.c
49eb8f674SGrant Likely *
59eb8f674SGrant Likely * Copyright (C) 2009 Canonical Ltd. <jeremy.kerr@canonical.com>
69eb8f674SGrant Likely */
79eb8f674SGrant Likely
89eb8f674SGrant Likely #include <linux/init.h>
9ecea4ab6SPaul Gortmaker #include <linux/export.h>
109eb8f674SGrant Likely #include <linux/errno.h>
119eb8f674SGrant Likely #include <linux/types.h>
129eb8f674SGrant Likely #include <linux/memblock.h>
139eb8f674SGrant Likely #include <linux/of.h>
149eb8f674SGrant Likely #include <linux/of_fdt.h>
159eb8f674SGrant Likely #include <linux/of_irq.h>
169eb8f674SGrant Likely #include <linux/of_platform.h>
176c3ff8b1SStephen Boyd #include <linux/smp.h>
189eb8f674SGrant Likely
19a0ae0240SLorenzo Pieralisi #include <asm/cputype.h>
209eb8f674SGrant Likely #include <asm/setup.h>
219eb8f674SGrant Likely #include <asm/page.h>
222374b063SBen Dooks #include <asm/prom.h>
23a0ae0240SLorenzo Pieralisi #include <asm/smp_plat.h>
2493c02ab4SGrant Likely #include <asm/mach/arch.h>
2593c02ab4SGrant Likely #include <asm/mach-types.h>
269eb8f674SGrant Likely
279eb8f674SGrant Likely
286c3ff8b1SStephen Boyd #ifdef CONFIG_SMP
299a721c41SRob Herring extern struct of_cpu_method __cpu_method_of_table[];
309a721c41SRob Herring
319a721c41SRob Herring static const struct of_cpu_method __cpu_method_of_table_sentinel
3233def849SJoe Perches __used __section("__cpu_method_of_table_end");
339a721c41SRob Herring
346c3ff8b1SStephen Boyd
set_smp_ops_by_method(struct device_node * node)356c3ff8b1SStephen Boyd static int __init set_smp_ops_by_method(struct device_node *node)
366c3ff8b1SStephen Boyd {
376c3ff8b1SStephen Boyd const char *method;
389a721c41SRob Herring struct of_cpu_method *m = __cpu_method_of_table;
396c3ff8b1SStephen Boyd
406c3ff8b1SStephen Boyd if (of_property_read_string(node, "enable-method", &method))
416c3ff8b1SStephen Boyd return 0;
426c3ff8b1SStephen Boyd
439a721c41SRob Herring for (; m->method; m++)
446c3ff8b1SStephen Boyd if (!strcmp(m->method, method)) {
456c3ff8b1SStephen Boyd smp_set_ops(m->ops);
466c3ff8b1SStephen Boyd return 1;
476c3ff8b1SStephen Boyd }
486c3ff8b1SStephen Boyd
496c3ff8b1SStephen Boyd return 0;
506c3ff8b1SStephen Boyd }
516c3ff8b1SStephen Boyd #else
set_smp_ops_by_method(struct device_node * node)526c3ff8b1SStephen Boyd static inline int set_smp_ops_by_method(struct device_node *node)
536c3ff8b1SStephen Boyd {
546c3ff8b1SStephen Boyd return 1;
556c3ff8b1SStephen Boyd }
566c3ff8b1SStephen Boyd #endif
576c3ff8b1SStephen Boyd
586c3ff8b1SStephen Boyd
59a0ae0240SLorenzo Pieralisi /*
60a0ae0240SLorenzo Pieralisi * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
61a0ae0240SLorenzo Pieralisi * and builds the cpu logical map array containing MPIDR values related to
62a0ae0240SLorenzo Pieralisi * logical cpus
63a0ae0240SLorenzo Pieralisi *
64a0ae0240SLorenzo Pieralisi * Updates the cpu possible mask with the number of parsed cpu nodes
65a0ae0240SLorenzo Pieralisi */
arm_dt_init_cpu_maps(void)66a0ae0240SLorenzo Pieralisi void __init arm_dt_init_cpu_maps(void)
67a0ae0240SLorenzo Pieralisi {
68a0ae0240SLorenzo Pieralisi /*
69a0ae0240SLorenzo Pieralisi * Temp logical map is initialized with UINT_MAX values that are
70a0ae0240SLorenzo Pieralisi * considered invalid logical map entries since the logical map must
71a0ae0240SLorenzo Pieralisi * contain a list of MPIDR[23:0] values where MPIDR[31:24] must
72a0ae0240SLorenzo Pieralisi * read as 0.
73a0ae0240SLorenzo Pieralisi */
74a0ae0240SLorenzo Pieralisi struct device_node *cpu, *cpus;
756c3ff8b1SStephen Boyd int found_method = 0;
76a0ae0240SLorenzo Pieralisi u32 i, j, cpuidx = 1;
77a0ae0240SLorenzo Pieralisi u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
78a0ae0240SLorenzo Pieralisi
7918d7f152SLorenzo Pieralisi u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID };
80a0ae0240SLorenzo Pieralisi bool bootcpu_valid = false;
81a0ae0240SLorenzo Pieralisi cpus = of_find_node_by_path("/cpus");
82a0ae0240SLorenzo Pieralisi
83a0ae0240SLorenzo Pieralisi if (!cpus)
84a0ae0240SLorenzo Pieralisi return;
85a0ae0240SLorenzo Pieralisi
86d4866f75SRob Herring for_each_of_cpu_node(cpu) {
87ca96bbe2SRob Herring u32 hwid = of_get_cpu_hwid(cpu, 0);
88a0ae0240SLorenzo Pieralisi
89a8e65e06SRob Herring pr_debug(" * %pOF...\n", cpu);
90a0ae0240SLorenzo Pieralisi
91a0ae0240SLorenzo Pieralisi /*
92ba6dea4fSRobin Murphy * Bits n:24 must be set to 0 in the DT since the reg property
93a0ae0240SLorenzo Pieralisi * defines the MPIDR[23:0].
94a0ae0240SLorenzo Pieralisi */
95ca96bbe2SRob Herring if (hwid & ~MPIDR_HWID_BITMASK) {
96a4283e41SJulia Lawall of_node_put(cpu);
97a0ae0240SLorenzo Pieralisi return;
98a4283e41SJulia Lawall }
99a0ae0240SLorenzo Pieralisi
100a0ae0240SLorenzo Pieralisi /*
101a0ae0240SLorenzo Pieralisi * Duplicate MPIDRs are a recipe for disaster.
102a0ae0240SLorenzo Pieralisi * Scan all initialized entries and check for
103a0ae0240SLorenzo Pieralisi * duplicates. If any is found just bail out.
104a0ae0240SLorenzo Pieralisi * temp values were initialized to UINT_MAX
105a0ae0240SLorenzo Pieralisi * to avoid matching valid MPIDR[23:0] values.
106a0ae0240SLorenzo Pieralisi */
107a0ae0240SLorenzo Pieralisi for (j = 0; j < cpuidx; j++)
108a4283e41SJulia Lawall if (WARN(tmp_map[j] == hwid,
109a4283e41SJulia Lawall "Duplicate /cpu reg properties in the DT\n")) {
110a4283e41SJulia Lawall of_node_put(cpu);
111a0ae0240SLorenzo Pieralisi return;
112a4283e41SJulia Lawall }
113a0ae0240SLorenzo Pieralisi
114a0ae0240SLorenzo Pieralisi /*
115a0ae0240SLorenzo Pieralisi * Build a stashed array of MPIDR values. Numbering scheme
116a0ae0240SLorenzo Pieralisi * requires that if detected the boot CPU must be assigned
117a0ae0240SLorenzo Pieralisi * logical id 0. Other CPUs get sequential indexes starting
118a0ae0240SLorenzo Pieralisi * from 1. If a CPU node with a reg property matching the
119a0ae0240SLorenzo Pieralisi * boot CPU MPIDR is detected, this is recorded so that the
120a0ae0240SLorenzo Pieralisi * logical map built from DT is validated and can be used
121a0ae0240SLorenzo Pieralisi * to override the map created in smp_setup_processor_id().
122a0ae0240SLorenzo Pieralisi */
123a0ae0240SLorenzo Pieralisi if (hwid == mpidr) {
124a0ae0240SLorenzo Pieralisi i = 0;
125a0ae0240SLorenzo Pieralisi bootcpu_valid = true;
126a0ae0240SLorenzo Pieralisi } else {
127a0ae0240SLorenzo Pieralisi i = cpuidx++;
128a0ae0240SLorenzo Pieralisi }
129a0ae0240SLorenzo Pieralisi
130ce7b1756SLorenzo Pieralisi if (WARN(cpuidx > nr_cpu_ids, "DT /cpu %u nodes greater than "
131ce7b1756SLorenzo Pieralisi "max cores %u, capping them\n",
132ce7b1756SLorenzo Pieralisi cpuidx, nr_cpu_ids)) {
133ce7b1756SLorenzo Pieralisi cpuidx = nr_cpu_ids;
134a4283e41SJulia Lawall of_node_put(cpu);
135a0ae0240SLorenzo Pieralisi break;
136a0ae0240SLorenzo Pieralisi }
137a0ae0240SLorenzo Pieralisi
138ce7b1756SLorenzo Pieralisi tmp_map[i] = hwid;
1396c3ff8b1SStephen Boyd
1406c3ff8b1SStephen Boyd if (!found_method)
1416c3ff8b1SStephen Boyd found_method = set_smp_ops_by_method(cpu);
142ce7b1756SLorenzo Pieralisi }
143ce7b1756SLorenzo Pieralisi
1446c3ff8b1SStephen Boyd /*
1456c3ff8b1SStephen Boyd * Fallback to an enable-method in the cpus node if nothing found in
1466c3ff8b1SStephen Boyd * a cpu node.
1476c3ff8b1SStephen Boyd */
1486c3ff8b1SStephen Boyd if (!found_method)
1496c3ff8b1SStephen Boyd set_smp_ops_by_method(cpus);
1506c3ff8b1SStephen Boyd
1518d5bc1a6SOlof Johansson if (!bootcpu_valid) {
1528d5bc1a6SOlof Johansson pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n");
153a0ae0240SLorenzo Pieralisi return;
1548d5bc1a6SOlof Johansson }
155a0ae0240SLorenzo Pieralisi
156a0ae0240SLorenzo Pieralisi /*
157a0ae0240SLorenzo Pieralisi * Since the boot CPU node contains proper data, and all nodes have
158a0ae0240SLorenzo Pieralisi * a reg property, the DT CPU list can be considered valid and the
159a0ae0240SLorenzo Pieralisi * logical map created in smp_setup_processor_id() can be overridden
160a0ae0240SLorenzo Pieralisi */
161a0ae0240SLorenzo Pieralisi for (i = 0; i < cpuidx; i++) {
162a0ae0240SLorenzo Pieralisi set_cpu_possible(i, true);
163a0ae0240SLorenzo Pieralisi cpu_logical_map(i) = tmp_map[i];
164a0ae0240SLorenzo Pieralisi pr_debug("cpu logical map 0x%x\n", cpu_logical_map(i));
165a0ae0240SLorenzo Pieralisi }
166a0ae0240SLorenzo Pieralisi }
167a0ae0240SLorenzo Pieralisi
arch_match_cpu_phys_id(int cpu,u64 phys_id)168973e02c1SSudeep KarkadaNagesha bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
169973e02c1SSudeep KarkadaNagesha {
170e44ef891SSudeep Holla return phys_id == cpu_logical_map(cpu);
171973e02c1SSudeep KarkadaNagesha }
172973e02c1SSudeep KarkadaNagesha
arch_get_next_mach(const char * const ** match)1736d67a9f6SRob Herring static const void * __init arch_get_next_mach(const char *const **match)
1746d67a9f6SRob Herring {
1756d67a9f6SRob Herring static const struct machine_desc *mdesc = __arch_info_begin;
1766d67a9f6SRob Herring const struct machine_desc *m = mdesc;
1776d67a9f6SRob Herring
1786d67a9f6SRob Herring if (m >= __arch_info_end)
1796d67a9f6SRob Herring return NULL;
1806d67a9f6SRob Herring
1816d67a9f6SRob Herring mdesc++;
1826d67a9f6SRob Herring *match = m->dt_compat;
1836d67a9f6SRob Herring return m;
1846d67a9f6SRob Herring }
1856d67a9f6SRob Herring
18693c02ab4SGrant Likely /**
18793c02ab4SGrant Likely * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
188e9a2f8b5SArd Biesheuvel * @dt_virt: virtual address of dt blob
18993c02ab4SGrant Likely *
19093c02ab4SGrant Likely * If a dtb was passed to the kernel in r2, then use it to choose the
19193c02ab4SGrant Likely * correct machine_desc and to setup the system.
19293c02ab4SGrant Likely */
setup_machine_fdt(void * dt_virt)193e9a2f8b5SArd Biesheuvel const struct machine_desc * __init setup_machine_fdt(void *dt_virt)
19493c02ab4SGrant Likely {
195ff69a4c8SRussell King const struct machine_desc *mdesc, *mdesc_best = NULL;
19693c02ab4SGrant Likely
197883a106bSArnd Bergmann DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
198cb6f8344SLinus Walleij .l2c_aux_val = 0x0,
199cb6f8344SLinus Walleij .l2c_aux_mask = ~0x0,
200883a106bSArnd Bergmann MACHINE_END
201883a106bSArnd Bergmann
202ff69a4c8SRussell King mdesc_best = &__mach_desc_GENERIC_DT;
203883a106bSArnd Bergmann
204*1103d3b5SUsama Arif if (!dt_virt || !early_init_dt_verify(dt_virt, __pa(dt_virt)))
205f506cd48SNicolas Pitre return NULL;
206f506cd48SNicolas Pitre
2076d67a9f6SRob Herring mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
20893c02ab4SGrant Likely
2096d67a9f6SRob Herring if (!mdesc) {
21093c02ab4SGrant Likely const char *prop;
2119d0c4dfeSRob Herring int size;
2126d67a9f6SRob Herring unsigned long dt_root;
21393c02ab4SGrant Likely
21493c02ab4SGrant Likely early_print("\nError: unrecognized/unsupported "
21593c02ab4SGrant Likely "device tree compatible list:\n[ ");
21693c02ab4SGrant Likely
2176d67a9f6SRob Herring dt_root = of_get_flat_dt_root();
21893c02ab4SGrant Likely prop = of_get_flat_dt_prop(dt_root, "compatible", &size);
21993c02ab4SGrant Likely while (size > 0) {
22093c02ab4SGrant Likely early_print("'%s' ", prop);
22193c02ab4SGrant Likely size -= strlen(prop) + 1;
22293c02ab4SGrant Likely prop += strlen(prop) + 1;
22393c02ab4SGrant Likely }
22493c02ab4SGrant Likely early_print("]\n\n");
22593c02ab4SGrant Likely
22693c02ab4SGrant Likely dump_machine_table(); /* does not return */
22793c02ab4SGrant Likely }
22893c02ab4SGrant Likely
2295a12a597SLaura Abbott /* We really don't want to do this, but sometimes firmware provides buggy data */
2305a12a597SLaura Abbott if (mdesc->dt_fixup)
2315a12a597SLaura Abbott mdesc->dt_fixup();
2325a12a597SLaura Abbott
2335a12a597SLaura Abbott early_init_dt_scan_nodes();
2345a12a597SLaura Abbott
23593c02ab4SGrant Likely /* Change machine number to match the mdesc we're using */
2366d67a9f6SRob Herring __machine_arch_type = mdesc->nr;
23793c02ab4SGrant Likely
2386d67a9f6SRob Herring return mdesc;
23993c02ab4SGrant Likely }
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