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/openbmc/u-boot/arch/mips/dts/
H A Dbrcm,bcm3380.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm3380-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/reset/bcm3380-reset.h>
20 #address-cells = <1>;
21 #size-cells = <0>;
22 u-boot,dm-pre-reloc;
25 compatible = "brcm,bcm3380-cpu", "mips,mips4Kc";
28 u-boot,dm-pre-reloc;
32 compatible = "brcm,bcm3380-cpu", "mips,mips4Kc";
[all …]
H A Dbrcm,bcm6318.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6318-clock.h>
7 #include <dt-bindings/dma/bcm6318-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm6318-power-domain.h>
10 #include <dt-bindings/reset/bcm6318-reset.h>
22 #address-cells = <1>;
23 #size-cells = <0>;
24 u-boot,dm-pre-reloc;
27 compatible = "brcm,bcm6318-cpu", "mips,mips4Kc";
[all …]
H A Dbrcm,bcm6368.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6368-clock.h>
7 #include <dt-bindings/dma/bcm6368-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6368-reset.h>
21 #address-cells = <1>;
22 #size-cells = <0>;
23 u-boot,dm-pre-reloc;
26 compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
29 u-boot,dm-pre-reloc;
[all …]
H A Dbrcm,bcm63268.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm63268-clock.h>
7 #include <dt-bindings/dma/bcm63268-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm63268-power-domain.h>
10 #include <dt-bindings/reset/bcm63268-reset.h>
23 #address-cells = <1>;
24 #size-cells = <0>;
25 u-boot,dm-pre-reloc;
28 compatible = "brcm,bcm63268-cpu", "mips,mips4Kc";
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H A Dbrcm,bcm6348.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6348-clock.h>
7 #include <dt-bindings/dma/bcm6348-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6348-reset.h>
21 #address-cells = <1>;
22 #size-cells = <0>;
23 u-boot,dm-pre-reloc;
26 compatible = "brcm,bcm6348-cpu", "mips,mips4Kc";
29 u-boot,dm-pre-reloc;
[all …]
H A Dbrcm,bcm6362.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6362-clock.h>
7 #include <dt-bindings/dma/bcm6362-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm6362-power-domain.h>
10 #include <dt-bindings/reset/bcm6362-reset.h>
23 #address-cells = <1>;
24 #size-cells = <0>;
25 u-boot,dm-pre-reloc;
28 compatible = "brcm,bcm6362-cpu", "mips,mips4Kc";
[all …]
H A Dbrcm,bcm6358.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6358-clock.h>
7 #include <dt-bindings/dma/bcm6358-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6358-reset.h>
21 #address-cells = <1>;
22 #size-cells = <0>;
23 u-boot,dm-pre-reloc;
26 compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
29 u-boot,dm-pre-reloc;
[all …]
H A Dbrcm,bcm6338.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6338-clock.h>
7 #include <dt-bindings/dma/bcm6338-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6338-reset.h>
21 #address-cells = <1>;
22 #size-cells = <0>;
23 u-boot,dm-pre-reloc;
26 compatible = "brcm,bcm6338-cpu", "mips,mips4Kc";
29 u-boot,dm-pre-reloc;
[all …]
H A Dbrcm,bcm6328.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6328-clock.h>
7 #include <dt-bindings/dma/bcm6328-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
10 #include <dt-bindings/reset/bcm6328-reset.h>
22 #address-cells = <1>;
23 #size-cells = <0>;
24 u-boot,dm-pre-reloc;
27 compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-mmio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic MMIO GPIO
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <brgl@bgdev.pl>
14 Some simple GPIO controllers may consist of a single data register or a pair
15 of set/clear-bit registers. Such controllers are common for glue logic in
16 FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped
[all …]
H A Dbrcm,bcm63xx-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/brcm,bcm63xx-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM63xx GPIO controller
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Bindings for Broadcom's BCM63xx memory-mapped GPIO controllers.
16 These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345
19 BCM6338 have 8-bit data and dirout registers, where GPIO state can be read
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dbcm6345_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Derived from linux/arch/mips/bcm63xx/gpio.c:
7 * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
13 #include <asm/gpio.h>
25 return !!(readl_be(priv->reg_data) & BIT(offset)); in bcm6345_gpio_get_value()
34 setbits_be32(priv->reg_data, BIT(offset)); in bcm6345_gpio_set_value()
36 clrbits_be32(priv->reg_data, BIT(offset)); in bcm6345_gpio_set_value()
56 return bcm6345_gpio_set_direction(priv->reg_dirout, offset, 1); in bcm6345_gpio_direction_input()
66 return bcm6345_gpio_set_direction(priv->reg_dirout, offset, 0); in bcm6345_gpio_direction_output()
73 if (readl_be(priv->reg_dirout) & BIT(offset)) in bcm6345_gpio_get_function()
[all …]
H A DKconfig2 # GPIO infrastructure and drivers
5 menu "GPIO Support"
8 bool "Enable Driver Model for GPIO drivers"
11 Enable driver model for GPIO access. The standard GPIO
13 the GPIO uclass. Drivers provide methods to query the
15 is defined in include/asm-generic/gpio.h.
18 bool "Enable GPIO hog support"
22 Enable gpio hog support
23 The GPIO chip may contain GPIO hog definitions. GPIO hogging
24 is a mechanism providing automatic GPIO request and config-
[all …]
/openbmc/linux/arch/arm64/boot/dts/broadcom/bcmbca/
H A Dbcm4908.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/phy/phy.h>
6 #include <dt-bindings/soc/bcm-pmb.h>
8 /dts-v1/;
11 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
21 stdout-path = "serial0:115200n8";
[all …]
/openbmc/linux/drivers/irqchip/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_IRQCHIP) += irqchip.o
4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-mmio.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic driver for memory-mapped GPIO controllers.
10 * ..The simplest form of a GPIO controller that the driver supports is``
11 * `.just a single "data" register, where GPIO state can be read and/or `
16 __________|~$@~~~ %~ /o*o*o*o*o*o\ .. Implementing such a GPIO .
22 * . big-endian notation, just`. .. A bit more sophisticated controllers ,
23 * . register the device with -be`. .with a pair of set/clear-bit registers ,
29 * .. The expectation is that in at least some cases . ,-~~~-,
30 * .this will be used with roll-your-own ASIC/FPGA .` \ /
55 #include <linux/gpio/driver.h>
[all …]
/openbmc/linux/arch/mips/include/asm/mach-bcm63xx/
H A Dbcm63xx_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
90 /* BCM6345 clock bits are shifted by 16 on the left, because of the test
91 * control register which is 16-bits wide. That way we do not have any
92 * specific BCM6345 code for handling clocks, and writing 0 to the test
470 /* GPIO registers */
477 /* GPIO mux registers and constants */
549 /* those bits must be kept as read in gpio basemode register*/
996 /* Endpoint<->DMA mappings */
1003 /* Misc per-endpoint settings */
1267 #define SPI_6348_CMD 0x00 /* 16-bits register */
[all …]
/openbmc/linux/
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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H A Dopengrok2.0.log1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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