1ded8f229SWilliam Zhang// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2ded8f229SWilliam Zhang 3ded8f229SWilliam Zhang#include <dt-bindings/interrupt-controller/irq.h> 4ded8f229SWilliam Zhang#include <dt-bindings/interrupt-controller/arm-gic.h> 5ded8f229SWilliam Zhang#include <dt-bindings/phy/phy.h> 6ded8f229SWilliam Zhang#include <dt-bindings/soc/bcm-pmb.h> 7ded8f229SWilliam Zhang 8ded8f229SWilliam Zhang/dts-v1/; 9ded8f229SWilliam Zhang 10ded8f229SWilliam Zhang/ { 11ded8f229SWilliam Zhang interrupt-parent = <&gic>; 12ded8f229SWilliam Zhang 13ded8f229SWilliam Zhang #address-cells = <2>; 14ded8f229SWilliam Zhang #size-cells = <2>; 15ded8f229SWilliam Zhang 16ded8f229SWilliam Zhang aliases { 17ded8f229SWilliam Zhang serial0 = &uart0; 18ded8f229SWilliam Zhang }; 19ded8f229SWilliam Zhang 20ded8f229SWilliam Zhang chosen { 21ded8f229SWilliam Zhang stdout-path = "serial0:115200n8"; 22ded8f229SWilliam Zhang }; 23ded8f229SWilliam Zhang 24ded8f229SWilliam Zhang cpus { 25ded8f229SWilliam Zhang #address-cells = <1>; 26ded8f229SWilliam Zhang #size-cells = <0>; 27ded8f229SWilliam Zhang 28ded8f229SWilliam Zhang cpu0: cpu@0 { 29ded8f229SWilliam Zhang device_type = "cpu"; 30ded8f229SWilliam Zhang compatible = "brcm,brahma-b53"; 31ded8f229SWilliam Zhang reg = <0x0>; 32ded8f229SWilliam Zhang enable-method = "spin-table"; 33ded8f229SWilliam Zhang cpu-release-addr = <0x0 0xfff8>; 34ded8f229SWilliam Zhang next-level-cache = <&l2>; 35ded8f229SWilliam Zhang }; 36ded8f229SWilliam Zhang 37ded8f229SWilliam Zhang cpu1: cpu@1 { 38ded8f229SWilliam Zhang device_type = "cpu"; 39ded8f229SWilliam Zhang compatible = "brcm,brahma-b53"; 40ded8f229SWilliam Zhang reg = <0x1>; 41ded8f229SWilliam Zhang enable-method = "spin-table"; 42ded8f229SWilliam Zhang cpu-release-addr = <0x0 0xfff8>; 43ded8f229SWilliam Zhang next-level-cache = <&l2>; 44ded8f229SWilliam Zhang }; 45ded8f229SWilliam Zhang 46ded8f229SWilliam Zhang cpu2: cpu@2 { 47ded8f229SWilliam Zhang device_type = "cpu"; 48ded8f229SWilliam Zhang compatible = "brcm,brahma-b53"; 49ded8f229SWilliam Zhang reg = <0x2>; 50ded8f229SWilliam Zhang enable-method = "spin-table"; 51ded8f229SWilliam Zhang cpu-release-addr = <0x0 0xfff8>; 52ded8f229SWilliam Zhang next-level-cache = <&l2>; 53ded8f229SWilliam Zhang }; 54ded8f229SWilliam Zhang 55ded8f229SWilliam Zhang cpu3: cpu@3 { 56ded8f229SWilliam Zhang device_type = "cpu"; 57ded8f229SWilliam Zhang compatible = "brcm,brahma-b53"; 58ded8f229SWilliam Zhang reg = <0x3>; 59ded8f229SWilliam Zhang enable-method = "spin-table"; 60ded8f229SWilliam Zhang cpu-release-addr = <0x0 0xfff8>; 61ded8f229SWilliam Zhang next-level-cache = <&l2>; 62ded8f229SWilliam Zhang }; 63ded8f229SWilliam Zhang 64ded8f229SWilliam Zhang l2: l2-cache0 { 65ded8f229SWilliam Zhang compatible = "cache"; 66e567e58dSPierre Gondois cache-level = <2>; 67*0709e55eSKrzysztof Kozlowski cache-unified; 68ded8f229SWilliam Zhang }; 69ded8f229SWilliam Zhang }; 70ded8f229SWilliam Zhang 71ded8f229SWilliam Zhang axi@81000000 { 72ded8f229SWilliam Zhang compatible = "simple-bus"; 73ded8f229SWilliam Zhang #address-cells = <1>; 74ded8f229SWilliam Zhang #size-cells = <1>; 75ded8f229SWilliam Zhang ranges = <0x00 0x00 0x81000000 0x4000>; 76ded8f229SWilliam Zhang 77ded8f229SWilliam Zhang gic: interrupt-controller@1000 { 78ded8f229SWilliam Zhang compatible = "arm,gic-400"; 79ded8f229SWilliam Zhang #interrupt-cells = <3>; 80ded8f229SWilliam Zhang #address-cells = <0>; 81ded8f229SWilliam Zhang interrupt-controller; 82ded8f229SWilliam Zhang reg = <0x1000 0x1000>, 83ded8f229SWilliam Zhang <0x2000 0x2000>; 84ded8f229SWilliam Zhang }; 85ded8f229SWilliam Zhang }; 86ded8f229SWilliam Zhang 87ded8f229SWilliam Zhang timer { 88ded8f229SWilliam Zhang compatible = "arm,armv8-timer"; 89ded8f229SWilliam Zhang interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 90ded8f229SWilliam Zhang <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 91ded8f229SWilliam Zhang <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 92ded8f229SWilliam Zhang <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 93ded8f229SWilliam Zhang }; 94ded8f229SWilliam Zhang 95ded8f229SWilliam Zhang pmu { 96ded8f229SWilliam Zhang compatible = "arm,cortex-a53-pmu"; 97ded8f229SWilliam Zhang interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 98ded8f229SWilliam Zhang <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 99ded8f229SWilliam Zhang <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 100ded8f229SWilliam Zhang <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 101ded8f229SWilliam Zhang interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 102ded8f229SWilliam Zhang }; 103ded8f229SWilliam Zhang 104ded8f229SWilliam Zhang clocks { 105ded8f229SWilliam Zhang periph_clk: periph_clk { 106ded8f229SWilliam Zhang compatible = "fixed-clock"; 107ded8f229SWilliam Zhang #clock-cells = <0>; 108ded8f229SWilliam Zhang clock-frequency = <50000000>; 109ded8f229SWilliam Zhang clock-output-names = "periph"; 110ded8f229SWilliam Zhang }; 111f5d83b71SWilliam Zhang 112f5d83b71SWilliam Zhang hsspi_pll: hsspi-pll { 113f5d83b71SWilliam Zhang compatible = "fixed-clock"; 114f5d83b71SWilliam Zhang #clock-cells = <0>; 115f5d83b71SWilliam Zhang clock-frequency = <400000000>; 116f5d83b71SWilliam Zhang }; 117ded8f229SWilliam Zhang }; 118ded8f229SWilliam Zhang 119ded8f229SWilliam Zhang soc { 120ded8f229SWilliam Zhang compatible = "simple-bus"; 121ded8f229SWilliam Zhang #address-cells = <1>; 122ded8f229SWilliam Zhang #size-cells = <1>; 123ded8f229SWilliam Zhang ranges = <0x00 0x00 0x80000000 0x281000>; 124ded8f229SWilliam Zhang 125ded8f229SWilliam Zhang enet: ethernet@2000 { 126ded8f229SWilliam Zhang compatible = "brcm,bcm4908-enet"; 127ded8f229SWilliam Zhang reg = <0x2000 0x1000>; 128ded8f229SWilliam Zhang 129ded8f229SWilliam Zhang interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 130ded8f229SWilliam Zhang <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 131ded8f229SWilliam Zhang interrupt-names = "rx", "tx"; 132ded8f229SWilliam Zhang }; 133ded8f229SWilliam Zhang 134ded8f229SWilliam Zhang usb_phy: usb-phy@c200 { 135ded8f229SWilliam Zhang compatible = "brcm,bcm4908-usb-phy"; 136ded8f229SWilliam Zhang reg = <0xc200 0x100>; 137ded8f229SWilliam Zhang reg-names = "ctrl"; 138ded8f229SWilliam Zhang power-domains = <&pmb BCM_PMB_HOST_USB>; 139ded8f229SWilliam Zhang dr_mode = "host"; 140ded8f229SWilliam Zhang brcm,has-xhci; 141ded8f229SWilliam Zhang brcm,has-eohci; 142ded8f229SWilliam Zhang #phy-cells = <1>; 143ded8f229SWilliam Zhang status = "disabled"; 144ded8f229SWilliam Zhang }; 145ded8f229SWilliam Zhang 146ded8f229SWilliam Zhang ehci: usb@c300 { 147ded8f229SWilliam Zhang compatible = "generic-ehci"; 148ded8f229SWilliam Zhang reg = <0xc300 0x100>; 149ded8f229SWilliam Zhang interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 150ded8f229SWilliam Zhang phys = <&usb_phy PHY_TYPE_USB2>; 151ded8f229SWilliam Zhang status = "disabled"; 152477cad71SRafał Miłecki 153477cad71SRafał Miłecki #address-cells = <1>; 154477cad71SRafał Miłecki #size-cells = <0>; 155477cad71SRafał Miłecki 156477cad71SRafał Miłecki ehci_port1: port@1 { 157477cad71SRafał Miłecki reg = <1>; 158477cad71SRafał Miłecki #trigger-source-cells = <0>; 159477cad71SRafał Miłecki }; 160477cad71SRafał Miłecki 161477cad71SRafał Miłecki ehci_port2: port@2 { 162477cad71SRafał Miłecki reg = <2>; 163477cad71SRafał Miłecki #trigger-source-cells = <0>; 164477cad71SRafał Miłecki }; 165ded8f229SWilliam Zhang }; 166ded8f229SWilliam Zhang 167ded8f229SWilliam Zhang ohci: usb@c400 { 168ded8f229SWilliam Zhang compatible = "generic-ohci"; 169ded8f229SWilliam Zhang reg = <0xc400 0x100>; 170ded8f229SWilliam Zhang interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 171ded8f229SWilliam Zhang phys = <&usb_phy PHY_TYPE_USB2>; 172ded8f229SWilliam Zhang status = "disabled"; 173477cad71SRafał Miłecki 174477cad71SRafał Miłecki #address-cells = <1>; 175477cad71SRafał Miłecki #size-cells = <0>; 176477cad71SRafał Miłecki 177477cad71SRafał Miłecki ohci_port1: port@1 { 178477cad71SRafał Miłecki reg = <1>; 179477cad71SRafał Miłecki #trigger-source-cells = <0>; 180477cad71SRafał Miłecki }; 181477cad71SRafał Miłecki 182477cad71SRafał Miłecki ohci_port2: port@2 { 183477cad71SRafał Miłecki reg = <2>; 184477cad71SRafał Miłecki #trigger-source-cells = <0>; 185477cad71SRafał Miłecki }; 186ded8f229SWilliam Zhang }; 187ded8f229SWilliam Zhang 188ded8f229SWilliam Zhang xhci: usb@d000 { 189ded8f229SWilliam Zhang compatible = "generic-xhci"; 190ded8f229SWilliam Zhang reg = <0xd000 0x8c8>; 191ded8f229SWilliam Zhang interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 192ded8f229SWilliam Zhang phys = <&usb_phy PHY_TYPE_USB3>; 193ded8f229SWilliam Zhang status = "disabled"; 194477cad71SRafał Miłecki 195477cad71SRafał Miłecki #address-cells = <1>; 196477cad71SRafał Miłecki #size-cells = <0>; 197477cad71SRafał Miłecki 198477cad71SRafał Miłecki xhci_port1: port@1 { 199477cad71SRafał Miłecki reg = <1>; 200477cad71SRafał Miłecki #trigger-source-cells = <0>; 201477cad71SRafał Miłecki }; 202477cad71SRafał Miłecki 203477cad71SRafał Miłecki xhci_port2: port@2 { 204477cad71SRafał Miłecki reg = <2>; 205477cad71SRafał Miłecki #trigger-source-cells = <0>; 206477cad71SRafał Miłecki }; 207ded8f229SWilliam Zhang }; 208ded8f229SWilliam Zhang 209ded8f229SWilliam Zhang bus@80000 { 210ded8f229SWilliam Zhang compatible = "simple-bus"; 211ded8f229SWilliam Zhang #size-cells = <1>; 212ded8f229SWilliam Zhang #address-cells = <1>; 213ded8f229SWilliam Zhang ranges = <0 0x80000 0x50000>; 214ded8f229SWilliam Zhang 215ded8f229SWilliam Zhang ethernet-switch@0 { 216ded8f229SWilliam Zhang compatible = "brcm,bcm4908-switch"; 217ded8f229SWilliam Zhang reg = <0x0 0x40000>, 218ded8f229SWilliam Zhang <0x40000 0x110>, 219ded8f229SWilliam Zhang <0x40340 0x30>, 220ded8f229SWilliam Zhang <0x40380 0x30>, 221ded8f229SWilliam Zhang <0x40600 0x34>, 222ded8f229SWilliam Zhang <0x40800 0x208>; 223ded8f229SWilliam Zhang reg-names = "core", "reg", "intrl2_0", 224ded8f229SWilliam Zhang "intrl2_1", "fcb", "acb"; 225ded8f229SWilliam Zhang interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 226ded8f229SWilliam Zhang <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 227ded8f229SWilliam Zhang brcm,num-gphy = <5>; 228ded8f229SWilliam Zhang brcm,num-rgmii-ports = <2>; 229ded8f229SWilliam Zhang 230ded8f229SWilliam Zhang ports: ports { 231ded8f229SWilliam Zhang #address-cells = <1>; 232ded8f229SWilliam Zhang #size-cells = <0>; 233ded8f229SWilliam Zhang 234ded8f229SWilliam Zhang port@0 { 235ded8f229SWilliam Zhang reg = <0>; 236ded8f229SWilliam Zhang phy-mode = "internal"; 237ded8f229SWilliam Zhang phy-handle = <&phy8>; 238ded8f229SWilliam Zhang }; 239ded8f229SWilliam Zhang 240ded8f229SWilliam Zhang port@1 { 241ded8f229SWilliam Zhang reg = <1>; 242ded8f229SWilliam Zhang phy-mode = "internal"; 243ded8f229SWilliam Zhang phy-handle = <&phy9>; 244ded8f229SWilliam Zhang }; 245ded8f229SWilliam Zhang 246ded8f229SWilliam Zhang port@2 { 247ded8f229SWilliam Zhang reg = <2>; 248ded8f229SWilliam Zhang phy-mode = "internal"; 249ded8f229SWilliam Zhang phy-handle = <&phy10>; 250ded8f229SWilliam Zhang }; 251ded8f229SWilliam Zhang 252ded8f229SWilliam Zhang port@3 { 253ded8f229SWilliam Zhang reg = <3>; 254ded8f229SWilliam Zhang phy-mode = "internal"; 255ded8f229SWilliam Zhang phy-handle = <&phy11>; 256ded8f229SWilliam Zhang }; 257ded8f229SWilliam Zhang 258ded8f229SWilliam Zhang port@8 { 259ded8f229SWilliam Zhang reg = <8>; 260ded8f229SWilliam Zhang phy-mode = "internal"; 261ded8f229SWilliam Zhang ethernet = <&enet>; 262ded8f229SWilliam Zhang 263ded8f229SWilliam Zhang fixed-link { 264ded8f229SWilliam Zhang speed = <1000>; 265ded8f229SWilliam Zhang full-duplex; 266ded8f229SWilliam Zhang }; 267ded8f229SWilliam Zhang }; 268ded8f229SWilliam Zhang }; 269ded8f229SWilliam Zhang }; 270ded8f229SWilliam Zhang 271ded8f229SWilliam Zhang mdio: mdio@405c0 { 272ded8f229SWilliam Zhang compatible = "brcm,unimac-mdio"; 273ded8f229SWilliam Zhang reg = <0x405c0 0x8>; 274ded8f229SWilliam Zhang reg-names = "mdio"; 275ded8f229SWilliam Zhang #size-cells = <0>; 276ded8f229SWilliam Zhang #address-cells = <1>; 277ded8f229SWilliam Zhang 278ded8f229SWilliam Zhang phy8: ethernet-phy@8 { 279ded8f229SWilliam Zhang reg = <8>; 280ded8f229SWilliam Zhang }; 281ded8f229SWilliam Zhang 282ded8f229SWilliam Zhang phy9: ethernet-phy@9 { 283ded8f229SWilliam Zhang reg = <9>; 284ded8f229SWilliam Zhang }; 285ded8f229SWilliam Zhang 286ded8f229SWilliam Zhang phy10: ethernet-phy@a { 287ded8f229SWilliam Zhang reg = <10>; 288ded8f229SWilliam Zhang }; 289ded8f229SWilliam Zhang 290ded8f229SWilliam Zhang phy11: ethernet-phy@b { 291ded8f229SWilliam Zhang reg = <11>; 292ded8f229SWilliam Zhang }; 293ded8f229SWilliam Zhang 294ded8f229SWilliam Zhang phy12: ethernet-phy@c { 295ded8f229SWilliam Zhang reg = <12>; 296ded8f229SWilliam Zhang }; 297ded8f229SWilliam Zhang }; 298ded8f229SWilliam Zhang }; 299ded8f229SWilliam Zhang 300f16a8294SRafał Miłecki procmon: bus@280000 { 301ded8f229SWilliam Zhang compatible = "simple-bus"; 302ded8f229SWilliam Zhang reg = <0x280000 0x1000>; 303ded8f229SWilliam Zhang ranges; 304ded8f229SWilliam Zhang 305ded8f229SWilliam Zhang #address-cells = <1>; 306ded8f229SWilliam Zhang #size-cells = <1>; 307ded8f229SWilliam Zhang 308ded8f229SWilliam Zhang pmb: power-controller@2800c0 { 309ded8f229SWilliam Zhang compatible = "brcm,bcm4908-pmb"; 310ded8f229SWilliam Zhang reg = <0x2800c0 0x40>; 311ded8f229SWilliam Zhang #power-domain-cells = <1>; 312ded8f229SWilliam Zhang }; 313ded8f229SWilliam Zhang }; 314ded8f229SWilliam Zhang }; 315ded8f229SWilliam Zhang 316ded8f229SWilliam Zhang bus@ff800000 { 317ded8f229SWilliam Zhang compatible = "simple-bus"; 318ded8f229SWilliam Zhang #address-cells = <1>; 319ded8f229SWilliam Zhang #size-cells = <1>; 320ded8f229SWilliam Zhang ranges = <0x00 0x00 0xff800000 0x3000>; 321ded8f229SWilliam Zhang 322ded8f229SWilliam Zhang twd: timer-mfd@400 { 323ded8f229SWilliam Zhang compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon"; 324ded8f229SWilliam Zhang reg = <0x400 0x4c>; 325ded8f229SWilliam Zhang ranges = <0x0 0x400 0x4c>; 326ded8f229SWilliam Zhang 327ded8f229SWilliam Zhang #address-cells = <1>; 328ded8f229SWilliam Zhang #size-cells = <1>; 329ded8f229SWilliam Zhang 33068064196SRafał Miłecki timer@0 { 33168064196SRafał Miłecki compatible = "brcm,bcm63138-timer"; 33268064196SRafał Miłecki reg = <0x0 0x28>; 33368064196SRafał Miłecki }; 33468064196SRafał Miłecki 335ded8f229SWilliam Zhang watchdog@28 { 336ded8f229SWilliam Zhang compatible = "brcm,bcm6345-wdt"; 337ded8f229SWilliam Zhang reg = <0x28 0x8>; 338ded8f229SWilliam Zhang }; 339ded8f229SWilliam Zhang }; 340ded8f229SWilliam Zhang 341ded8f229SWilliam Zhang gpio0: gpio-controller@500 { 342ded8f229SWilliam Zhang compatible = "brcm,bcm6345-gpio"; 343ded8f229SWilliam Zhang reg-names = "dirout", "dat"; 344ded8f229SWilliam Zhang reg = <0x500 0x28>, <0x528 0x28>; 345ded8f229SWilliam Zhang 346ded8f229SWilliam Zhang #gpio-cells = <2>; 347ded8f229SWilliam Zhang gpio-controller; 348ded8f229SWilliam Zhang }; 349ded8f229SWilliam Zhang 350ded8f229SWilliam Zhang pinctrl@560 { 351ded8f229SWilliam Zhang compatible = "brcm,bcm4908-pinctrl"; 352ded8f229SWilliam Zhang reg = <0x560 0x10>; 353ded8f229SWilliam Zhang 354ded8f229SWilliam Zhang pins_led_0_a: led_0-a-pins { 355ded8f229SWilliam Zhang function = "led_0"; 356ded8f229SWilliam Zhang groups = "led_0_grp_a"; 357ded8f229SWilliam Zhang }; 358ded8f229SWilliam Zhang 359ded8f229SWilliam Zhang pins_led_1_a: led_1-a-pins { 360ded8f229SWilliam Zhang function = "led_1"; 361ded8f229SWilliam Zhang groups = "led_1_grp_a"; 362ded8f229SWilliam Zhang }; 363ded8f229SWilliam Zhang 364ded8f229SWilliam Zhang pins_led_2_a: led_2-a-pins { 365ded8f229SWilliam Zhang function = "led_2"; 366ded8f229SWilliam Zhang groups = "led_2_grp_a"; 367ded8f229SWilliam Zhang }; 368ded8f229SWilliam Zhang 369ded8f229SWilliam Zhang pins_led_3_a: led_3-a-pins { 370ded8f229SWilliam Zhang function = "led_3"; 371ded8f229SWilliam Zhang groups = "led_3_grp_a"; 372ded8f229SWilliam Zhang }; 373ded8f229SWilliam Zhang 374ded8f229SWilliam Zhang pins_led_4_a: led_4-a-pins { 375ded8f229SWilliam Zhang function = "led_4"; 376ded8f229SWilliam Zhang groups = "led_4_grp_a"; 377ded8f229SWilliam Zhang }; 378ded8f229SWilliam Zhang 379ded8f229SWilliam Zhang pins_led_5_a: led_5-a-pins { 380ded8f229SWilliam Zhang function = "led_5"; 381ded8f229SWilliam Zhang groups = "led_5_grp_a"; 382ded8f229SWilliam Zhang }; 383ded8f229SWilliam Zhang 384ded8f229SWilliam Zhang pins_led_6_a: led_6-a-pins { 385ded8f229SWilliam Zhang function = "led_6"; 386ded8f229SWilliam Zhang groups = "led_6_grp_a"; 387ded8f229SWilliam Zhang }; 388ded8f229SWilliam Zhang 389ded8f229SWilliam Zhang pins_led_7_a: led_7-a-pins { 390ded8f229SWilliam Zhang function = "led_7"; 391ded8f229SWilliam Zhang groups = "led_7_grp_a"; 392ded8f229SWilliam Zhang }; 393ded8f229SWilliam Zhang 394ded8f229SWilliam Zhang pins_led_8_a: led_8-a-pins { 395ded8f229SWilliam Zhang function = "led_8"; 396ded8f229SWilliam Zhang groups = "led_8_grp_a"; 397ded8f229SWilliam Zhang }; 398ded8f229SWilliam Zhang 399ded8f229SWilliam Zhang pins_led_9_a: led_9-a-pins { 400ded8f229SWilliam Zhang function = "led_9"; 401ded8f229SWilliam Zhang groups = "led_9_grp_a"; 402ded8f229SWilliam Zhang }; 403ded8f229SWilliam Zhang 40432c3d47fSArnd Bergmann pins_led_10_a: led_10-a-pins { 40532c3d47fSArnd Bergmann function = "led_10"; 40632c3d47fSArnd Bergmann groups = "led_10_grp_a"; 40732c3d47fSArnd Bergmann }; 40832c3d47fSArnd Bergmann 40932c3d47fSArnd Bergmann pins_led_11_a: led_11-a-pins { 41032c3d47fSArnd Bergmann function = "led_11"; 41132c3d47fSArnd Bergmann groups = "led_11_grp_a"; 41232c3d47fSArnd Bergmann }; 41332c3d47fSArnd Bergmann 41432c3d47fSArnd Bergmann pins_led_12_a: led_12-a-pins { 41532c3d47fSArnd Bergmann function = "led_12"; 41632c3d47fSArnd Bergmann groups = "led_12_grp_a"; 41732c3d47fSArnd Bergmann }; 41832c3d47fSArnd Bergmann 41932c3d47fSArnd Bergmann pins_led_13_a: led_13-a-pins { 42032c3d47fSArnd Bergmann function = "led_13"; 42132c3d47fSArnd Bergmann groups = "led_13_grp_a"; 42232c3d47fSArnd Bergmann }; 42332c3d47fSArnd Bergmann 42432c3d47fSArnd Bergmann pins_led_14_a: led_14-a-pins { 42532c3d47fSArnd Bergmann function = "led_14"; 42632c3d47fSArnd Bergmann groups = "led_14_grp_a"; 42732c3d47fSArnd Bergmann }; 42832c3d47fSArnd Bergmann 42932c3d47fSArnd Bergmann pins_led_15_a: led_15-a-pins { 43032c3d47fSArnd Bergmann function = "led_15"; 43132c3d47fSArnd Bergmann groups = "led_15_grp_a"; 43232c3d47fSArnd Bergmann }; 43332c3d47fSArnd Bergmann 43432c3d47fSArnd Bergmann pins_led_16_a: led_16-a-pins { 43532c3d47fSArnd Bergmann function = "led_16"; 43632c3d47fSArnd Bergmann groups = "led_16_grp_a"; 43732c3d47fSArnd Bergmann }; 43832c3d47fSArnd Bergmann 43932c3d47fSArnd Bergmann pins_led_17_a: led_17-a-pins { 44032c3d47fSArnd Bergmann function = "led_17"; 44132c3d47fSArnd Bergmann groups = "led_17_grp_a"; 44232c3d47fSArnd Bergmann }; 44332c3d47fSArnd Bergmann 44432c3d47fSArnd Bergmann pins_led_18_a: led_18-a-pins { 44532c3d47fSArnd Bergmann function = "led_18"; 44632c3d47fSArnd Bergmann groups = "led_18_grp_a"; 44732c3d47fSArnd Bergmann }; 44832c3d47fSArnd Bergmann 44932c3d47fSArnd Bergmann pins_led_19_a: led_19-a-pins { 45032c3d47fSArnd Bergmann function = "led_19"; 45132c3d47fSArnd Bergmann groups = "led_19_grp_a"; 45232c3d47fSArnd Bergmann }; 45332c3d47fSArnd Bergmann 45432c3d47fSArnd Bergmann pins_led_20_a: led_20-a-pins { 45532c3d47fSArnd Bergmann function = "led_20"; 45632c3d47fSArnd Bergmann groups = "led_20_grp_a"; 45732c3d47fSArnd Bergmann }; 45832c3d47fSArnd Bergmann 459ded8f229SWilliam Zhang pins_led_21_a: led_21-a-pins { 460ded8f229SWilliam Zhang function = "led_21"; 461ded8f229SWilliam Zhang groups = "led_21_grp_a"; 462ded8f229SWilliam Zhang }; 463ded8f229SWilliam Zhang 464ded8f229SWilliam Zhang pins_led_22_a: led_22-a-pins { 465ded8f229SWilliam Zhang function = "led_22"; 466ded8f229SWilliam Zhang groups = "led_22_grp_a"; 467ded8f229SWilliam Zhang }; 468ded8f229SWilliam Zhang 46932c3d47fSArnd Bergmann pins_led_23_a: led_23-a-pins { 47032c3d47fSArnd Bergmann function = "led_23"; 47132c3d47fSArnd Bergmann groups = "led_23_grp_a"; 47232c3d47fSArnd Bergmann }; 47332c3d47fSArnd Bergmann 47432c3d47fSArnd Bergmann pins_led_24_a: led_24-a-pins { 47532c3d47fSArnd Bergmann function = "led_24"; 47632c3d47fSArnd Bergmann groups = "led_24_grp_a"; 47732c3d47fSArnd Bergmann }; 47832c3d47fSArnd Bergmann 47932c3d47fSArnd Bergmann pins_led_25_a: led_25-a-pins { 48032c3d47fSArnd Bergmann function = "led_25"; 48132c3d47fSArnd Bergmann groups = "led_25_grp_a"; 48232c3d47fSArnd Bergmann }; 48332c3d47fSArnd Bergmann 484ded8f229SWilliam Zhang pins_led_26_a: led_26-a-pins { 485ded8f229SWilliam Zhang function = "led_26"; 486ded8f229SWilliam Zhang groups = "led_26_grp_a"; 487ded8f229SWilliam Zhang }; 488ded8f229SWilliam Zhang 489ded8f229SWilliam Zhang pins_led_27_a: led_27-a-pins { 490ded8f229SWilliam Zhang function = "led_27"; 491ded8f229SWilliam Zhang groups = "led_27_grp_a"; 492ded8f229SWilliam Zhang }; 493ded8f229SWilliam Zhang 494ded8f229SWilliam Zhang pins_led_28_a: led_28-a-pins { 495ded8f229SWilliam Zhang function = "led_28"; 496ded8f229SWilliam Zhang groups = "led_28_grp_a"; 497ded8f229SWilliam Zhang }; 498ded8f229SWilliam Zhang 499ded8f229SWilliam Zhang pins_led_29_a: led_29-a-pins { 500ded8f229SWilliam Zhang function = "led_29"; 501ded8f229SWilliam Zhang groups = "led_29_grp_a"; 502ded8f229SWilliam Zhang }; 503ded8f229SWilliam Zhang 504ded8f229SWilliam Zhang pins_led_30_a: led_30-a-pins { 505ded8f229SWilliam Zhang function = "led_30"; 506ded8f229SWilliam Zhang groups = "led_30_grp_a"; 507ded8f229SWilliam Zhang }; 508ded8f229SWilliam Zhang 50932c3d47fSArnd Bergmann pins_led_31_a: led_31-a-pins { 51032c3d47fSArnd Bergmann function = "led_31"; 51132c3d47fSArnd Bergmann groups = "led_31_grp_a"; 51232c3d47fSArnd Bergmann }; 51332c3d47fSArnd Bergmann 514ded8f229SWilliam Zhang pins_hs_uart: hs_uart-pins { 515ded8f229SWilliam Zhang function = "hs_uart"; 516ded8f229SWilliam Zhang groups = "hs_uart_grp"; 517ded8f229SWilliam Zhang }; 518ded8f229SWilliam Zhang 519ded8f229SWilliam Zhang pins_i2c_a: i2c-a-pins { 520ded8f229SWilliam Zhang function = "i2c"; 521ded8f229SWilliam Zhang groups = "i2c_grp_a"; 522ded8f229SWilliam Zhang }; 523ded8f229SWilliam Zhang 524ded8f229SWilliam Zhang pins_i2c_b: i2c-b-pins { 525ded8f229SWilliam Zhang function = "i2c"; 526ded8f229SWilliam Zhang groups = "i2c_grp_b"; 527ded8f229SWilliam Zhang }; 528ded8f229SWilliam Zhang 529ded8f229SWilliam Zhang pins_i2s: i2s-pins { 530ded8f229SWilliam Zhang function = "i2s"; 531ded8f229SWilliam Zhang groups = "i2s_grp"; 532ded8f229SWilliam Zhang }; 533ded8f229SWilliam Zhang 534ded8f229SWilliam Zhang pins_nand_ctrl: nand_ctrl-pins { 535ded8f229SWilliam Zhang function = "nand_ctrl"; 536ded8f229SWilliam Zhang groups = "nand_ctrl_grp"; 537ded8f229SWilliam Zhang }; 538ded8f229SWilliam Zhang 539ded8f229SWilliam Zhang pins_nand_data: nand_data-pins { 540ded8f229SWilliam Zhang function = "nand_data"; 541ded8f229SWilliam Zhang groups = "nand_data_grp"; 542ded8f229SWilliam Zhang }; 543ded8f229SWilliam Zhang 544ded8f229SWilliam Zhang pins_emmc_ctrl: emmc_ctrl-pins { 545ded8f229SWilliam Zhang function = "emmc_ctrl"; 546ded8f229SWilliam Zhang groups = "emmc_ctrl_grp"; 547ded8f229SWilliam Zhang }; 548ded8f229SWilliam Zhang 549ded8f229SWilliam Zhang pins_usb0_pwr: usb0_pwr-pins { 550ded8f229SWilliam Zhang function = "usb0_pwr"; 551ded8f229SWilliam Zhang groups = "usb0_pwr_grp"; 552ded8f229SWilliam Zhang }; 553ded8f229SWilliam Zhang 554ded8f229SWilliam Zhang pins_usb1_pwr: usb1_pwr-pins { 555ded8f229SWilliam Zhang function = "usb1_pwr"; 556ded8f229SWilliam Zhang groups = "usb1_pwr_grp"; 557ded8f229SWilliam Zhang }; 558ded8f229SWilliam Zhang }; 559ded8f229SWilliam Zhang 560ded8f229SWilliam Zhang uart0: serial@640 { 561ded8f229SWilliam Zhang compatible = "brcm,bcm6345-uart"; 562ded8f229SWilliam Zhang reg = <0x640 0x18>; 563ded8f229SWilliam Zhang interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 564ded8f229SWilliam Zhang clocks = <&periph_clk>; 565ded8f229SWilliam Zhang clock-names = "refclk"; 566ded8f229SWilliam Zhang status = "okay"; 567ded8f229SWilliam Zhang }; 568ded8f229SWilliam Zhang 56932c3d47fSArnd Bergmann leds: leds@800 { 57032c3d47fSArnd Bergmann compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds"; 57132c3d47fSArnd Bergmann reg = <0x800 0xdc>; 57232c3d47fSArnd Bergmann 57332c3d47fSArnd Bergmann #address-cells = <1>; 57432c3d47fSArnd Bergmann #size-cells = <0>; 57532c3d47fSArnd Bergmann }; 57632c3d47fSArnd Bergmann 577f5d83b71SWilliam Zhang hsspi: spi@1000 { 578f5d83b71SWilliam Zhang #address-cells = <1>; 579f5d83b71SWilliam Zhang #size-cells = <0>; 580f5d83b71SWilliam Zhang compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0"; 581f5d83b71SWilliam Zhang reg = <0x1000 0x600>; 582f5d83b71SWilliam Zhang interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 583f5d83b71SWilliam Zhang clocks = <&hsspi_pll &hsspi_pll>; 584f5d83b71SWilliam Zhang clock-names = "hsspi", "pll"; 585f5d83b71SWilliam Zhang num-cs = <8>; 586f5d83b71SWilliam Zhang status = "disabled"; 587f5d83b71SWilliam Zhang }; 588f5d83b71SWilliam Zhang 589ded8f229SWilliam Zhang nand-controller@1800 { 590ded8f229SWilliam Zhang #address-cells = <1>; 591ded8f229SWilliam Zhang #size-cells = <0>; 592ded8f229SWilliam Zhang compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand"; 593ded8f229SWilliam Zhang reg = <0x1800 0x600>, <0x2000 0x10>; 594ded8f229SWilliam Zhang reg-names = "nand", "nand-int-base"; 595ded8f229SWilliam Zhang interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 5965cca0244SRafał Miłecki interrupt-names = "nand_ctlrdy"; 597ded8f229SWilliam Zhang status = "okay"; 598ded8f229SWilliam Zhang 599ded8f229SWilliam Zhang nandcs: nand@0 { 600ded8f229SWilliam Zhang compatible = "brcm,nandcs"; 601ded8f229SWilliam Zhang reg = <0>; 602ded8f229SWilliam Zhang }; 603ded8f229SWilliam Zhang }; 604ded8f229SWilliam Zhang 605ded8f229SWilliam Zhang i2c@2100 { 606ded8f229SWilliam Zhang compatible = "brcm,brcmper-i2c"; 607ded8f229SWilliam Zhang reg = <0x2100 0x58>; 608ded8f229SWilliam Zhang clock-frequency = <97500>; 609ded8f229SWilliam Zhang pinctrl-names = "default"; 610ded8f229SWilliam Zhang pinctrl-0 = <&pins_i2c_a>; 611ded8f229SWilliam Zhang status = "disabled"; 612ded8f229SWilliam Zhang }; 613ded8f229SWilliam Zhang 614ded8f229SWilliam Zhang misc@2600 { 615ded8f229SWilliam Zhang compatible = "brcm,misc", "simple-mfd"; 616ded8f229SWilliam Zhang reg = <0x2600 0xe4>; 617ded8f229SWilliam Zhang 618ded8f229SWilliam Zhang #address-cells = <1>; 619ded8f229SWilliam Zhang #size-cells = <1>; 620ded8f229SWilliam Zhang ranges = <0x00 0x2600 0xe4>; 621ded8f229SWilliam Zhang 622ded8f229SWilliam Zhang reset-controller@2644 { 623ded8f229SWilliam Zhang compatible = "brcm,bcm4908-misc-pcie-reset"; 624ded8f229SWilliam Zhang reg = <0x44 0x04>; 625ded8f229SWilliam Zhang #reset-cells = <1>; 626ded8f229SWilliam Zhang }; 627ded8f229SWilliam Zhang }; 628ded8f229SWilliam Zhang }; 629ded8f229SWilliam Zhang 630ded8f229SWilliam Zhang reboot { 631ded8f229SWilliam Zhang compatible = "syscon-reboot"; 632ded8f229SWilliam Zhang regmap = <&twd>; 633ded8f229SWilliam Zhang offset = <0x34>; 634ded8f229SWilliam Zhang mask = <1>; 635ded8f229SWilliam Zhang }; 636ded8f229SWilliam Zhang}; 637