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/openbmc/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
26 description: Clock to provide CLKIN reference clock signal.
28 clock-names:
35 adi,channel-spacing:
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dmax98090.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98090.c -- MAX98090 ALSA SoC Audio driver
5 * Copyright 2011-2012 Maxim Integrated Products
29 { 0x04, 0x00 }, /* 04 System Clock Quick */
46 { 0x14, 0x00 }, /* 14 Digital Mic Mode */
53 { 0x1B, 0x00 }, /* 1B System Clock */
54 { 0x1C, 0x00 }, /* 1C Clock Mode */
55 { 0x1D, 0x00 }, /* 1D Any Clock 1 */
56 { 0x1E, 0x00 }, /* 1E Any Clock 2 */
57 { 0x1F, 0x00 }, /* 1F Any Clock 3 */
[all …]
/openbmc/linux/sound/pci/hda/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "HD-Audio"
6 select SND_PCM
7 select SND_VMASTER
8 select SND_JACK
9 select SND_HDA_CORE
17 select SND_HDA
18 select SND_INTEL_DSP_CONFIG
20 Say Y here to include support for Intel "High Definition
23 This option enables the HD-audio controller. Don't forget
[all …]
/openbmc/linux/drivers/net/wireless/broadcom/b43/
H A Db43.h1 /* SPDX-License-Identifier: GPL-2.0 */
61 /* 32-bit DMA */
68 /* 64-bit DMA */
175 #define B43_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */
176 #define B43_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */
179 #define B43_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */
183 #define B43_BFL_HGPA 0x2000 /* had high gain PA */
199 #define B43_BFH_EXTLNA_5GHZ 0x1000 /* has an external LNA (5GHz mode) */
203 #define B43_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */
206 #define B43_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */
[all …]
H A Dphy_n.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* N-PHY registers. */
16 #define B43_NPHY_BANDCTL B43_PHY_N(0x009) /* Band control */
17 #define B43_NPHY_BANDCTL_5GHZ 0x0001 /* Use the 5GHz band */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
21 #define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */
22 #define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */
60 #define B43_NPHY_C1_CLIP1_HIGAIN B43_PHY_N(0x021) /* Core 1 clip1 high gain code */
[all …]
/openbmc/u-boot/drivers/video/
H A Dmvebu_lcd.c1 // SPDX-License-Identifier: GPL-2.0+
113 for (i = 0; i < dram->num_cs; i++) { in mvebu_lcd_conf_mbus_registers()
114 const struct mbus_dram_window *cs = dram->cs + i; in mvebu_lcd_conf_mbus_registers()
115 writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | in mvebu_lcd_conf_mbus_registers()
116 (dram->mbus_dram_target_id << 4) | 1, in mvebu_lcd_conf_mbus_registers()
119 writel(cs->base & 0xffff0000, regs + MVEBU_LCD_WIN_BASE(i)); in mvebu_lcd_conf_mbus_registers()
128 int x = lcd_info->x_res; in mvebu_lcd_register_init()
129 int y = lcd_info->y_res; in mvebu_lcd_register_init()
144 * end (currently 1GB-64MB but also may be 2GB-64MB). in mvebu_lcd_register_init()
147 writel(lcd_info->fb_base, regs + MVEBU_LCD_CFG_GRA_START_ADDR0); in mvebu_lcd_register_init()
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/openbmc/linux/drivers/media/dvb-frontends/
H A Dcx24123.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver
7 * Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc>
9 * Support for CX24123/CX24113-NIM by Patrick Boettcher <pb@linuxtv.org>
25 MODULE_PARM_DESC(force_band, "Force a specific band select "\
26 "(1-9, default:off).");
111 /* band 1 */
119 /* band 2 */
127 /* band 3 */
135 /* band 4 */
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/openbmc/linux/include/linux/mtd/
H A Drawnand.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
38 /* Select the chip by setting nCE to low */
40 /* Select the command latch by setting CLE to high */
42 /* Select the address latch by setting ALE to high */
75 #define NAND_CMD_NONE -1
84 #define NAND_DATA_IFACE_CHECK_ONLY -1
93 /* Enable Hardware ECC before syndrome is read back from flash */
97 * Enable generic NAND 'page erased' check. This check is only done when
98 * ecc.correct() returns -EBADMSG.
[all …]
/openbmc/linux/drivers/net/ethernet/sun/
H A Dsungem.h1 /* SPDX-License-Identifier: GPL-2.0 */
39 * This auto-clearing does not occur when the alias at GREG_STAT2
69 * signalled to the cpu. GREG_IACK can be used to clear specific top-level
111 #define TXDMA_DBHI 0x200CUL /* TX Desc. Base High */
119 #define TXDMA_DPHI 0x2034UL /* TX Data Pointer High */
130 * This 13-bit register is programmed by the driver to hold the descriptor
136 * This 13-bit register is updated by GEM to hold to descriptor entry index
148 #define TXDMA_CFG_ENABLE 0x00000001 /* Enable TX DMA channel */
159 #define TXDMA_CFG_PIOSEL 0x00000020 /* Enable TX FIFO PIO from cpu */
163 /* TX Descriptor Base Low/High.
[all …]
/openbmc/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_port.c1 // SPDX-License-Identifier: GPL-2.0+
31 status->an_complete = true; in decode_sgmii_word()
33 status->link = false; in decode_sgmii_word()
39 status->speed = SPEED_10; in decode_sgmii_word()
42 status->speed = SPEED_100; in decode_sgmii_word()
45 status->speed = SPEED_1000; in decode_sgmii_word()
48 status->link = false; in decode_sgmii_word()
52 status->duplex = DUPLEX_FULL; in decode_sgmii_word()
54 status->duplex = DUPLEX_HALF; in decode_sgmii_word()
59 status->link = !(lp_abil & ADVERTISE_RFAULT) && status->link; in decode_cl37_word()
[all …]
/openbmc/linux/Documentation/admin-guide/media/
H A Dvivid.rst1 .. SPDX-License-Identifier: GPL-2.0
13 Each input can be a webcam, TV capture device, S-Video capture device or an HDMI
14 capture device. Each output can be an S-Video output device or an HDMI output
23 - Support for read()/write(), MMAP, USERPTR and DMABUF streaming I/O.
24 - A large list of test patterns and variations thereof
25 - Working brightness, contrast, saturation and hue controls
26 - Support for the alpha color component
27 - Full colorspace support, including limited/full RGB range
28 - All possible control types are present
29 - Support for various pixel aspect ratios and video aspect ratios
[all …]
/openbmc/u-boot/drivers/net/
H A De1000.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.
10 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
36 printf("e1000: %s: ERROR: " fmt, (NIC)->name ,##args)
40 printf("e1000: %s: DEBUG: " fmt, (NIC)->name ,##args)
51 writel((value), ((a)->hw_addr + E1000_##reg))
53 readl((a)->hw_addr + E1000_##reg)
55 writel((value), ((a)->hw_addr + E1000_##reg + ((offset) << 2)))
57 readl((a)->hw_addr + E1000_##reg + ((offset) << 2))
349 #define IFE_PHY_MDIX_CONTROL 0x1C /* MDI/MDI-X Control register */
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/openbmc/linux/drivers/net/wireless/ath/ath5k/
H A Dreg.h2 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
3 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
4 * Copyright (c) 2007-2008 Michael Taylor <mike.taylor@apprion.com>
28 * 5210 - http://nova.stanford.edu/~bbaas/ps/isscc2002_slides.pdf
30 * 5211 - http://www.hotchips.org/archives/hc14/3_Tue/16_mcfarland.pdf
33 * Atheros's ART program (Atheros Radio Test), on ath9k, on legacy-hal
42 * AR5210-Specific TXDP registers
46 #define AR5K_NOQCU_TXDP0 0x0000 /* Queue 0 - data */
47 #define AR5K_NOQCU_TXDP1 0x0004 /* Queue 1 - beacons */
53 #define AR5K_CR_TXE0 0x00000001 /* TX Enable for queue 0 on 5210 */
[all …]
H A Dphy.c2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
5 * Copyright (c) 2008-2009 Felix Fietkau <nbd@openwrt.org>
42 * Here we handle the low-level functions related to baseband
48 * - Channel setting/switching
50 * - Automatic Gain Control (AGC) calibration
52 * - Noise Floor calibration
54 * - I/Q imbalance calibration (QAM correction)
56 * - Calibration due to thermal changes (gain_F)
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath10k/
H A Dtargaddrs.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2016 Qualcomm Atheros, Inc.
36 * Pointer to application-defined area, if any.
50 * General-purpose flag bits, similar to SOC_OPTION_* flags.
67 /* Clock and voltage tuning */
103 u32 hi_num_bpatch_streams; /* 0x70 -- unused */
124 * 0xa8 - [1]: 0 = UART FC active low, 1 = UART FC active high
143 /* 0xbc - [31:0]: idle timeout in ms */
150 /* If non-zero, override values sent to Host in WMI_READY event. */
[all …]
/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dmain.c3 * Copyright (c) 2013 Hauke Mehrtens <hauke@hauke-m.de>
50 /* n-mode support capability */
82 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
120 /* rfdisable delay timer 500 ms, runs of ALP clock */
133 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
167 #define BRCMS_PLCP_AUTO -1
172 #define BRCMS_PROTECTION_AUTO -1
189 /* values for band specific 40MHz capabilities */
199 /* MSC in use,indicates b0-6 holds an mcs */
203 /* stf mode mask: siso, cdd, stbc, sdm */
[all …]
/openbmc/linux/include/uapi/linux/
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
58 /* Media-dependent registers. */
59 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
60 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
61 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
62 * Lanes B-D are numbered 134-136. */
63 #define MDIO_PMA_10GBR_FSRT_CSR 147 /* 10GBASE-R fast retrain status and control */
64 #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */
[all …]
H A Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
41 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
42 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
43 #define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
44 #define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */
46 #define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */
47 #define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */
[all …]
/openbmc/linux/drivers/net/wireless/broadcom/b43legacy/
H A Db43legacy.h1 /* SPDX-License-Identifier: GPL-2.0 */
59 /* 32-bit DMA */
66 /* 64-bit DMA */
119 #define B43legacy_SHM_AUTOINC_R 0x0200 /* Read Auto-increment */
120 #define B43legacy_SHM_AUTOINC_W 0x0100 /* Write Auto-increment */
127 #define B43legacy_SHM_SH_HOSTFHI 0x0060 /* Hostflags ucode opts (high) */
153 #define B43legacy_SHM_SH_SPUWKUP 0x0094 /* pre-wakeup for synth PU in us */
154 #define B43legacy_SHM_SH_PRETBTT 0x0096 /* pre-TBTT in us */
158 /* Hardware Radio Enable masks */
163 #define B43legacy_HF_SYMW 0x00000002 /* G-PHY SYM workaround */
[all …]
/openbmc/linux/drivers/media/pci/bt8xx/
H A Ddvb-bt8xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
23 #include "dvb-bt8xx.h"
45 struct dvb_bt8xx_card *card = dev_get_drvdata(&bt->adapter->dev); in dvb_bt8xx_task()
47 dprintk("%d\n", card->bt->finished_block); in dvb_bt8xx_task()
49 while (card->bt->last_block != card->bt->finished_block) { in dvb_bt8xx_task()
50 (card->bt->TS_Size ? dvb_dmx_swfilter_204 : dvb_dmx_swfilter) in dvb_bt8xx_task()
51 (&card->demux, in dvb_bt8xx_task()
52 &card->bt->buf_cpu[card->bt->last_block * in dvb_bt8xx_task()
53 card->bt->block_bytes], in dvb_bt8xx_task()
54 card->bt->block_bytes); in dvb_bt8xx_task()
[all …]
/openbmc/linux/drivers/iio/frequency/
H A Dadf4350.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 Analog Devices Inc.
77 for (i = ADF4350_REG5; i >= ADF4350_REG0; i--) { in adf4350_sync_config()
78 if ((st->regs_hw[i] != st->regs[i]) || in adf4350_sync_config()
87 st->val = cpu_to_be32(st->regs[i] | i); in adf4350_sync_config()
88 ret = spi_write(st->spi, &st->val, 4); in adf4350_sync_config()
91 st->regs_hw[i] = st->regs[i]; in adf4350_sync_config()
92 dev_dbg(&st->spi->dev, "[%d] 0x%X\n", in adf4350_sync_config()
93 i, (u32)st->regs[i] | i); in adf4350_sync_config()
107 return -EINVAL; in adf4350_reg_access()
[all …]
/openbmc/linux/include/sound/
H A Demu10k1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 #include <sound/pcm-indirect.h>
25 /* ------------------- DEFINES -------------------- */
28 #define MAXPAGES0 4096 /* 32 bit mode */
29 #define MAXPAGES1 8192 /* 31 bit mode */
33 /* FIXME? - according to the OSS driver the EMU10K1 needs a 29 bit DMA mask */
35 #define AUDIGY_DMA_MASK 0xffffffffUL /* 32bit mode */
41 // This is used to define hardware bit-fields (sub-registers) by combining
44 // The non-concatenating (_NC) variant should be used directly only for
45 // sub-registers that do not follow the <register>_<field> naming pattern.
[all …]
/openbmc/linux/drivers/net/ethernet/intel/e1000/
H A De1000_hw.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
422 /* MAC decode size is 128K - This is the size of BAR0 */
443 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
483 /* Number of high/low register pairs in the RAR. The RAR (Receive Address
486 * E1000_RAR_ENTRIES - 1 multicast addresses.
503 /* Receive Descriptor - Extended */
529 /* Receive Descriptor - Packet Split */
553 __le16 length[3]; /* length of buffers 1-3 */
567 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
[all …]
/openbmc/linux/drivers/net/wireless/intel/iwlegacy/
H A Dcommands.h8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
92 /* Multi-Station support */
138 /* RF-KILL commands and notifications */
184 * when sending the response to each driver-originated command, so
196 * 0:7 tfd idx - position within TX queue
199 * 14 huge - driver sets this to indicate command is in the
201 * 15 unsolicited RX or uCode-originated notification
215 * 1) DSP gain (or sometimes called DSP attenuation). This is a fine-grained
[all …]
/openbmc/qemu/include/standard-headers/linux/
H A Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
41 #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
42 #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
43 #define PCI_COMMAND_MASTER 0x4 /* Enable bus mastering */
44 #define PCI_COMMAND_SPECIAL 0x8 /* Enable response to special cycles */
46 #define PCI_COMMAND_VGA_PALETTE 0x20 /* Enable palette snooping */
47 #define PCI_COMMAND_PARITY 0x40 /* Enable parity checking */
[all …]

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