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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dfaraday,ftgmac100.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: ethernet-controller.yaml#
13 - Po-Yu Chuang <ratbert@faraday-tech.com>
18 - const: faraday,ftgmac100
19 - items:
20 - enum:
21 - aspeed,ast2400-mac
22 - aspeed,ast2500-mac
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dast2500.dtsi3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
9 compatible = "aspeed,ast2500";
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&vic>;
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1176jzf-s";
54 compatible = "simple-bus";
55 #address-cells = <1>;
[all …]
H A Dast2600.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
3 #include <dt-bindings/gpio/aspeed-gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
46 #address-cells = <1>;
47 #size-cells = <0>;
48 enable-method = "aspeed,ast2600-smp";
51 compatible = "arm,cortex-a7";
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
7 compatible = "aspeed,ast2500";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
[all …]
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
[all …]
H A Daspeed-bmc-asrock-e3c246d4i.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,e3c246d4i-bmc", "aspeed,ast2500";
18 stdout-path = &uart5;
27 compatible = "gpio-leds";
32 linux,default-trigger = "timer";
[all …]
H A Daspeed-bmc-asrock-romed8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "asrock,romed8hm3-bmc", "aspeed,ast2500";
17 stdout-path = &uart5;
26 compatible = "gpio-leds";
30 linux,default-trigger = "timer";
33 system-fault {
[all …]
H A Daspeed-bmc-asrock-x570d4u.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/common.h>
9 compatible = "asrock,x570d4u-bmc", "aspeed,ast2500";
19 stdout-path = &uart5;
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
[all …]
H A Daspeed-bmc-asrock-spc621d8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,spc621d8hm3-bmc", "aspeed,ast2500";
21 stdout-path = &uart5;
30 compatible = "gpio-leds";
34 linux,default-trigger = "timer";
[all …]
H A Daspeed-bmc-asrock-e3c256d4i.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/watchdog/aspeed-wdt.h>
12 compatible = "asrock,e3c256d4i-bmc", "aspeed,ast2500";
24 stdout-path = &uart5;
33 compatible = "gpio-leds";
[all …]
H A Daspeed-bmc-facebook-minipack.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2500-facebook-netbmc-common.dtsi"
9 compatible = "facebook,minipack-bmc", "aspeed,ast2500";
23 * i2c switch 2-0070, pca9548, 8 child channels assigned
24 * with bus number 16-23.
36 * i2c switch 8-0070, pca9548, 8 child channels assigned
37 * with bus number 24-31.
49 * i2c switch 9-0070, pca9548, 8 child channels assigned
50 * with bus number 32-39.
[all …]
/openbmc/qemu/include/hw/misc/
H A Daspeed_scu.h9 * the COPYING file in the top-level directory.
19 #define TYPE_ASPEED_2400_SCU TYPE_ASPEED_SCU "-ast2400"
20 #define TYPE_ASPEED_2500_SCU TYPE_ASPEED_SCU "-ast2500"
21 #define TYPE_ASPEED_2600_SCU TYPE_ASPEED_SCU "-ast2600"
22 #define TYPE_ASPEED_2700_SCU TYPE_ASPEED_SCU "-ast2700"
23 #define TYPE_ASPEED_2700_SCUIO TYPE_ASPEED_SCU "io" "-ast2700"
24 #define TYPE_ASPEED_1030_SCU TYPE_ASPEED_SCU "-ast1030"
86 * arch/arm/mach-aspeed/include/mach/regs-scu.h
88 * Copyright (C) 2012-2020 ASPEED Technology Inc.
108 * 18:16 MAC AHB bus clock divider selection
[all …]
/openbmc/linux/drivers/net/mdio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 loadable module or built-in.
58 tristate "APM X-Gene SoC MDIO bus controller"
62 APM X-Gene SoC's.
72 third revision of the ASPEED MDIO register interface - the first two
74 AST2500, embedded in the MAC. For legacy reasons, FTGMAC100 driver
76 AST2500 SoCs, so say N if AST2600 support is not required.
101 This hardware can be found in the Broadcom GENET Ethernet MAC
109 tristate "GPIO lib-based bitbanged MDIO buses"
113 Supports GPIO lib-based MDIO busses.
[all …]
/openbmc/u-boot/arch/arm/mach-aspeed/ast2400/
H A Dscu_info.c1 // SPDX-License-Identifier: GPL-2.0+
22 SOC_ID("AST1100/AST2050-A0", 0x00000200),
23 SOC_ID("AST1100/AST2050-A1", 0x00000201),
24 SOC_ID("AST1100/AST2050-A2,3/AST2150-A0,1", 0x00000202),
25 SOC_ID("AST1510/AST2100-A0", 0x00000300),
26 SOC_ID("AST1510/AST2100-A1", 0x00000301),
27 SOC_ID("AST1510/AST2100-A2,3", 0x00000302),
28 SOC_ID("AST2200-A0,1", 0x00000102),
29 SOC_ID("AST2300-A0", 0x01000003),
30 SOC_ID("AST2300-A1", 0x01010303),
[all …]
/openbmc/u-boot/drivers/clk/aspeed/
H A Dclk_ast2500.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <clk-uclass.h>
15 #include <dt-bindings/clock/ast2500-clock.h>
16 #include <dt-bindings/reset/ast2500-reset.h>
19 * MAC Clock Delay settings, taken from Aspeed SDK
36 * For H-PLL and M-PLL the formula is
38 * M - Numerator
39 * N - Denumerator
40 * P - Post Divider
43 * D-PLL and D2-PLL have extra divider (OD + 1), which is not
[all …]
/openbmc/u-boot/arch/arm/mach-aspeed/ast2500/
H A Dscu_info.c1 // SPDX-License-Identifier: GPL-2.0+
22 SOC_ID("AST1100/AST2050-A0", 0x00000200),
23 SOC_ID("AST1100/AST2050-A1", 0x00000201),
24 SOC_ID("AST1100/AST2050-A2,3/AST2150-A0,1", 0x00000202),
25 SOC_ID("AST1510/AST2100-A0", 0x00000300),
26 SOC_ID("AST1510/AST2100-A1", 0x00000301),
27 SOC_ID("AST1510/AST2100-A2,3", 0x00000302),
28 SOC_ID("AST2200-A0,1", 0x00000102),
29 SOC_ID("AST2300-A0", 0x01000003),
30 SOC_ID("AST2300-A1", 0x01010303),
[all …]
/openbmc/phosphor-mrw-tools/docs/
H A Dmrw-xml-requirements.md5 [Serverwiz2](https://www.github.com/open-power/serverwiz). The requirements in
14 contains all FRUs (field replaceable units), along with a few non-FRU entities,
19 - Set the `FRU_NAME` attribute of that target.
50 All of the BMC chip attributes that are needed for the device tree are pre-built
54 > Note: The AST2500 is currently the only BMC XML model that contains all of the
61 spi-master-unit on the BMC that has its `SPI_FUNCTION` attribute set to
65 ### Ethernet MAC Units
67 To enable a BMC MAC module, its ethernet master unit in the MRW must be
78 This attribute in the ethernet master unit can be set to 1 if the MAC has
95 Set to the logic value required to activate the LED - either 0 or 1. The default
/openbmc/u-boot/cmd/aspeed/nettest/
H A Dmactest.c1 // SPDX-License-Identifier: GPL-2.0+
100 if (p_eng->run.speed_sel[0]) { in Print_Header()
102 } else if (p_eng->run.speed_sel[1]) { in Print_Header()
108 switch (p_eng->arg.test_mode) { in Print_Header()
119 PRINTF(option, "TX frame - ARP\n"); in Print_Header()
122 PRINTF(option, "TX frame - random\n"); in Print_Header()
125 PRINTF(option, "TX frame - 0x%08x\n", p_eng->arg.user_def_val); in Print_Header()
134 if (p_eng->arg.run_mode == MODE_NCSI) { in print_arg_test_mode()
147 printf("%20s| 3: TX frame - ARP\n", ""); in print_arg_test_mode()
148 printf("%20s| 4: TX frame - random\n", ""); in print_arg_test_mode()
[all …]
H A Dcomminf.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #include "mac.h"
13 //---------------------------------------------------------
15 //---------------------------------------------------------
33 //---------------------------------------------------------
35 //---------------------------------------------------------
69 //---------------------------------------------------------
71 //---------------------------------------------------------
88 /* MAC information */
90 /* old interface - deprecated */
[all …]
/openbmc/linux/drivers/clk/
H A Dclk-aspeed.c1 // SPDX-License-Identifier: GPL-2.0+
4 #define pr_fmt(fmt) "clk-aspeed: " fmt
13 #include <dt-bindings/clock/aspeed-clock.h>
15 #include "clk-aspeed.h"
49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
50 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
51 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
52 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
53 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */
54 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
[all …]
/openbmc/linux/drivers/net/ethernet/faraday/
H A Dftgmac100.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
12 #include <linux/dma-mapping.h>
92 /* AST2500/AST2600 RMII ref clock gate */
116 struct net_device *netdev = priv->netdev; in ftgmac100_reset_mac()
120 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
122 priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
126 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
134 return -EIO; in ftgmac100_reset_mac()
[all …]
H A Dftgmac100.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
148 * MAC control register
234 __le32 rxdes2; /* length/type on AST2500 */
/openbmc/u-boot/drivers/net/
H A Dftgmac100.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
29 /* Receive Buffer Size Register - HW default is 0x640 */
58 * struct ftgmac100_data - private data for the FTGMAC100 driver
66 * @phydev: The PHY device backing the MAC
69 * @max_speed: Maximum speed of Ethernet connection supported by MAC
103 struct ftgmac100_data *priv = bus->priv; in ftgmac100_mdio_read()
104 struct ftgmac100 *ftgmac100 = priv->iobase; in ftgmac100_mdio_read()
113 writel(phycr, &ftgmac100->phycr); in ftgmac100_mdio_read()
115 ret = readl_poll_timeout(&ftgmac100->phycr, phycr, in ftgmac100_mdio_read()
[all …]
/openbmc/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
37 * reset control and MAC clock configuration registers. The AST2500 goes a step
42 #define SCU48 0x48 /* MAC Interface Clock Delay Setting */
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
[all …]
/openbmc/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]

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