Searched +full:am3352 +full:- +full:gpmc (Results 1 – 16 of 16) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments GPMC Memory Controller 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 14 The GPMC is a unified memory controller dedicated for interfacing 16 - Asynchronous SRAM-like memories and ASICs 17 - Asynchronous, synchronous, and page mode burst NOR flash [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | am33xx.dtsi | 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/pinctrl/am33xx.h> 13 #include <dt-bindings/clock/am3.h> 17 interrupt-parent = <&intc>; 18 #address-cells = <1>; 19 #size-cells = <1>; 32 d-can0 = &dcan0; 33 d-can1 = &dcan1; 45 #address-cells = <1>; [all …]
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H A D | dm816x.dtsi | 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/omap.h> 12 interrupt-parent = <&intc>; 13 #address-cells = <1>; 14 #size-cells = <1>; 28 #address-cells = <1>; 29 #size-cells = <0>; 31 compatible = "arm,cortex-a8"; 38 compatible = "arm,cortex-a8-pmu"; 47 compatible = "ti,omap-infra"; [all …]
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H A D | am4372.dtsi | 4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&wakeupgen>; 32 #address-cells = <1>; 33 #size-cells = <0>; 35 compatible = "arm,cortex-a9"; 40 clock-names = "cpu"; 42 clock-latency = <300000>; /* From omap-cpufreq driver */ 46 gic: interrupt-controller@48241000 { [all …]
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H A D | dra7.dtsi | 2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 20 interrupt-parent = <&crossbar_mpu>; 47 compatible = "arm,armv7-timer"; 52 interrupt-parent = <&gic>; 55 gic: interrupt-controller@48211000 { 56 compatible = "arm,cortex-a15-gic"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mtd/ |
H A D | ti,gpmc-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments GPMC NAND Flash controller. 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 14 GPMC NAND controller/Flash is represented as a child of the 15 GPMC controller node. 20 - enum: [all …]
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H A D | ti,elm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Roger Quadros <rogerq@kernel.org> 13 ELM module is used together with GPMC and NAND Flash to detect 20 - ti,am3352-elm 21 - ti,am64-elm 33 clock-names: 35 - const: fck 37 power-domains: [all …]
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | dm816x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/bus/ti-sysc.h> 4 #include <dt-bindings/clock/dm816.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/omap.h> 10 interrupt-parent = <&intc>; 11 #address-cells = <1>; 12 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; [all …]
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H A D | dm814x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/bus/ti-sysc.h> 4 #include <dt-bindings/clock/dm814.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/dm814x.h> 10 interrupt-parent = <&intc>; 11 #address-cells = <1>; 12 #size-cells = <1>; 30 #address-cells = <1>; 31 #size-cells = <0>; [all …]
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H A D | am335x-nano.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/ 5 /dts-v1/; 15 cpu0-supply = <&dcdc2_reg>; 25 compatible = "gpio-leds"; 30 default-state = "off"; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&misc_pins>; 39 misc_pins: misc-pins { 40 pinctrl-single,pins = < [all …]
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H A D | am33xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/pinctrl/am33xx.h> 11 #include <dt-bindings/clock/am3.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 30 d-can0 = &dcan0; [all …]
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H A D | am4372.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/am4.h> 15 interrupt-parent = <&wakeupgen>; 16 #address-cells = <1>; 17 #size-cells = <1>; 41 #address-cells = <1>; [all …]
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H A D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 12 #include <dt-bindings/clock/dra7.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 21 interrupt-parent = <&crossbar_mpu>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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/openbmc/linux/drivers/memory/ |
H A D | omap-gpmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * GPMC support functions 5 * Copyright (C) 2005-2006 Nokia Corporation 10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> 32 #include <linux/omap-gpmc.h> 36 #include <linux/platform_data/mtd-nand-omap2.h> 38 #define DEVICE_NAME "omap-gpmc" 40 /* GPMC register offsets */ 67 /* GPMC ECC control settings */ 96 * The first 1MB of GPMC address space is typically mapped to [all …]
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/openbmc/linux/drivers/mtd/nand/raw/ |
H A D | omap_elm.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 8 #define DRIVER_NAME "omap-elm" 50 /* ELM_ERROR_LOCATION_0-15 Registers */ 87 writel(val, info->elm_base + offset); in elm_write_reg() 92 return readl(info->elm_base + offset); in elm_read_reg() 96 * elm_config - Configure ELM module 110 dev_err(dev, "Unable to configure elm - device not probed?\n"); in elm_config() 111 return -EPROBE_DEFER; in elm_config() 115 dev_err(dev, "unsupported config ecc-size=%d\n", ecc_step_size); in elm_config() [all …]
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