1*708ca4daSTom Rini/* 2*708ca4daSTom Rini * This file is licensed under the terms of the GNU General Public License 3*708ca4daSTom Rini * version 2. This program is licensed "as is" without any warranty of any 4*708ca4daSTom Rini * kind, whether express or implied. 5*708ca4daSTom Rini */ 6*708ca4daSTom Rini 7*708ca4daSTom Rini#include <dt-bindings/gpio/gpio.h> 8*708ca4daSTom Rini#include <dt-bindings/pinctrl/omap.h> 9*708ca4daSTom Rini 10*708ca4daSTom Rini/ { 11*708ca4daSTom Rini compatible = "ti,dm816"; 12*708ca4daSTom Rini interrupt-parent = <&intc>; 13*708ca4daSTom Rini #address-cells = <1>; 14*708ca4daSTom Rini #size-cells = <1>; 15*708ca4daSTom Rini chosen { }; 16*708ca4daSTom Rini 17*708ca4daSTom Rini aliases { 18*708ca4daSTom Rini i2c0 = &i2c1; 19*708ca4daSTom Rini i2c1 = &i2c2; 20*708ca4daSTom Rini serial0 = &uart1; 21*708ca4daSTom Rini serial1 = &uart2; 22*708ca4daSTom Rini serial2 = &uart3; 23*708ca4daSTom Rini ethernet0 = ð0; 24*708ca4daSTom Rini ethernet1 = ð1; 25*708ca4daSTom Rini }; 26*708ca4daSTom Rini 27*708ca4daSTom Rini cpus { 28*708ca4daSTom Rini #address-cells = <1>; 29*708ca4daSTom Rini #size-cells = <0>; 30*708ca4daSTom Rini cpu@0 { 31*708ca4daSTom Rini compatible = "arm,cortex-a8"; 32*708ca4daSTom Rini device_type = "cpu"; 33*708ca4daSTom Rini reg = <0>; 34*708ca4daSTom Rini }; 35*708ca4daSTom Rini }; 36*708ca4daSTom Rini 37*708ca4daSTom Rini pmu { 38*708ca4daSTom Rini compatible = "arm,cortex-a8-pmu"; 39*708ca4daSTom Rini interrupts = <3>; 40*708ca4daSTom Rini }; 41*708ca4daSTom Rini 42*708ca4daSTom Rini /* 43*708ca4daSTom Rini * The soc node represents the soc top level view. It is used for IPs 44*708ca4daSTom Rini * that are not memory mapped in the MPU view or for the MPU itself. 45*708ca4daSTom Rini */ 46*708ca4daSTom Rini soc { 47*708ca4daSTom Rini compatible = "ti,omap-infra"; 48*708ca4daSTom Rini mpu { 49*708ca4daSTom Rini compatible = "ti,omap3-mpu"; 50*708ca4daSTom Rini ti,hwmods = "mpu"; 51*708ca4daSTom Rini }; 52*708ca4daSTom Rini }; 53*708ca4daSTom Rini 54*708ca4daSTom Rini /* 55*708ca4daSTom Rini * XXX: Use a flat representation of the dm816x interconnect. 56*708ca4daSTom Rini * The real dm816x interconnect network is quite complex. Since 57*708ca4daSTom Rini * it will not bring real advantage to represent that in DT 58*708ca4daSTom Rini * for the moment, just use a fake OCP bus entry to represent 59*708ca4daSTom Rini * the whole bus hierarchy. 60*708ca4daSTom Rini */ 61*708ca4daSTom Rini ocp { 62*708ca4daSTom Rini compatible = "simple-bus"; 63*708ca4daSTom Rini reg = <0x44000000 0x10000>; 64*708ca4daSTom Rini interrupts = <9 10>; 65*708ca4daSTom Rini #address-cells = <1>; 66*708ca4daSTom Rini #size-cells = <1>; 67*708ca4daSTom Rini ranges; 68*708ca4daSTom Rini 69*708ca4daSTom Rini prcm: prcm@48180000 { 70*708ca4daSTom Rini compatible = "ti,dm816-prcm"; 71*708ca4daSTom Rini reg = <0x48180000 0x4000>; 72*708ca4daSTom Rini 73*708ca4daSTom Rini prcm_clocks: clocks { 74*708ca4daSTom Rini #address-cells = <1>; 75*708ca4daSTom Rini #size-cells = <0>; 76*708ca4daSTom Rini }; 77*708ca4daSTom Rini 78*708ca4daSTom Rini prcm_clockdomains: clockdomains { 79*708ca4daSTom Rini }; 80*708ca4daSTom Rini }; 81*708ca4daSTom Rini 82*708ca4daSTom Rini scrm: scrm@48140000 { 83*708ca4daSTom Rini compatible = "ti,dm816-scrm", "simple-bus"; 84*708ca4daSTom Rini reg = <0x48140000 0x21000>; 85*708ca4daSTom Rini #address-cells = <1>; 86*708ca4daSTom Rini #size-cells = <1>; 87*708ca4daSTom Rini #pinctrl-cells = <1>; 88*708ca4daSTom Rini ranges = <0 0x48140000 0x21000>; 89*708ca4daSTom Rini 90*708ca4daSTom Rini dm816x_pinmux: pinmux@800 { 91*708ca4daSTom Rini compatible = "pinctrl-single"; 92*708ca4daSTom Rini reg = <0x800 0x50a>; 93*708ca4daSTom Rini #pinctrl-cells = <1>; 94*708ca4daSTom Rini pinctrl-single,register-width = <16>; 95*708ca4daSTom Rini pinctrl-single,function-mask = <0xf>; 96*708ca4daSTom Rini }; 97*708ca4daSTom Rini 98*708ca4daSTom Rini /* Device Configuration Registers */ 99*708ca4daSTom Rini scm_conf: syscon@600 { 100*708ca4daSTom Rini compatible = "syscon", "simple-bus"; 101*708ca4daSTom Rini reg = <0x600 0x110>; 102*708ca4daSTom Rini #address-cells = <1>; 103*708ca4daSTom Rini #size-cells = <1>; 104*708ca4daSTom Rini ranges = <0 0x600 0x110>; 105*708ca4daSTom Rini 106*708ca4daSTom Rini usb_phy0: usb-phy@20 { 107*708ca4daSTom Rini compatible = "ti,dm8168-usb-phy"; 108*708ca4daSTom Rini reg = <0x20 0x8>; 109*708ca4daSTom Rini reg-names = "phy"; 110*708ca4daSTom Rini clocks = <&main_fapll 6>; 111*708ca4daSTom Rini clock-names = "refclk"; 112*708ca4daSTom Rini #phy-cells = <0>; 113*708ca4daSTom Rini syscon = <&scm_conf>; 114*708ca4daSTom Rini }; 115*708ca4daSTom Rini 116*708ca4daSTom Rini usb_phy1: usb-phy@28 { 117*708ca4daSTom Rini compatible = "ti,dm8168-usb-phy"; 118*708ca4daSTom Rini reg = <0x28 0x8>; 119*708ca4daSTom Rini reg-names = "phy"; 120*708ca4daSTom Rini clocks = <&main_fapll 6>; 121*708ca4daSTom Rini clock-names = "refclk"; 122*708ca4daSTom Rini #phy-cells = <0>; 123*708ca4daSTom Rini syscon = <&scm_conf>; 124*708ca4daSTom Rini }; 125*708ca4daSTom Rini }; 126*708ca4daSTom Rini 127*708ca4daSTom Rini scrm_clocks: clocks { 128*708ca4daSTom Rini }; 129*708ca4daSTom Rini 130*708ca4daSTom Rini scrm_clockdomains: clockdomains { 131*708ca4daSTom Rini }; 132*708ca4daSTom Rini }; 133*708ca4daSTom Rini 134*708ca4daSTom Rini edma: edma@49000000 { 135*708ca4daSTom Rini compatible = "ti,edma3"; 136*708ca4daSTom Rini ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3"; 137*708ca4daSTom Rini reg = <0x49000000 0x10000>, 138*708ca4daSTom Rini <0x44e10f90 0x40>; 139*708ca4daSTom Rini interrupts = <12 13 14>; 140*708ca4daSTom Rini #dma-cells = <1>; 141*708ca4daSTom Rini }; 142*708ca4daSTom Rini 143*708ca4daSTom Rini elm: elm@48080000 { 144*708ca4daSTom Rini compatible = "ti,816-elm"; 145*708ca4daSTom Rini ti,hwmods = "elm"; 146*708ca4daSTom Rini reg = <0x48080000 0x2000>; 147*708ca4daSTom Rini interrupts = <4>; 148*708ca4daSTom Rini }; 149*708ca4daSTom Rini 150*708ca4daSTom Rini gpio1: gpio@48032000 { 151*708ca4daSTom Rini compatible = "ti,omap4-gpio"; 152*708ca4daSTom Rini ti,hwmods = "gpio1"; 153*708ca4daSTom Rini ti,gpio-always-on; 154*708ca4daSTom Rini reg = <0x48032000 0x1000>; 155*708ca4daSTom Rini interrupts = <96>; 156*708ca4daSTom Rini gpio-controller; 157*708ca4daSTom Rini #gpio-cells = <2>; 158*708ca4daSTom Rini interrupt-controller; 159*708ca4daSTom Rini #interrupt-cells = <2>; 160*708ca4daSTom Rini }; 161*708ca4daSTom Rini 162*708ca4daSTom Rini gpio2: gpio@4804c000 { 163*708ca4daSTom Rini compatible = "ti,omap4-gpio"; 164*708ca4daSTom Rini ti,hwmods = "gpio2"; 165*708ca4daSTom Rini ti,gpio-always-on; 166*708ca4daSTom Rini reg = <0x4804c000 0x1000>; 167*708ca4daSTom Rini interrupts = <98>; 168*708ca4daSTom Rini gpio-controller; 169*708ca4daSTom Rini #gpio-cells = <2>; 170*708ca4daSTom Rini interrupt-controller; 171*708ca4daSTom Rini #interrupt-cells = <2>; 172*708ca4daSTom Rini }; 173*708ca4daSTom Rini 174*708ca4daSTom Rini gpmc: gpmc@50000000 { 175*708ca4daSTom Rini compatible = "ti,am3352-gpmc"; 176*708ca4daSTom Rini ti,hwmods = "gpmc"; 177*708ca4daSTom Rini reg = <0x50000000 0x2000>; 178*708ca4daSTom Rini #address-cells = <2>; 179*708ca4daSTom Rini #size-cells = <1>; 180*708ca4daSTom Rini interrupts = <100>; 181*708ca4daSTom Rini dmas = <&edma 52>; 182*708ca4daSTom Rini dma-names = "rxtx"; 183*708ca4daSTom Rini gpmc,num-cs = <6>; 184*708ca4daSTom Rini gpmc,num-waitpins = <2>; 185*708ca4daSTom Rini interrupt-controller; 186*708ca4daSTom Rini #interrupt-cells = <2>; 187*708ca4daSTom Rini gpio-controller; 188*708ca4daSTom Rini #gpio-cells = <2>; 189*708ca4daSTom Rini }; 190*708ca4daSTom Rini 191*708ca4daSTom Rini i2c1: i2c@48028000 { 192*708ca4daSTom Rini compatible = "ti,omap4-i2c"; 193*708ca4daSTom Rini ti,hwmods = "i2c1"; 194*708ca4daSTom Rini reg = <0x48028000 0x1000>; 195*708ca4daSTom Rini #address-cells = <1>; 196*708ca4daSTom Rini #size-cells = <0>; 197*708ca4daSTom Rini interrupts = <70>; 198*708ca4daSTom Rini dmas = <&edma 58 &edma 59>; 199*708ca4daSTom Rini dma-names = "tx", "rx"; 200*708ca4daSTom Rini }; 201*708ca4daSTom Rini 202*708ca4daSTom Rini i2c2: i2c@4802a000 { 203*708ca4daSTom Rini compatible = "ti,omap4-i2c"; 204*708ca4daSTom Rini ti,hwmods = "i2c2"; 205*708ca4daSTom Rini reg = <0x4802a000 0x1000>; 206*708ca4daSTom Rini #address-cells = <1>; 207*708ca4daSTom Rini #size-cells = <0>; 208*708ca4daSTom Rini interrupts = <71>; 209*708ca4daSTom Rini dmas = <&edma 60 &edma 61>; 210*708ca4daSTom Rini dma-names = "tx", "rx"; 211*708ca4daSTom Rini }; 212*708ca4daSTom Rini 213*708ca4daSTom Rini intc: interrupt-controller@48200000 { 214*708ca4daSTom Rini compatible = "ti,dm816-intc"; 215*708ca4daSTom Rini interrupt-controller; 216*708ca4daSTom Rini #interrupt-cells = <1>; 217*708ca4daSTom Rini reg = <0x48200000 0x1000>; 218*708ca4daSTom Rini }; 219*708ca4daSTom Rini 220*708ca4daSTom Rini rtc: rtc@480c0000 { 221*708ca4daSTom Rini compatible = "ti,am3352-rtc", "ti,da830-rtc"; 222*708ca4daSTom Rini reg = <0x480c0000 0x1000>; 223*708ca4daSTom Rini interrupts = <75 76>; 224*708ca4daSTom Rini ti,hwmods = "rtc"; 225*708ca4daSTom Rini }; 226*708ca4daSTom Rini 227*708ca4daSTom Rini mailbox: mailbox@480c8000 { 228*708ca4daSTom Rini compatible = "ti,omap4-mailbox"; 229*708ca4daSTom Rini reg = <0x480c8000 0x2000>; 230*708ca4daSTom Rini interrupts = <77>; 231*708ca4daSTom Rini ti,hwmods = "mailbox"; 232*708ca4daSTom Rini #mbox-cells = <1>; 233*708ca4daSTom Rini ti,mbox-num-users = <4>; 234*708ca4daSTom Rini ti,mbox-num-fifos = <12>; 235*708ca4daSTom Rini mbox_dsp: mbox_dsp { 236*708ca4daSTom Rini ti,mbox-tx = <3 0 0>; 237*708ca4daSTom Rini ti,mbox-rx = <0 0 0>; 238*708ca4daSTom Rini }; 239*708ca4daSTom Rini }; 240*708ca4daSTom Rini 241*708ca4daSTom Rini spinbox: spinbox@480ca000 { 242*708ca4daSTom Rini compatible = "ti,omap4-hwspinlock"; 243*708ca4daSTom Rini reg = <0x480ca000 0x2000>; 244*708ca4daSTom Rini ti,hwmods = "spinbox"; 245*708ca4daSTom Rini #hwlock-cells = <1>; 246*708ca4daSTom Rini }; 247*708ca4daSTom Rini 248*708ca4daSTom Rini mdio: mdio@4a100800 { 249*708ca4daSTom Rini compatible = "ti,davinci_mdio"; 250*708ca4daSTom Rini #address-cells = <1>; 251*708ca4daSTom Rini #size-cells = <0>; 252*708ca4daSTom Rini reg = <0x4a100800 0x100>; 253*708ca4daSTom Rini ti,hwmods = "davinci_mdio"; 254*708ca4daSTom Rini bus_freq = <1000000>; 255*708ca4daSTom Rini phy0: ethernet-phy@0 { 256*708ca4daSTom Rini reg = <1>; 257*708ca4daSTom Rini }; 258*708ca4daSTom Rini phy1: ethernet-phy@1 { 259*708ca4daSTom Rini reg = <2>; 260*708ca4daSTom Rini }; 261*708ca4daSTom Rini }; 262*708ca4daSTom Rini 263*708ca4daSTom Rini eth0: ethernet@4a100000 { 264*708ca4daSTom Rini compatible = "ti,dm816-emac"; 265*708ca4daSTom Rini ti,hwmods = "emac0"; 266*708ca4daSTom Rini reg = <0x4a100000 0x800 267*708ca4daSTom Rini 0x4a100900 0x3700>; 268*708ca4daSTom Rini clocks = <&sysclk24_ck>; 269*708ca4daSTom Rini syscon = <&scm_conf>; 270*708ca4daSTom Rini ti,davinci-ctrl-reg-offset = <0>; 271*708ca4daSTom Rini ti,davinci-ctrl-mod-reg-offset = <0x900>; 272*708ca4daSTom Rini ti,davinci-ctrl-ram-offset = <0x2000>; 273*708ca4daSTom Rini ti,davinci-ctrl-ram-size = <0x2000>; 274*708ca4daSTom Rini interrupts = <40 41 42 43>; 275*708ca4daSTom Rini phy-handle = <&phy0>; 276*708ca4daSTom Rini }; 277*708ca4daSTom Rini 278*708ca4daSTom Rini eth1: ethernet@4a120000 { 279*708ca4daSTom Rini compatible = "ti,dm816-emac"; 280*708ca4daSTom Rini ti,hwmods = "emac1"; 281*708ca4daSTom Rini reg = <0x4a120000 0x4000>; 282*708ca4daSTom Rini clocks = <&sysclk24_ck>; 283*708ca4daSTom Rini syscon = <&scm_conf>; 284*708ca4daSTom Rini ti,davinci-ctrl-reg-offset = <0>; 285*708ca4daSTom Rini ti,davinci-ctrl-mod-reg-offset = <0x900>; 286*708ca4daSTom Rini ti,davinci-ctrl-ram-offset = <0x2000>; 287*708ca4daSTom Rini ti,davinci-ctrl-ram-size = <0x2000>; 288*708ca4daSTom Rini interrupts = <44 45 46 47>; 289*708ca4daSTom Rini phy-handle = <&phy1>; 290*708ca4daSTom Rini }; 291*708ca4daSTom Rini 292*708ca4daSTom Rini mcspi1: spi@48030000 { 293*708ca4daSTom Rini compatible = "ti,omap4-mcspi"; 294*708ca4daSTom Rini reg = <0x48030000 0x1000>; 295*708ca4daSTom Rini #address-cells = <1>; 296*708ca4daSTom Rini #size-cells = <0>; 297*708ca4daSTom Rini interrupts = <65>; 298*708ca4daSTom Rini ti,spi-num-cs = <4>; 299*708ca4daSTom Rini ti,hwmods = "mcspi1"; 300*708ca4daSTom Rini dmas = <&edma 16 &edma 17 301*708ca4daSTom Rini &edma 18 &edma 19 302*708ca4daSTom Rini &edma 20 &edma 21 303*708ca4daSTom Rini &edma 22 &edma 23>; 304*708ca4daSTom Rini dma-names = "tx0", "rx0", "tx1", "rx1", 305*708ca4daSTom Rini "tx2", "rx2", "tx3", "rx3"; 306*708ca4daSTom Rini }; 307*708ca4daSTom Rini 308*708ca4daSTom Rini mmc1: mmc@48060000 { 309*708ca4daSTom Rini compatible = "ti,omap4-hsmmc"; 310*708ca4daSTom Rini reg = <0x48060000 0x11000>; 311*708ca4daSTom Rini ti,hwmods = "mmc1"; 312*708ca4daSTom Rini interrupts = <64>; 313*708ca4daSTom Rini dmas = <&edma 24 &edma 25>; 314*708ca4daSTom Rini dma-names = "tx", "rx"; 315*708ca4daSTom Rini }; 316*708ca4daSTom Rini 317*708ca4daSTom Rini timer1: timer@4802e000 { 318*708ca4daSTom Rini compatible = "ti,dm816-timer"; 319*708ca4daSTom Rini reg = <0x4802e000 0x2000>; 320*708ca4daSTom Rini interrupts = <67>; 321*708ca4daSTom Rini ti,hwmods = "timer1"; 322*708ca4daSTom Rini ti,timer-alwon; 323*708ca4daSTom Rini }; 324*708ca4daSTom Rini 325*708ca4daSTom Rini timer2: timer@48040000 { 326*708ca4daSTom Rini compatible = "ti,dm816-timer"; 327*708ca4daSTom Rini reg = <0x48040000 0x2000>; 328*708ca4daSTom Rini interrupts = <68>; 329*708ca4daSTom Rini ti,hwmods = "timer2"; 330*708ca4daSTom Rini }; 331*708ca4daSTom Rini 332*708ca4daSTom Rini timer3: timer@48042000 { 333*708ca4daSTom Rini compatible = "ti,dm816-timer"; 334*708ca4daSTom Rini reg = <0x48042000 0x2000>; 335*708ca4daSTom Rini interrupts = <69>; 336*708ca4daSTom Rini ti,hwmods = "timer3"; 337*708ca4daSTom Rini }; 338*708ca4daSTom Rini 339*708ca4daSTom Rini timer4: timer@48044000 { 340*708ca4daSTom Rini compatible = "ti,dm816-timer"; 341*708ca4daSTom Rini reg = <0x48044000 0x2000>; 342*708ca4daSTom Rini interrupts = <92>; 343*708ca4daSTom Rini ti,hwmods = "timer4"; 344*708ca4daSTom Rini ti,timer-pwm; 345*708ca4daSTom Rini }; 346*708ca4daSTom Rini 347*708ca4daSTom Rini timer5: timer@48046000 { 348*708ca4daSTom Rini compatible = "ti,dm816-timer"; 349*708ca4daSTom Rini reg = <0x48046000 0x2000>; 350*708ca4daSTom Rini interrupts = <93>; 351*708ca4daSTom Rini ti,hwmods = "timer5"; 352*708ca4daSTom Rini ti,timer-pwm; 353*708ca4daSTom Rini }; 354*708ca4daSTom Rini 355*708ca4daSTom Rini timer6: timer@48048000 { 356*708ca4daSTom Rini compatible = "ti,dm816-timer"; 357*708ca4daSTom Rini reg = <0x48048000 0x2000>; 358*708ca4daSTom Rini interrupts = <94>; 359*708ca4daSTom Rini ti,hwmods = "timer6"; 360*708ca4daSTom Rini ti,timer-pwm; 361*708ca4daSTom Rini }; 362*708ca4daSTom Rini 363*708ca4daSTom Rini timer7: timer@4804a000 { 364*708ca4daSTom Rini compatible = "ti,dm816-timer"; 365*708ca4daSTom Rini reg = <0x4804a000 0x2000>; 366*708ca4daSTom Rini interrupts = <95>; 367*708ca4daSTom Rini ti,hwmods = "timer7"; 368*708ca4daSTom Rini ti,timer-pwm; 369*708ca4daSTom Rini }; 370*708ca4daSTom Rini 371*708ca4daSTom Rini uart1: uart@48020000 { 372*708ca4daSTom Rini compatible = "ti,am3352-uart", "ti,omap3-uart"; 373*708ca4daSTom Rini ti,hwmods = "uart1"; 374*708ca4daSTom Rini reg = <0x48020000 0x2000>; 375*708ca4daSTom Rini clock-frequency = <48000000>; 376*708ca4daSTom Rini interrupts = <72>; 377*708ca4daSTom Rini dmas = <&edma 26 &edma 27>; 378*708ca4daSTom Rini dma-names = "tx", "rx"; 379*708ca4daSTom Rini }; 380*708ca4daSTom Rini 381*708ca4daSTom Rini uart2: uart@48022000 { 382*708ca4daSTom Rini compatible = "ti,am3352-uart", "ti,omap3-uart"; 383*708ca4daSTom Rini ti,hwmods = "uart2"; 384*708ca4daSTom Rini reg = <0x48022000 0x2000>; 385*708ca4daSTom Rini clock-frequency = <48000000>; 386*708ca4daSTom Rini interrupts = <73>; 387*708ca4daSTom Rini dmas = <&edma 28 &edma 29>; 388*708ca4daSTom Rini dma-names = "tx", "rx"; 389*708ca4daSTom Rini }; 390*708ca4daSTom Rini 391*708ca4daSTom Rini uart3: uart@48024000 { 392*708ca4daSTom Rini compatible = "ti,am3352-uart", "ti,omap3-uart"; 393*708ca4daSTom Rini ti,hwmods = "uart3"; 394*708ca4daSTom Rini reg = <0x48024000 0x2000>; 395*708ca4daSTom Rini clock-frequency = <48000000>; 396*708ca4daSTom Rini interrupts = <74>; 397*708ca4daSTom Rini dmas = <&edma 30 &edma 31>; 398*708ca4daSTom Rini dma-names = "tx", "rx"; 399*708ca4daSTom Rini }; 400*708ca4daSTom Rini 401*708ca4daSTom Rini /* NOTE: USB needs a transceiver driver for phys to work */ 402*708ca4daSTom Rini usb: usb_otg_hs@47401000 { 403*708ca4daSTom Rini compatible = "ti,am33xx-usb"; 404*708ca4daSTom Rini reg = <0x47401000 0x400000>; 405*708ca4daSTom Rini ranges; 406*708ca4daSTom Rini #address-cells = <1>; 407*708ca4daSTom Rini #size-cells = <1>; 408*708ca4daSTom Rini ti,hwmods = "usb_otg_hs"; 409*708ca4daSTom Rini 410*708ca4daSTom Rini usb0: usb@47401000 { 411*708ca4daSTom Rini compatible = "ti,musb-dm816"; 412*708ca4daSTom Rini reg = <0x47401400 0x400 413*708ca4daSTom Rini 0x47401000 0x200>; 414*708ca4daSTom Rini reg-names = "mc", "control"; 415*708ca4daSTom Rini interrupts = <18>; 416*708ca4daSTom Rini interrupt-names = "mc"; 417*708ca4daSTom Rini dr_mode = "host"; 418*708ca4daSTom Rini interface-type = <0>; 419*708ca4daSTom Rini phys = <&usb_phy0>; 420*708ca4daSTom Rini phy-names = "usb2-phy"; 421*708ca4daSTom Rini mentor,multipoint = <1>; 422*708ca4daSTom Rini mentor,num-eps = <16>; 423*708ca4daSTom Rini mentor,ram-bits = <12>; 424*708ca4daSTom Rini mentor,power = <500>; 425*708ca4daSTom Rini 426*708ca4daSTom Rini dmas = <&cppi41dma 0 0 &cppi41dma 1 0 427*708ca4daSTom Rini &cppi41dma 2 0 &cppi41dma 3 0 428*708ca4daSTom Rini &cppi41dma 4 0 &cppi41dma 5 0 429*708ca4daSTom Rini &cppi41dma 6 0 &cppi41dma 7 0 430*708ca4daSTom Rini &cppi41dma 8 0 &cppi41dma 9 0 431*708ca4daSTom Rini &cppi41dma 10 0 &cppi41dma 11 0 432*708ca4daSTom Rini &cppi41dma 12 0 &cppi41dma 13 0 433*708ca4daSTom Rini &cppi41dma 14 0 &cppi41dma 0 1 434*708ca4daSTom Rini &cppi41dma 1 1 &cppi41dma 2 1 435*708ca4daSTom Rini &cppi41dma 3 1 &cppi41dma 4 1 436*708ca4daSTom Rini &cppi41dma 5 1 &cppi41dma 6 1 437*708ca4daSTom Rini &cppi41dma 7 1 &cppi41dma 8 1 438*708ca4daSTom Rini &cppi41dma 9 1 &cppi41dma 10 1 439*708ca4daSTom Rini &cppi41dma 11 1 &cppi41dma 12 1 440*708ca4daSTom Rini &cppi41dma 13 1 &cppi41dma 14 1>; 441*708ca4daSTom Rini dma-names = 442*708ca4daSTom Rini "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 443*708ca4daSTom Rini "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 444*708ca4daSTom Rini "rx14", "rx15", 445*708ca4daSTom Rini "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 446*708ca4daSTom Rini "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 447*708ca4daSTom Rini "tx14", "tx15"; 448*708ca4daSTom Rini }; 449*708ca4daSTom Rini 450*708ca4daSTom Rini usb1: usb@47401800 { 451*708ca4daSTom Rini compatible = "ti,musb-dm816"; 452*708ca4daSTom Rini reg = <0x47401c00 0x400 453*708ca4daSTom Rini 0x47401800 0x200>; 454*708ca4daSTom Rini reg-names = "mc", "control"; 455*708ca4daSTom Rini interrupts = <19>; 456*708ca4daSTom Rini interrupt-names = "mc"; 457*708ca4daSTom Rini dr_mode = "host"; 458*708ca4daSTom Rini interface-type = <0>; 459*708ca4daSTom Rini phys = <&usb_phy1>; 460*708ca4daSTom Rini phy-names = "usb2-phy"; 461*708ca4daSTom Rini mentor,multipoint = <1>; 462*708ca4daSTom Rini mentor,num-eps = <16>; 463*708ca4daSTom Rini mentor,ram-bits = <12>; 464*708ca4daSTom Rini mentor,power = <500>; 465*708ca4daSTom Rini 466*708ca4daSTom Rini dmas = <&cppi41dma 15 0 &cppi41dma 16 0 467*708ca4daSTom Rini &cppi41dma 17 0 &cppi41dma 18 0 468*708ca4daSTom Rini &cppi41dma 19 0 &cppi41dma 20 0 469*708ca4daSTom Rini &cppi41dma 21 0 &cppi41dma 22 0 470*708ca4daSTom Rini &cppi41dma 23 0 &cppi41dma 24 0 471*708ca4daSTom Rini &cppi41dma 25 0 &cppi41dma 26 0 472*708ca4daSTom Rini &cppi41dma 27 0 &cppi41dma 28 0 473*708ca4daSTom Rini &cppi41dma 29 0 &cppi41dma 15 1 474*708ca4daSTom Rini &cppi41dma 16 1 &cppi41dma 17 1 475*708ca4daSTom Rini &cppi41dma 18 1 &cppi41dma 19 1 476*708ca4daSTom Rini &cppi41dma 20 1 &cppi41dma 21 1 477*708ca4daSTom Rini &cppi41dma 22 1 &cppi41dma 23 1 478*708ca4daSTom Rini &cppi41dma 24 1 &cppi41dma 25 1 479*708ca4daSTom Rini &cppi41dma 26 1 &cppi41dma 27 1 480*708ca4daSTom Rini &cppi41dma 28 1 &cppi41dma 29 1>; 481*708ca4daSTom Rini dma-names = 482*708ca4daSTom Rini "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", 483*708ca4daSTom Rini "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", 484*708ca4daSTom Rini "rx14", "rx15", 485*708ca4daSTom Rini "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", 486*708ca4daSTom Rini "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", 487*708ca4daSTom Rini "tx14", "tx15"; 488*708ca4daSTom Rini }; 489*708ca4daSTom Rini 490*708ca4daSTom Rini cppi41dma: dma-controller@47402000 { 491*708ca4daSTom Rini compatible = "ti,am3359-cppi41"; 492*708ca4daSTom Rini reg = <0x47400000 0x1000 493*708ca4daSTom Rini 0x47402000 0x1000 494*708ca4daSTom Rini 0x47403000 0x1000 495*708ca4daSTom Rini 0x47404000 0x4000>; 496*708ca4daSTom Rini reg-names = "glue", "controller", "scheduler", "queuemgr"; 497*708ca4daSTom Rini interrupts = <17>; 498*708ca4daSTom Rini interrupt-names = "glue"; 499*708ca4daSTom Rini #dma-cells = <2>; 500*708ca4daSTom Rini #dma-channels = <30>; 501*708ca4daSTom Rini #dma-requests = <256>; 502*708ca4daSTom Rini }; 503*708ca4daSTom Rini }; 504*708ca4daSTom Rini 505*708ca4daSTom Rini wd_timer2: wd_timer@480c2000 { 506*708ca4daSTom Rini compatible = "ti,omap3-wdt"; 507*708ca4daSTom Rini ti,hwmods = "wd_timer"; 508*708ca4daSTom Rini reg = <0x480c2000 0x1000>; 509*708ca4daSTom Rini interrupts = <0>; 510*708ca4daSTom Rini }; 511*708ca4daSTom Rini }; 512*708ca4daSTom Rini}; 513*708ca4daSTom Rini 514*708ca4daSTom Rini#include "dm816x-clocks.dtsi" 515