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/openbmc/u-boot/drivers/gpio/
H A Dmpc8xxx_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
29 ulong addr; member
47 return (1U << (31 - (gpio))); in gpio_mask()
52 return in_be32(&base->gpdat) & mask; in mpc8xxx_gpio_get_val()
57 return in_be32(&base->gpdir) & mask; in mpc8xxx_gpio_get_dir()
60 static inline void mpc8xxx_gpio_set_in(struct ccsr_gpio *base, u32 gpios) in mpc8xxx_gpio_set_in() argument
62 clrbits_be32(&base->gpdat, gpios); in mpc8xxx_gpio_set_in()
63 /* GPDIR register 0 -> input */ in mpc8xxx_gpio_set_in()
64 clrbits_be32(&base->gpdir, gpios); in mpc8xxx_gpio_set_in()
67 static inline void mpc8xxx_gpio_set_low(struct ccsr_gpio *base, u32 gpios) in mpc8xxx_gpio_set_low() argument
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H A Dbcm2835_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
22 struct bcm2835_gpios *gpios = dev_get_priv(dev); in bcm2835_gpio_direction_input() local
25 val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); in bcm2835_gpio_direction_input()
28 writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); in bcm2835_gpio_direction_input()
36 struct bcm2835_gpios *gpios = dev_get_priv(dev); in bcm2835_gpio_direction_output() local
41 val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); in bcm2835_gpio_direction_output()
44 writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]); in bcm2835_gpio_direction_output()
49 static int bcm2835_get_value(const struct bcm2835_gpios *gpios, unsigned gpio) in bcm2835_get_value() argument
53 val = readl(&gpios->reg->gplev[BCM2835_GPIO_COMMON_BANK(gpio)]); in bcm2835_get_value()
60 const struct bcm2835_gpios *gpios = dev_get_priv(dev); in bcm2835_gpio_get_value() local
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H A Dsh_pfc.c23 if (enum_id < r->begin) in enum_in_range()
26 if (enum_id > r->end) in enum_in_range()
74 pos = dr->reg_width - (in_pos + 1); in gpio_read_bit()
76 debug("read_bit: addr = %lx, pos = %ld, r_width = %ld\n", in gpio_read_bit()
77 dr->reg + offset, pos, dr->reg_width); in gpio_read_bit()
79 return (gpio_read_raw_reg(dr->mapped_reg + offset, in gpio_read_bit()
80 dr->reg_width) >> pos) & 1; in gpio_read_bit()
88 pos = dr->reg_width - (in_pos + 1); in gpio_write_bit()
90 debug("write_bit addr = %lx, value = %d, pos = %ld, " in gpio_write_bit()
92 dr->reg, !!value, pos, dr->reg_width); in gpio_write_bit()
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/openbmc/u-boot/arch/arm/dts/
H A Dkirkwood-netxbig.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 * Based on netxbig_v2-setup.c,
14 #include <dt-bindings/leds/leds-netxbig.h>
16 #include "kirkwood-6281.dtsi"
21 stdout-path = &uart0;
33 #address-cells = <1>;
34 #size-cells = <1>;
35 compatible = "mxicy,mx25l4005a", "jedec,spi-nor", "spi-flash";
37 spi-max-frequency = <20000000>;
42 label = "u-boot";
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H A Dsocfpga_arria10_socdk.dtsi21 compatible = "altr,socfpga-arria10", "altr,socfpga";
31 stdout-path = "serial0:115200n8";
38 u-boot,dm-pre-reloc;
42 compatible = "gpio-leds";
45 label = "a10sr-led0";
46 gpios = <&a10sr_gpio 0 1>;
50 label = "a10sr-led1";
51 gpios = <&a10sr_gpio 1 1>;
55 label = "a10sr-led2";
56 gpios = <&a10sr_gpio 2 1>;
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/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-netxbig.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 * Based on netxbig_v2-setup.c,
14 #include <dt-bindings/leds/leds-netxbig.h>
16 #include "kirkwood-6281.dtsi"
21 stdout-path = &uart0;
33 #address-cells = <1>;
34 #size-cells = <1>;
35 compatible = "mxicy,mx25l4005a", "jedec,spi-nor";
37 spi-max-frequency = <20000000>;
42 label = "u-boot";
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/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dnetxbig-gpio-ext.txt5 - compatible: "lacie,netxbig-gpio-ext".
6 - addr-gpios: GPIOs representing the address register (LSB -> MSB).
7 - data-gpios: GPIOs representing the data register (LSB -> MSB).
8 - enable-gpio: latches the new configuration (address, data) on raising edge.
12 netxbig_gpio_ext: netxbig-gpio-ext {
13 compatible = "lacie,netxbig-gpio-ext";
15 addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH
18 data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH
21 enable-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
21 read registers (tR). Required if property "gpios" is not used
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H A Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
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H A Dmtd-physmap.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
10 - Rob Herring <robh@kernel.org>
17 - $ref: mtd.yaml#
18 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
23 - items:
24 - enum:
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/openbmc/u-boot/drivers/i2c/
H A Di2c-uclass.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <dm/device-internal.h>
34 printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W", in i2c_dump_msgs()
35 msg->addr, msg->len); in i2c_dump_msgs()
36 if (!(m->flags & I2C_M_RD)) in i2c_dump_msgs()
37 printf(": %x", m->buf[0]); in i2c_dump_msgs()
43 * i2c_setup_offset() - Set up a new message with a chip offset
49 * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
55 int offset_len = chip->offset_len; in i2c_setup_offset()
57 msg->addr = chip->chip_addr; in i2c_setup_offset()
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H A Di2c-gpio.c5 * This file is based on: drivers/i2c/soft-i2c.c,
6 * with added driver-model support and code cleanup.
29 * udelay - delay [us] between GPIO toggle operations,
34 struct gpio_desc gpios[PIN_COUNT]; member
85 /* START: High -> Low on SDA while SCL is High */
98 /* STOP: Low -> High on SDA while SCL is High */
197 return -EIO; in i2c_send_slave_addr()
207 struct gpio_desc *scl = &bus->gpios[PIN_SCL]; in i2c_gpio_write_data()
208 struct gpio_desc *sda = &bus->gpios[PIN_SDA]; in i2c_gpio_write_data()
209 unsigned int delay = bus->udelay; in i2c_gpio_write_data()
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/openbmc/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,nvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
26 - description: divider clock
27 - description: fast clock
29 clock-names:
32 - const: div-clk
33 - const: fast-clk
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/openbmc/linux/drivers/net/wireless/microchip/wilc1000/
H A Dspi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries.
10 #include <linux/crc-itu-t.h>
23 "\t\t\tCommand transfers are short and the CPU-cycle cost\n"
31 "\t\t\tData transfers can be large and the CPU-cycle cost\n"
38 * USER GUIDE" (https://tinyurl.com/4hhshdts) but we have observed 1-4
52 } gpios; member
117 u8 addr[3]; member
121 u8 addr[3]; member
126 u8 addr[3]; member
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/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8974pro-sony-xperia-shinano-castor.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974pro.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";
12 chassis-type = "tablet";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
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H A Dqcom-apq8026-samsung-matisse-wifi.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "qcom-msm8226.dtsi"
12 /delete-node/ &adsp_region;
13 /delete-node/ &smem_region;
17 compatible = "samsung,matisse-wifi", "qcom,apq8026";
18 chassis-type = "tablet";
27 #address-cells = <1>;
28 #size-cells = <1>;
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/openbmc/linux/Documentation/devicetree/bindings/misc/
H A Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dadi,ssm2518.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lars-Peter Clausen <lars@metafoo.de>
13 - $ref: dai-common.yaml#
22 I2C address of the device. This will either be 0x34 (ADDR pin low)
23 or 0x35 (ADDR pin high)
25 gpios:
32 - compatible
33 - reg
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/openbmc/linux/arch/nios2/boot/dts/
H A D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
22 interrupt-controller;
23 #interrupt-cells = <1>;
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/openbmc/u-boot/arch/nios2/dts/
H A D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
12 compatible = "altr,niosii-max10";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 u-boot,dm-pre-reloc;
23 compatible = "altr,nios2-1.1";
25 interrupt-controller;
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/openbmc/linux/include/linux/gpio/
H A Dregmap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1))
13 #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO) argument
16 * struct gpio_regmap_config - Description of a generic regmap gpio_chip.
24 * @ngpio: Number of GPIOs
25 * @names: (Optional) Array of names for gpios
33 * @ngpio_per_reg: Number of GPIOs per register
35 * interrupt-capable
41 * not used by gpio-remap but is provided "as is" to the
44 * The ->reg_mask_xlate translates a given base address and GPIO offset to
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/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_arria10_socdk.dtsi1 // SPDX-License-Identifier: GPL-2.0+
9 compatible = "altr,socfpga-arria10-socdk", "altr,socfpga-arria10", "altr,socfpga";
18 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
31 label = "a10sr-led0";
32 gpios = <&a10sr_gpio 0 1>;
36 label = "a10sr-led1";
37 gpios = <&a10sr_gpio 1 1>;
41 label = "a10sr-led2";
42 gpios = <&a10sr_gpio 2 1>;
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/openbmc/u-boot/arch/x86/cpu/coreboot/
H A Dtables.c1 // SPDX-License-Identifier: BSD-3-Clause
40 info->n_memranges = 0; in cb_parse_memory()
46 info->memrange[info->n_memranges].base = in cb_parse_memory()
47 UNPACK_CB64(range->start); in cb_parse_memory()
49 info->memrange[info->n_memranges].size = in cb_parse_memory()
50 UNPACK_CB64(range->size); in cb_parse_memory()
52 info->memrange[info->n_memranges].type = range->type; in cb_parse_memory()
54 info->n_memranges++; in cb_parse_memory()
61 info->serial = ser; in cb_parse_serial()
68 info->vbnv_start = vbnv->vbnv_start; in cb_parse_vbnv()
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/openbmc/linux/drivers/leds/
H A Dleds-netxbig.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * leds-netxbig.c - Driver for the 2Big and 5Big Network series LEDs
21 struct gpio_desc **addr; member
68 static void gpio_ext_set_addr(struct netxbig_gpio_ext *gpio_ext, int addr) in gpio_ext_set_addr() argument
72 for (pin = 0; pin < gpio_ext->num_addr; pin++) in gpio_ext_set_addr()
73 gpiod_set_value(gpio_ext->addr[pin], (addr >> pin) & 1); in gpio_ext_set_addr()
80 for (pin = 0; pin < gpio_ext->num_data; pin++) in gpio_ext_set_data()
81 gpiod_set_value(gpio_ext->data[pin], (data >> pin) & 1); in gpio_ext_set_data()
87 gpiod_set_value(gpio_ext->enable, 0); in gpio_ext_enable_select()
88 gpiod_set_value(gpio_ext->enable, 1); in gpio_ext_enable_select()
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/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dsamsung,s3c2410-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - samsung,s3c2410-i2c
16 - samsung,s3c2440-i2c
17 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs:
18 - samsung,s3c2440-hdmiphy-i2c
19 # For s3c2440-like I2C used as a host to SATA PHY controller on an
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