| /openbmc/webui-vue/src/views/Settings/Network/ |
| H A D | ModalDefaultGateway.vue | 2 <b-modal
3 id="modal-default-gateway"
8 <b-form id="gateway-settings" @submit.prevent="handleSubmit">
9 <b-row>
10 <b-col sm="6">
11 <b-form-group
13 label-for="defaultGateway"
15 <b-form-input
17 v-model.trim="form.defaultGateway"
18 data-test-id="network-input-gateway"
[all …]
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| H A D | ModalIpv6.vue | 2 <b-modal
3 id="modal-add-ipv6"
8 <b-form id="form-ipv6" @submit.prevent="handleSubmit">
9 <b-row>
10 <b-col sm="6">
11 <b-form-group
13 label-for="ipAddress"
15 <b-form-input
17 v-model="form.ipAddress"
22 <b-form-invalid-feedback role="alert">
[all …]
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| /openbmc/u-boot/doc/ |
| H A D | README.davinci.nand_spl | 2 A "make boardname" will compile a u-boot.ubl, with UBL Header, which is
3 needed for the RBL to find the "UBL", which actually is a UBL-compatible
4 header, nand spl code and u-boot code.
7 As the RBL uses another read function as the "standard" u-boot,
8 we need a command, which switches between this two read/write
10 code in a format, which the RBL can read. This is realize
11 (at the moment in board specific code) in the u-boot command
19 To set up mkimage you need a config file for mkimage, example:
26 On the cam_enc_4xx board we have a NAND flash with blocksize = 0x20000 and
27 pagesize = 0x800, so the u-boot.ubl image (which you get with:
[all …]
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| H A D | README.chromium | 1 Running U-Boot from coreboot on Chromebooks
4 U-Boot can be used as a secondary boot loader in a few situations such as from
8 This document aims to provide a guide to booting U-Boot on a Chromebook. It
9 is only a starting point, and there are many guides on the interwebs. But
10 placing this information in the U-Boot tree should make it easier to find for
11 those who use U-Boot habitually.
13 Most of these platforms are supported by U-Boot natively, but it is risky to
14 replace the ROM unless you have a servo board and cable to restore it with.
17 For all of these the standard U-Boot build instructions apply. For example on
20 sudo apt install gcc-arm-linux-gnueabi
[all …]
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| /openbmc/bmcweb/test/include/ |
| H A D | ossl_random.cpp | 1 // SPDX-License-Identifier: Apache-2.0
2 // SPDX-FileCopyrightText: Copyright OpenBMC Authors
17 // 78e96a4b-62fe-48d8-ac09-7f75a94671e0 in TEST()
21 "^[a-f0-9]{8}-[a-f0-9]{4}-[a-f0-9]{4}-[a-f0-9]{4}-[a-f0-9]{12}$")); in TEST()
27 EXPECT_THAT(getRandomIdOfLength(1), MatchesRegex("^[a-zA-Z0-9]$")); in TEST()
28 EXPECT_THAT(getRandomIdOfLength(10), MatchesRegex("^[a-zA-Z0-9]{10}$")); in TEST()
|
| /openbmc/linux/scripts/ |
| H A D | markup_oops.pl | 2 # SPDX-License-Identifier: GPL-2.0-only
22 'cross-compile|c=s' => \$cross_compile,
28 my $kerver = `uname -r`;
49 if ($line =~ /EAX: ([0-9a-f]+) EBX: ([0-9a-f]+) ECX: ([0-9a-f]+) EDX: ([0-9a-f]+)/) {
55 if ($line =~ /ESI: ([0-9a-f]+) EDI: ([0-9a-f]+) EBP: ([0-9a-f]+) ESP: ([0-9a-f]+)/) {
60 if ($line =~ /RAX: ([0-9a-f]+) RBX: ([0-9a-f]+) RCX: ([0-9a-f]+)/) {
65 if ($line =~ /RDX: ([0-9a-f]+) RSI: ([0-9a-f]+) RDI: ([0-9a-f]+)/) {
70 if ($line =~ /RBP: ([0-9a-f]+) R08: ([0-9a-f]+) R09: ([0-9a-f]+)/) {
74 if ($line =~ /R10: ([0-9a-f]+) R11: ([0-9a-f]+) R12: ([0-9a-f]+)/) {
79 if ($line =~ /R13: ([0-9a-f]+) R14: ([0-9a-f]+) R15: ([0-9a-f]+)/) {
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | ethernet-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | brcm,cru.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
13 Broadcom CRU ("Clock and Reset Unit" or "Central Resource Unit") is a hardware
20 - enum:
21 - brcm,ns-cru
22 - const: simple-mfd
29 "#address-cells":
32 "#size-cells":
[all …]
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| H A D | brcm,twd.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom's Timer-Watchdog (aka TWD)
10 - Rafał Miłecki <rafal@milecki.pl>
13 Broadcom has a Timer-Watchdog block used in multiple SoCs (e.g., BCM4908,
15 registers layout). This block consists of: timers, watchdog and optionally a
21 - enum:
22 - brcm,bcm4908-twd
23 - brcm,bcm7038-twd
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/soc/ti/ |
| H A D | ti,pruss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/mtd/ |
| H A D | denali,nand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - altr,socfpga-denali-nand
16 - socionext,uniphier-denali-nand-v5a
17 - socionext,uniphier-denali-nand-v5b
19 reg-names:
25 - const: nand_data
26 - const: denali_reg
[all …]
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| H A D | mediatek,mtk-nfc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
15 - mediatek,mt2701-nfc
16 - mediatek,mt2712-nfc
17 - mediatek,mt7622-nfc
21 - description: Base physical address and size of NFI.
25 - description: NFI interrupt
[all …]
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| H A D | qcom,nandc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
26 - description: Core Clock
[all …]
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| /openbmc/linux/arch/sparc/lib/ |
| H A D | copy_page.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
16 /* What we used to do was lock a TLB entry into a specific
20 * we had to keep interrupts disabled for a long time.
23 * and this makes the cpu choose a slot all by itself.
24 * Then we do a normal TLB flush on exit. We need only
63 and %o2, %o3, %o0 ! vaddr D-cache alias bit
91 ba,pt %xcc, 9f
97 sethi %hi((PAGE_SIZE/64)-2), %o2
100 or %o2, %lo((PAGE_SIZE/64)-2), %o2
104 ldd [%o1 + 0x000], %f0
[all …]
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| /openbmc/linux/tools/perf/ |
| H A D | perf-iostat.sh | 2 # SPDX-License-Identifier: GPL-2.0
6 if [[ "$1" == "list" ]] || [[ "$1" =~ ([a-f0-9A-F]{1,}):([a-f0-9A-F]{1,2})(,)? ]]; then
12 perf stat --iostat$DELIMITER$*
|
| /openbmc/openbmc/meta-google/recipes-google/networking/gbmc-net-common/ |
| H A D | gbmc-ra.sh | 6 # You may obtain a copy of the License at
8 # http://www.apache.org/licenses/LICENSE-2.0
16 # shellcheck source=meta-google/recipes-google/networking/network-sh/lib.sh
18 # shellcheck source=meta-google/recipes-google/networking/gbmc-net-common/gbmc-net-lib.sh
19 source /usr/share/gbmc-net-lib.sh || exit
36 if ip addr show | grep -q "^[ ]*inet6 $rtr/"; then
42 # Make sure we cover `00-*` and `-*` files
43 for file in /run/systemd/network/{00,}-bmc-$RA_IF.network; do
44 mkdir -p "$file.d"
46 "$rtr" "$ROUTE_METRIC" "$mac" "$rtr" >"$file.d"/10-gateway.conf
[all …]
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| /openbmc/linux/arch/sparc/crypto/ |
| H A D | camellia_asm.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
36 ld [%o0 + 0x00], %f0 ! i0, k[0]
40 std %f0, [%o1 + 0x00] ! k[0, 1]
41 fsrc2 %f0, %f28
47 ld [%o0 + 0x10], %f0
49 std %f0, [%o1 + 0x20] ! k[8, 9]
52 be,a 1f
53 fxor %f10, %f0, %f2
58 fxor %f28, %f0, %f0
72 fxor %f28, %f0, %f0
[all …]
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| /openbmc/u-boot/arch/x86/cpu/quark/ |
| H A D | quark.c | 1 // SPDX-License-Identifier: GPL-2.0+
46 mask = ~(CONFIG_SYS_MONITOR_LEN - 1); in quark_setup_mtrr()
54 mask = ~(ESRAM_SIZE - 1); in quark_setup_mtrr()
70 /* GPIO - D31:F0:R44h */ in quark_setup_bars()
74 /* ACPI PM1 Block - D31:F0:R48h */ in quark_setup_bars()
78 /* GPE0 - D31:F0:R4Ch */ in quark_setup_bars()
82 /* WDT - D31:F0:R84h */ in quark_setup_bars()
86 /* RCBA - D31:F0:RF0h */ in quark_setup_bars()
90 /* ACPI P Block - Msg Port 04:R70h */ in quark_setup_bars()
94 /* SPI DMA - Msg Port 04:R7Ah */ in quark_setup_bars()
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/timer/ |
| H A D | ingenic,tcu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 For a description of the TCU hardware and drivers, have a look at
11 Documentation/arch/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4760-tcu
24 - ingenic,jz4760b-tcu
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | ingenic,cgu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
11 typically includes a variety of PLLs, multiplexers, dividers & gates in order
16 - Paul Cercueil <paul@crapouillou.net>
23 - ingenic,jz4740-cgu
24 - ingenic,jz4725b-cgu
25 - ingenic,jz4755-cgu
26 - ingenic,jz4760-cgu
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/fsl/ |
| H A D | fsl,ifc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Yang <leoyang.li@nxp.com>
17 SRAM and other memories where address and data are shared on a bus.
21 pattern: "^memory-controller@[0-9a-f]+$"
26 "#address-cells":
32 "#size-cells":
49 little-endian:
[all …]
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| /openbmc/linux/arch/mips/kernel/ |
| H A D | r2300_fpu.S | 8 * Multi-arch abstraction and asm macros for easier reading:
20 #include <asm/asm-offsets.h>
23 #define EX(a,b) \ argument
24 9: a,##b; \
25 .section __ex_table,"a"; \
26 PTR_WD 9b,fault; \
29 #define EX2(a,b) \ argument
30 9: a,##b; \
31 .section __ex_table,"a"; \
32 PTR_WD 9b,fault; \
[all …]
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| /openbmc/linux/arch/powerpc/crypto/ |
| H A D | aes-tab-4k.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 * crypto/aes_generic.c and are designed to be simply accessed by a combination
11 * of rlwimi/lwz instructions with a minimum of table registers (usually only
16 * For the safety-conscious it has to be noted that they might be vulnerable
19 * This is a quite good tradeoff for low power devices (e.g. routers) without
25 #define R(a, b, c, d) \ argument
26 0x##a##b##c##d, 0x##d##a##b##c, 0x##c##d##a##b, 0x##b##c##d##a
32 /* encryption table, same as crypto_ft_tab in crypto/aes-generic.c */
40 .long R(4d, ab, ab, e6), R(ec, 76, 76, 9a)
41 .long R(8f, ca, ca, 45), R(1f, 82, 82, 9d)
[all …]
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| /openbmc/linux/drivers/media/dvb-frontends/ |
| H A D | m88ds3103.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
21 ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1); in m88ds3103_update_bits()
30 return regmap_bulk_write(dev->regmap, reg, &val, 1); in m88ds3103_update_bits()
37 struct i2c_client *client = dev->client; in m88ds3103_wr_reg_val_tab()
41 dev_dbg(&client->dev, "tab_len=%d\n", tab_len); in m88ds3103_wr_reg_val_tab()
44 ret = -EINVAL; in m88ds3103_wr_reg_val_tab()
51 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1 || in m88ds3103_wr_reg_val_tab()
52 !((j + 1) % (dev->cfg->i2c_wr_max - 1))) { in m88ds3103_wr_reg_val_tab()
53 ret = regmap_bulk_write(dev->regmap, tab[i].reg - j, buf, j + 1); in m88ds3103_wr_reg_val_tab()
57 j = -1; in m88ds3103_wr_reg_val_tab()
[all …]
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| /openbmc/linux/arch/arm/include/asm/ |
| H A D | kgdb.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
18 * GDB assumes that we're a user process being debugged, so
23 * we would loose the kernel's LR, which is a bad thing. This
26 * By doing this as an undefined instruction trap, we force a mode
29 * We also define a KGDB_COMPILED_BREAK which can be used to compile
30 * in breakpoints. This is important for things like sysrq-G and for
59 * r0-r15: 1 long word each
60 * f0-f7: unused, 3 long words each !!
64 * Even though f0-f7 and fps are not used, they need to be
66 * the host-side gdb.
[all …]
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