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/openbmc/openbmc/poky/meta/conf/machine/include/microblaze/
H A Dfeature-microblaze-versions.inc5 # Versions before v9.0 of MicroBlaze use a versioning scheme of "vX.YY.Z"
11 # Since v9.0 of MicroBlaze the revision (Z) part of versions was entirely
39 TUNEVALID[v9.0] = "MicroBlaze version 9.0"
40 TUNEVALID[v9.1] = "MicroBlaze version 9.1"
41 TUNEVALID[v9.2] = "MicroBlaze version 9.2"
42 TUNEVALID[v9.3] = "MicroBlaze version 9.3"
43 TUNEVALID[v9.4] = "MicroBlaze version 9.4"
44 TUNEVALID[v9.5] = "MicroBlaze version 9.5"
45 TUNEVALID[v9.6] = "MicroBlaze version 9.6"
56 TUNECONFLICTS[v9.0] = "v8.00 v8.10 v8.20 v8.30 v8.40 v8.50"
[all …]
H A Darch-microblaze.inc9 TUNECONFLICTS[64-bit] = "v8.00 v8.10 v8.20 v8.30 v8.40 v8.50 v9.0 v9.1 v9.2 v9.3 v9.4 v9.5 v9.6 v10…
28 …CTS[frequency-optimized] = "v8.00 v8.10 v8.20 v8.30 v8.40 v8.50 v9.0 v9.1 v9.2 v9.3 v9.4 v9.5 v9.6"
/openbmc/qemu/disas/
H A Dsparc.c54 /* V9 variants must appear last. */
56 SPARC_OPCODE_ARCH_V9A, /* V9 with ultrasparc additions. */
57 SPARC_OPCODE_ARCH_V9B, /* V9 with ultrasparc and cheetah additions. */
68 /* Given a valid sparc_opcode_arch_val, return non-zero if it's v9. */
103 /* FIXME: Add F_ANACHRONISTIC flag for v9. */
137 K MEMBAR mask (7 bits). (v9)
138 j 10 bit Immediate. (v9)
139 I 11 bit Immediate. (v9)
142 k 2+14 bit PC relative immediate. (v9)
143 G 19 bit PC relative immediate. (v9)
[all …]
/openbmc/linux/arch/arm64/crypto/
H A Dsm3-ce-core.S45 sm3ss1 v5.4s, v8.4s, \t0\().4s, v9.4s
49 sm3tt2\ab v9.4s, v5.4s, \s0\().4s, \i
79 ld1 {v8.4s-v9.4s}, [x0]
81 rev64 v9.4s, v9.4s
83 ext v9.16b, v9.16b, v9.16b, #8
93 mov v16.16b, v9.16b
123 eor v9.16b, v9.16b, v16.16b
130 rev64 v9.4s, v9.4s
132 ext v9.16b, v9.16b, v9.16b, #8
133 st1 {v8.4s-v9.4s}, [x0]
H A Daes-neon.S71 sub v9.16b, \in\().16b, v15.16b
73 sub v10.16b, v9.16b, v15.16b
74 tbx \in\().16b, {v20.16b-v23.16b}, v9.16b
84 mul_by_x2 v8.16b, \in\().16b, v9.16b, v12.16b
90 mul_by_x v9.16b, \in\().16b, v8.16b, v12.16b
92 eor v8.16b, v8.16b, v9.16b
130 sub v9.16b, \in1\().16b, v15.16b
137 tbx \in1\().16b, {v20.16b-v23.16b}, v9.16b
140 sub v9.16b, v9.16b, v15.16b
145 tbx \in1\().16b, {v24.16b-v27.16b}, v9.16b
[all …]
H A Dsm4-ce-core.S234 rev32 v9.16b, v1.16b
242 SM4_CRYPT_BLK8_BE(v8, v9, v10, v11, v12, v13, v14, v15)
245 eor v9.16b, v9.16b, v0.16b
271 rev32 v9.16b, v1.16b
275 SM4_CRYPT_BLK4_BE(v8, v9, v10, v11)
278 eor v9.16b, v9.16b, v0.16b
488 rev32 v9.16b, v0.16b
496 SM4_CRYPT_BLK8_BE(v8, v9, v10, v11, v12, v13, v14, v15)
501 eor v1.16b, v1.16b, v9.16b
525 rev32 v9.16b, v0.16b
[all …]
H A Dsm4-ce-ccm-core.S133 inc_le128(v9) /* +1 */
142 SM4_CRYPT_BLK2(v9, RMAC)
143 eor v9.16b, v9.16b, v1.16b
245 inc_le128(v9) /* +1 */
254 SM4_CRYPT_BLK2(v9, RMAC)
255 eor v9.16b, v9.16b, v1.16b
256 eor RMAC.16b, RMAC.16b, v9.16b
H A Daes-neonbs-core.S389 movi v9.16b, #0x02
406 cmtst v1.16b, v7.16b, v9.16b
437 eor v10.16b, v0.16b, v9.16b // xor with round0 key
438 eor v11.16b, v1.16b, v9.16b
440 eor v12.16b, v2.16b, v9.16b
442 eor v13.16b, v3.16b, v9.16b
444 eor v14.16b, v4.16b, v9.16b
446 eor v15.16b, v5.16b, v9.16b
448 eor v10.16b, v6.16b, v9.16b
450 eor v11.16b, v7.16b, v9.16b
[all …]
H A Dsha3-ce-core.S75 eor v9.8b, v9.8b, v27.8b
109 eor3 v29.16b, v4.16b, v9.16b, v14.16b
129 xar v6.2d, v9.2d, v28.2d, (64 - 20)
130 xar v9.2d, v22.2d, v26.2d, (64 - 61)
172 bcax v7.16b, v30.16b, v9.16b, v4.16b
173 bcax v8.16b, v4.16b, v5.16b, v9.16b
174 bcax v9.16b, v9.16b, v6.16b, v5.16b
H A Dchacha-neon-core.S131 add v1.4s, v1.4s, v9.4s
229 mov a9, v9.s[0]
278 add v9.4s, v9.4s, v13.4s
287 eor v17.16b, v5.16b, v9.16b
345 add v9.4s, v9.4s, v13.4s
354 eor v17.16b, v5.16b, v9.16b
416 add v9.4s, v9.4s, v14.4s
425 eor v19.16b, v4.16b, v9.16b
483 add v9.4s, v9.4s, v14.4s
492 eor v19.16b, v4.16b, v9.16b
[all …]
H A Dsha1-ce-core.S88 CPU_LE( rev32 v9.16b, v9.16b )
135 movi v9.2d, #0
/openbmc/linux/arch/powerpc/crypto/
H A Dcrc32-vpmsum_core.S208 VPMSUMD(v9,v17,const1)
262 vxor v1,v1,v9
263 VPMSUMD(v9,v17,const2)
317 vxor v1,v1,v9
318 VPMSUMD(v9,v17,const1)
348 vxor v1,v1,v9
375 lvx v9,off16,r4
377 VPERM(v9,v9,v9,byteswap)
394 vxor v17,v1,v9
595 VPMSUMD(v9,v17,const1)
[all …]
/openbmc/qemu/target/sparc/
H A Dcpu-param.h30 * SPARC V9 compatibility architecture specifications was never implemented
31 * in a SPARC V9 implementation and is not included in the Oracle SPARC
34 * The RMO memory model described in the SPARC V9 specification was
35 * implemented in some non-Sun SPARC V9 implementations, but is not
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h128 v5, f6, v6, f7, v7, f8, v8, f9, v9) \ argument
138 FN(reg, f9), v9)
141 v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10) \ argument
151 FN(reg, f9), v9, \
290 #define REG_UPDATE_9(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9) \ argument
300 FN(reg, f9), v9)
302 #define REG_UPDATE_10(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, … argument
312 FN(reg, f9), v9, \
315 #define REG_UPDATE_14(reg, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, … argument
326 FN(reg, f9), v9, \
[all …]
/openbmc/qemu/tests/tcg/hexagon/
H A Dhvx_histogram_row.S47 { v9:8 = v1:0
125 { v9.h = vshuff(V9.h)
132 v9.w = vdmpy(v9.h, r10.h):sat
208 { vshuff(v9, v8, r28)
214 v8.w = vadd(v9.w, v8.w)
/openbmc/linux/tools/testing/selftests/powerpc/copyloops/
H A Dmemcpy_power7.S498 VPERM(v9,v1,v0,v16)
501 stvx v9,r3,r9
508 VPERM(v9,v3,v2,v16)
515 stvx v9,r3,r9
543 VPERM(v9,v7,v6,v16)
558 stvx v9,r3,r9
581 VPERM(v9,v3,v2,v16)
588 stvx v9,r3,r9
597 VPERM(v9,v1,v0,v16)
600 stvx v9,r3,r9
H A Dcopyuser_power7.S553 VPERM(v9,v1,v0,v16)
556 err3; stvx v9,r3,r9
563 VPERM(v9,v3,v2,v16)
570 err3; stvx v9,r3,r9
598 VPERM(v9,v7,v6,v16)
613 err4; stvx v9,r3,r9
636 VPERM(v9,v3,v2,v16)
643 err3; stvx v9,r3,r9
652 VPERM(v9,v1,v0,v16)
655 err3; stvx v9,r3,r9
/openbmc/linux/arch/powerpc/lib/
H A Dmemcpy_power7.S498 VPERM(v9,v1,v0,v16)
501 stvx v9,r3,r9
508 VPERM(v9,v3,v2,v16)
515 stvx v9,r3,r9
543 VPERM(v9,v7,v6,v16)
558 stvx v9,r3,r9
581 VPERM(v9,v3,v2,v16)
588 stvx v9,r3,r9
597 VPERM(v9,v1,v0,v16)
600 stvx v9,r3,r9
H A Dcopyuser_power7.S553 VPERM(v9,v1,v0,v16)
556 err3; stvx v9,r3,r9
563 VPERM(v9,v3,v2,v16)
570 err3; stvx v9,r3,r9
598 VPERM(v9,v7,v6,v16)
613 err4; stvx v9,r3,r9
636 VPERM(v9,v3,v2,v16)
643 err3; stvx v9,r3,r9
652 VPERM(v9,v1,v0,v16)
655 err3; stvx v9,r3,r9
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/
H A D0001-hwaccess-use-__asm__-as-is-done-elsewhere.patch36 …/* Sparc V9 CPUs support three different memory orderings that range from x86-like TSO to PowerPC-…
38 * use the strongest hardware memory barriers that exist on Sparc V9. */
43 … * on V9 CPUs it might apply... or not... we issue a write barrier anyway. That's the most suitable
/openbmc/linux/arch/s390/crypto/
H A Dcrc32le-vx.S21 #define CONST_PERM_LE2BE %v9
102 * V9: Constant for BE->LE conversion and shift operations
203 VLEIB %v9,0x40,7
210 VSRLB %v0,CONST_R4R3,%v9
234 VLEIB %v9,0x20,7 /* Shift by words */
235 VSRLB %v2,%v1,%v9 /* Store remaining bits in V2 */
/openbmc/linux/arch/arm64/boot/dts/realtek/
H A Drtd1295-mele-v9.dts12 compatible = "mele,v9", "realtek,rtd1295";
13 model = "MeLE V9";
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atomfirmware.c233 struct atom_vram_module_v9 v9; member
416 ((u8 *)vram_module + vram_module->v9.vram_module_size); in amdgpu_atomfirmware_get_vram_info()
419 mem_type = vram_module->v9.memory_type; in amdgpu_atomfirmware_get_vram_info()
422 mem_channel_number = vram_module->v9.channel_num; in amdgpu_atomfirmware_get_vram_info()
423 mem_channel_width = vram_module->v9.channel_width; in amdgpu_atomfirmware_get_vram_info()
426 mem_vendor = (vram_module->v9.vender_rev_id) & 0xF; in amdgpu_atomfirmware_get_vram_info()
479 ((u8 *)vram_module + vram_module->v9.vram_module_size); in amdgpu_atomfirmware_get_vram_info()
482 mem_type = vram_module->v9.memory_type; in amdgpu_atomfirmware_get_vram_info()
485 mem_channel_number = vram_module->v9.channel_num; in amdgpu_atomfirmware_get_vram_info()
486 mem_channel_width = vram_module->v9.channel_width; in amdgpu_atomfirmware_get_vram_info()
[all …]
/openbmc/linux/drivers/net/wireless/marvell/libertas/
H A Dhost.h173 #define SNMP_MIB_OID_BEACON_PERIOD 0x0002 /* Reserved on v9+ */
174 #define SNMP_MIB_OID_DTIM_PERIOD 0x0003 /* Reserved on v9+ */
175 #define SNMP_MIB_OID_ASSOC_TIMEOUT 0x0004 /* Reserved on v9+ */
710 * AdHoc awake period (FW v9+ only):
751 u8 dtimperiod; /* Reserved on v9 and later */
756 __le16 probedelay; /* Reserved on v9 and later */
795 __le16 failtimeout; /* Reserved on v9 and later */
796 __le16 probedelay; /* Reserved on v9 and later */
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Drealtek.yaml33 - mele,v9 # MeLE V9

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