Home
last modified time | relevance | path

Searched full:tmr (Results 1 – 25 of 167) sorted by relevance

1234567

/openbmc/linux/sound/core/seq/
H A Dseq_timer.c21 static void snd_seq_timer_set_tick_resolution(struct snd_seq_timer *tmr) in snd_seq_timer_set_tick_resolution() argument
23 if (tmr->tempo < 1000000) in snd_seq_timer_set_tick_resolution()
24 tmr->tick.resolution = (tmr->tempo * 1000) / tmr->ppq; in snd_seq_timer_set_tick_resolution()
28 s = tmr->tempo % tmr->ppq; in snd_seq_timer_set_tick_resolution()
29 s = (s * 1000) / tmr->ppq; in snd_seq_timer_set_tick_resolution()
30 tmr->tick.resolution = (tmr->tempo / tmr->ppq) * 1000; in snd_seq_timer_set_tick_resolution()
31 tmr->tick.resolution += s; in snd_seq_timer_set_tick_resolution()
33 if (tmr->tick.resolution <= 0) in snd_seq_timer_set_tick_resolution()
34 tmr->tick.resolution = 1; in snd_seq_timer_set_tick_resolution()
35 snd_seq_timer_update_tick(&tmr->tick, 0); in snd_seq_timer_set_tick_resolution()
[all …]
H A Dseq_timer.h50 void snd_seq_timer_delete(struct snd_seq_timer **tmr);
113 void snd_seq_timer_defaults(struct snd_seq_timer *tmr);
114 void snd_seq_timer_reset(struct snd_seq_timer *tmr);
115 int snd_seq_timer_stop(struct snd_seq_timer *tmr);
116 int snd_seq_timer_start(struct snd_seq_timer *tmr);
117 int snd_seq_timer_continue(struct snd_seq_timer *tmr);
118 int snd_seq_timer_set_tempo(struct snd_seq_timer *tmr, int tempo);
119 int snd_seq_timer_set_tempo_ppq(struct snd_seq_timer *tmr, int tempo, int ppq);
120 int snd_seq_timer_set_position_tick(struct snd_seq_timer *tmr, snd_seq_tick_time_t position);
121 int snd_seq_timer_set_position_time(struct snd_seq_timer *tmr, snd_seq_real_time_t position);
[all …]
/openbmc/qemu/hw/timer/
H A Drenesas_tmr.c63 static void update_events(RTMRState *tmr, int ch) in update_events() argument
69 if (tmr->tccr[ch] == 0) { in update_events()
72 if (FIELD_EX8(tmr->tccr[ch], TCCR, CSS) == 0) { in update_events()
77 if (FIELD_EX8(tmr->tccr[0], TCCR, CSS) == CSS_CASCADING) { in update_events()
80 tmr->next[ch] = none; in update_events()
83 diff[cmia] = concat_reg(tmr->tcora) - concat_reg(tmr->tcnt); in update_events()
84 diff[cmib] = concat_reg(tmr->tcorb) - concat_reg(tmr->tcnt); in update_events()
85 diff[ovi] = 0x10000 - concat_reg(tmr->tcnt); in update_events()
88 diff[cmia] = tmr->tcora[ch] - tmr->tcnt[ch]; in update_events()
89 diff[cmib] = tmr->tcorb[ch] - tmr->tcnt[ch]; in update_events()
[all …]
H A Dbcm2835_systmr.c33 BCM2835SystemTimerCompare *tmr = opaque; in bcm2835_systmr_timer_expire() local
35 trace_bcm2835_systmr_timer_expired(tmr->id); in bcm2835_systmr_timer_expire()
36 tmr->state->reg.ctrl_status |= 1 << tmr->id; in bcm2835_systmr_timer_expire()
37 qemu_set_irq(tmr->irq, 1); in bcm2835_systmr_timer_expire()
83 for (index = 0; index < ARRAY_SIZE(s->tmr); index++) { in bcm2835_systmr_write()
86 qemu_set_irq(s->tmr[index].irq, 0); in bcm2835_systmr_write()
97 timer_mod(&s->tmr[index].timer, now + triggers_delay_us); in bcm2835_systmr_write()
136 for (size_t i = 0; i < ARRAY_SIZE(s->tmr); i++) { in bcm2835_systmr_realize()
137 s->tmr[i].id = i; in bcm2835_systmr_realize()
138 s->tmr[i].state = s; in bcm2835_systmr_realize()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/timer/
H A Dbase.c29 struct nvkm_subdev *subdev = &wait->tmr->subdev; in nvkm_timer_wait_test()
30 u64 time = nvkm_timer_read(wait->tmr); in nvkm_timer_wait_test()
57 wait->tmr = device->timer; in nvkm_timer_wait_init()
63 nvkm_timer_read(struct nvkm_timer *tmr) in nvkm_timer_read() argument
65 return tmr->func->read(tmr); in nvkm_timer_read()
69 nvkm_timer_alarm_trigger(struct nvkm_timer *tmr) in nvkm_timer_alarm_trigger() argument
76 spin_lock_irqsave(&tmr->lock, flags); in nvkm_timer_alarm_trigger()
77 list_for_each_entry_safe(alarm, atemp, &tmr->alarms, head) { in nvkm_timer_alarm_trigger()
79 if (alarm->timestamp > nvkm_timer_read(tmr)) { in nvkm_timer_alarm_trigger()
81 tmr->func->alarm_init(tmr, alarm->timestamp); in nvkm_timer_alarm_trigger()
[all …]
H A Dnv04.c28 nv04_timer_time(struct nvkm_timer *tmr, u64 time) in nv04_timer_time() argument
30 struct nvkm_subdev *subdev = &tmr->subdev; in nv04_timer_time()
43 nv04_timer_read(struct nvkm_timer *tmr) in nv04_timer_read() argument
45 struct nvkm_device *device = tmr->subdev.device; in nv04_timer_read()
57 nv04_timer_alarm_fini(struct nvkm_timer *tmr) in nv04_timer_alarm_fini() argument
59 struct nvkm_device *device = tmr->subdev.device; in nv04_timer_alarm_fini()
64 nv04_timer_alarm_init(struct nvkm_timer *tmr, u32 time) in nv04_timer_alarm_init() argument
66 struct nvkm_device *device = tmr->subdev.device; in nv04_timer_alarm_init()
72 nv04_timer_intr(struct nvkm_timer *tmr) in nv04_timer_intr() argument
74 struct nvkm_subdev *subdev = &tmr->subdev; in nv04_timer_intr()
[all …]
/openbmc/linux/drivers/clocksource/
H A Dtimer-ixp4xx.c84 struct ixp4xx_timer *tmr = dev_id; in ixp4xx_timer_interrupt() local
85 struct clock_event_device *evt = &tmr->clkevt; in ixp4xx_timer_interrupt()
89 tmr->base + IXP4XX_OSST_OFFSET); in ixp4xx_timer_interrupt()
99 struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt); in ixp4xx_set_next_event() local
102 val = __raw_readl(tmr->base + IXP4XX_OSRT1_OFFSET); in ixp4xx_set_next_event()
106 tmr->base + IXP4XX_OSRT1_OFFSET); in ixp4xx_set_next_event()
113 struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt); in ixp4xx_shutdown() local
116 val = __raw_readl(tmr->base + IXP4XX_OSRT1_OFFSET); in ixp4xx_shutdown()
118 __raw_writel(val, tmr->base + IXP4XX_OSRT1_OFFSET); in ixp4xx_shutdown()
125 struct ixp4xx_timer *tmr = to_ixp4xx_timer(evt); in ixp4xx_set_oneshot() local
[all …]
H A Dtimer-tegra186.c74 struct tegra186_tmr *tmr; member
93 static void tmr_writel(struct tegra186_tmr *tmr, u32 value, unsigned int offset) in tmr_writel() argument
95 writel_relaxed(value, tmr->regs + offset); in tmr_writel()
112 struct tegra186_tmr *tmr; in tegra186_tmr_create() local
114 tmr = devm_kzalloc(tegra->dev, sizeof(*tmr), GFP_KERNEL); in tegra186_tmr_create()
115 if (!tmr) in tegra186_tmr_create()
118 tmr->parent = tegra; in tegra186_tmr_create()
119 tmr->regs = tegra->regs + offset; in tegra186_tmr_create()
120 tmr->index = index; in tegra186_tmr_create()
121 tmr->hwirq = 0; in tegra186_tmr_create()
[all …]
/openbmc/linux/drivers/target/
H A Dtarget_core_tmr.c32 struct se_tmr_req *tmr; in core_tmr_alloc_req() local
34 tmr = kzalloc(sizeof(struct se_tmr_req), gfp_flags); in core_tmr_alloc_req()
35 if (!tmr) { in core_tmr_alloc_req()
41 se_cmd->se_tmr_req = tmr; in core_tmr_alloc_req()
42 tmr->task_cmd = se_cmd; in core_tmr_alloc_req()
43 tmr->fabric_tmr_ptr = fabric_tmr_ptr; in core_tmr_alloc_req()
44 tmr->function = function; in core_tmr_alloc_req()
45 INIT_LIST_HEAD(&tmr->tmr_list); in core_tmr_alloc_req()
51 void core_tmr_release_req(struct se_tmr_req *tmr) in core_tmr_release_req() argument
53 kfree(tmr); in core_tmr_release_req()
[all …]
/openbmc/u-boot/arch/nds32/cpu/n1213/ag101/
H A Dtimer.c20 struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; in timer_init() local
26 writel(0, &tmr->cr); in timer_init()
34 writel(TIMER_LOAD_VAL, &tmr->timer3_load); in timer_init()
35 writel(TIMER_LOAD_VAL, &tmr->timer3_counter); in timer_init()
36 writel(0, &tmr->timer3_match1); in timer_init()
37 writel(0, &tmr->timer3_match2); in timer_init()
43 &tmr->interrupt_mask); in timer_init()
45 cr = readl(&tmr->cr); in timer_init()
50 writel(cr, &tmr->cr); in timer_init()
67 struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE; in reset_timer_masked() local
[all …]
/openbmc/linux/arch/powerpc/sysdev/
H A Dfsl_gtm.c146 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
151 void gtm_put_timer16(struct gtm_timer *tmr) in gtm_put_timer16() argument
153 gtm_stop_timer16(tmr); in gtm_put_timer16()
155 spin_lock_irq(&tmr->gtm->lock); in gtm_put_timer16()
156 tmr->requested = false; in gtm_put_timer16()
157 spin_unlock_irq(&tmr->gtm->lock); in gtm_put_timer16()
165 static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency, in gtm_set_ref_timer16() argument
168 struct gtm *gtm = tmr->gtm; in gtm_set_ref_timer16()
169 int num = tmr - &gtm->timers[0]; in gtm_set_ref_timer16()
178 if (!tmr->gtpsr) in gtm_set_ref_timer16()
[all …]
/openbmc/u-boot/arch/microblaze/cpu/
H A Dtimer.c16 microblaze_timer_t *tmr; variable
20 if (tmr) in get_timer()
29 if (tmr) { in __udelay()
40 tmr->control = tmr->control | TIMER_INTERRUPT; in timer_isr()
66 tmr = (microblaze_timer_t *)base; in timer_init()
82 if (tmr && preload && irq >= 0) { in timer_init()
83 tmr->loadreg = preload; in timer_init()
84 tmr->control = TIMER_INTERRUPT | TIMER_RESET; in timer_init()
85 tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\ in timer_init()
88 ret = install_interrupt_handler (irq, timer_isr, (void *)tmr); in timer_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/misc/
H A Dxlnx,tmr-manager.yaml4 $id: http://devicetree.org/schemas/misc/xlnx,tmr-manager.yaml#
7 title: Xilinx Triple Modular Redundancy(TMR) Manager IP
13 The Triple Modular Redundancy(TMR) Manager is responsible for handling the
14 TMR subsystem state, including fault detection and error recovery. The core
15 is triplicated in each of the sub-blocks in the TMR subsystem, and provides
21 - xlnx,tmr-manager-1.0
43 tmr-manager@44a10000 {
44 compatible = "xlnx,tmr-manager-1.0";
H A Dxlnx,tmr-inject.yaml4 $id: http://devicetree.org/schemas/misc/xlnx,tmr-inject.yaml#
7 title: Xilinx Triple Modular Redundancy(TMR) Inject IP
13 The Triple Modular Redundancy(TMR) Inject core provides functional fault
15 possibility to verify that the TMR subsystem error detection and fault
21 - xlnx,tmr-inject-1.0
44 compatible = "xlnx,tmr-inject-1.0";
/openbmc/linux/Documentation/devicetree/bindings/ptp/
H A Dptp-qoriq.txt17 - fsl,tmr-prsc Prescaler, divides the output clock.
18 - fsl,tmr-add Frequency compensation value.
19 - fsl,tmr-fiper1 Fixed interval period pulse generator.
20 - fsl,tmr-fiper2 Fixed interval period pulse generator.
21 - fsl,tmr-fiper3 Fixed interval period pulse generator.
82 fsl,tmr-prsc = <100>;
83 fsl,tmr-add = <0x999999A4>;
84 fsl,tmr-fiper1 = <0x3B9AC9F6>;
85 fsl,tmr-fiper2 = <0x00018696>;
/openbmc/linux/drivers/misc/
H A Dxilinx_tmr_manager.c3 * Driver for Xilinx TMR Manager IP.
8 * This driver is developed for TMR Manager,The Triple Modular Redundancy(TMR)
9 * Manager is responsible for handling the TMR subsystem state, including
11 * the sub-blocks in the TMR subsystem, and provides majority voting of
21 /* TMR Manager Register offsets */
44 * struct xtmr_manager_dev - Driver data for TMR Manager
137 * in the tmr manager, update the xtmr_manager cr_val for the same in xtmr_manager_init()
144 * break handler, Below api updates the TMR manager address and in xtmr_manager_init()
192 /* Initialize TMR Manager */ in xtmr_manager_probe()
202 .compatible = "xlnx,tmr-manager-1.0",
[all …]
H A Dxilinx_tmr_inject.c3 * Driver for Xilinx TMR Inject IP.
8 * This driver is developed for TMR Inject IP,The Triple Modular Redundancy(TMR)
18 /* TMR Inject Register offsets */
33 * struct xtmr_inject_dev - Driver data for TMR Inject
136 /* Initialize TMR Inject */ in xtmr_inject_probe()
155 .compatible = "xlnx,tmr-inject-1.0",
171 MODULE_DESCRIPTION("Xilinx TMR Inject Driver");
/openbmc/linux/arch/powerpc/include/asm/
H A Dfsl_gtm.h35 extern void gtm_put_timer16(struct gtm_timer *tmr);
36 extern int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec,
38 extern int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec,
40 extern void gtm_stop_timer16(struct gtm_timer *tmr);
41 extern void gtm_ack_timer16(struct gtm_timer *tmr, u16 events);
/openbmc/linux/fs/
H A Dtimerfd.c33 struct hrtimer tmr; member
77 t.tmr); in timerfd_tmrproc()
184 remaining = hrtimer_expires_remaining_adjusted(&ctx->t.tmr); in timerfd_get_remaining()
210 hrtimer_init(&ctx->t.tmr, clockid, htmode); in timerfd_setup()
211 hrtimer_set_expires(&ctx->t.tmr, texp); in timerfd_setup()
212 ctx->t.tmr.function = timerfd_tmrproc; in timerfd_setup()
224 hrtimer_start(&ctx->t.tmr, texp, htmode); in timerfd_setup()
244 hrtimer_cancel(&ctx->t.tmr); in timerfd_release()
306 ticks += hrtimer_forward_now(&ctx->t.tmr, in timerfd_read()
308 hrtimer_restart(&ctx->t.tmr); in timerfd_read()
[all …]
/openbmc/qemu/hw/acpi/
H A Dich9_tco.c35 int ticks = tr->tco.tmr & TCO_TMR_MASK; in tco_timer_reload()
76 tr->tco.rld = tr->tco.tmr; in tco_timer_expired()
83 return !(tr->tco.cnt1 & TCO_TMR_HLT) && tr->tco.tmr > 1; in can_start_tco_timer()
130 ret = tr->tco.tmr; in tco_ioport_readw()
147 tr->tco.rld = tr->tco.tmr; in tco_ioport_writew()
177 tr->tco.rld = tr->tco.tmr; in tco_ioport_writew()
196 tr->tco.tmr = val; in tco_ioport_writew()
241 .tmr = TCO_TMR_DEFAULT, in acpi_pm_tco_init()
268 VMSTATE_UINT16(tco.tmr, TCOIORegs),
H A Dcore.c388 if (d >= muldiv64(ar->tmr.overflow_time, in acpi_pm1_evt_get_sts()
418 ar->tmr.update_sci(ar); in acpi_pm1_evt_power_down()
484 expire_time = muldiv64(ar->tmr.overflow_time, NANOSECONDS_PER_SECOND, in acpi_pm_tmr_update()
486 timer_mod(ar->tmr.timer, expire_time); in acpi_pm_tmr_update()
488 timer_del(ar->tmr.timer); in acpi_pm_tmr_update()
501 ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL; in acpi_pm_tmr_calc_overflow_time()
515 ar->tmr.update_sci(ar); in acpi_pm_tmr_timer()
541 ar->tmr.update_sci = update_sci; in acpi_pm_tmr_init()
542 ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar); in acpi_pm_tmr_init()
543 memory_region_init_io(&ar->tmr.io, memory_region_owner(parent), in acpi_pm_tmr_init()
[all …]
/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Dxen_shinfo_test.c580 struct kvm_xen_vcpu_attr tmr = { in main() local
610 vcpu_ioctl(vcpu, KVM_XEN_VCPU_SET_ATTR, &tmr); in main()
795 memset(&tmr, 0, sizeof(tmr)); in main()
796 tmr.type = KVM_XEN_VCPU_ATTR_TYPE_TIMER; in main()
797 vcpu_ioctl(vcpu, KVM_XEN_VCPU_GET_ATTR, &tmr); in main()
798 TEST_ASSERT(tmr.u.timer.port == EVTCHN_TIMER, in main()
800 TEST_ASSERT(tmr.u.timer.priority == KVM_IRQ_ROUTING_XEN_EVTCHN_PRIO_2LEVEL, in main()
802 TEST_ASSERT(tmr.u.timer.expires_ns > rs->state_entry_time, in main()
816 tmr.u.timer.expires_ns = rs->state_entry_time + 100000000; in main()
817 vcpu_ioctl(vcpu, KVM_XEN_VCPU_SET_ATTR, &tmr); in main()
[all …]
/openbmc/linux/drivers/target/iscsi/
H A Discsi_target_tmr.c74 pr_err("TMR Opcode TARGET_WARM_RESET authorization" in iscsit_tmr_task_warm_reset()
94 pr_err("TMR Opcode TARGET_COLD_RESET authorization" in iscsit_tmr_task_cold_reset()
117 pr_debug("Got TASK_REASSIGN TMR ITT: 0x%08x," in iscsit_tmr_task_reassign()
122 pr_err("TMR TASK_REASSIGN not supported in ERL<2," in iscsit_tmr_task_reassign()
145 " TMR TASK_REASSIGN.\n"); in iscsit_tmr_task_reassign()
152 " TMR TASK_REASSIGN.\n"); in iscsit_tmr_task_reassign()
236 * the TMR TASK_REASSIGN's ExpDataSN. in iscsit_task_reassign_complete_write()
247 * The TMR TASK_REASSIGN's ExpDataSN contains the next R2TSN the in iscsit_task_reassign_complete_write()
307 * the TMR TASK_REASSIGN's ExpDataSN. in iscsit_task_reassign_complete_read()
336 * The TMR TASK_REASSIGN's ExpDataSN contains the next DataSN the in iscsit_task_reassign_complete_read()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
H A Dfan.c36 struct nvkm_timer *tmr = subdev->device->timer; in nvkm_fan_update() local
98 nvkm_timer_alarm(tmr, delay * 1000 * 1000, &fan->alarm); in nvkm_fan_update()
127 struct nvkm_timer *tmr = device->timer; in nvkm_therm_fan_sense() local
142 start = nvkm_timer_read(tmr); in nvkm_therm_fan_sense()
153 start = nvkm_timer_read(tmr); in nvkm_therm_fan_sense()
157 } while (cycles < 5 && nvkm_timer_read(tmr) - start < 250000000); in nvkm_therm_fan_sense()
158 end = nvkm_timer_read(tmr); in nvkm_therm_fan_sense()
216 struct nvkm_timer *tmr = therm->subdev.device->timer; in nvkm_therm_fan_fini() local
218 nvkm_timer_alarm(tmr, 0, &therm->fan->alarm); in nvkm_therm_fan_fini()
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dbsc9131rdb.dtsi88 fsl,tmr-prsc = <2>;
89 fsl,tmr-add = <0xcccccccd>;
90 fsl,tmr-fiper1 = <999999995>;
91 fsl,tmr-fiper2 = <99990>;

1234567