/openbmc/linux/drivers/soc/qcom/ |
H A D | rpmh-rsc.c | 32 #include <soc/qcom/tcs.h> 71 /* DRV TCS Configuration Information Register */ 77 /* Offsets for CONTROL TCS Registers */ 88 /* TCS CMD register bit mask */ 102 * space are all the TCS blocks. The offset of the TCS blocks is 103 * specified in the device tree by "qcom,tcs-offset" and used to 105 * - TCS blocks come one after another. Type, count, and order are 106 * specified by the device tree as "qcom,tcs-config". 107 * - Each TCS block has some registers, then space for up to 16 commands. 109 * might be present. See ncpt (num cmds per TCS). [all …]
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H A D | rpmh-internal.h | 12 #include <soc/qcom/tcs.h> 23 * struct tcs_group: group of Trigger Command Sets (TCS) to send state requests 27 * @type: Type of the TCS in this group - active, sleep, wake. 29 * @offset: Start of the TCS group relative to the TCSes in the RSC. 31 * @ncpt: Number of commands in each TCS. 32 * @req: Requests that are sent from the TCS; only used for ACTIVE_ONLY 33 * transfers (could be on a wake/sleep TCS if we are borrowing for 42 * MAX_CMDS_PER_TCS = 16 then bit[2] = the first bit in 2nd TCS. 98 * @tcs_base: Start address of the TCS registers in this controller. 106 * @tcs: TCS groups. [all …]
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H A D | trace-rpmh.h | 35 TP_printk("%s: ack: tcs-m: %d addr: %#x data: %#x", 68 TP_printk("%s: tcs(m): %d [%s] cmd(n): %d msgid: %#x addr: %#x data: %#x complete: %d",
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/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,rpmh-rsc.yaml | 15 resources can be written to the Trigger Command Set (TCS) registers and 16 using a (addr, val) pair and triggered. Messages in the TCS are then sent in 25 A TCS may be triggered from Linux or triggered by the F/W after all the CPUs 26 have powered off to facilitate idle power saving. TCS could be classified as:: 66 qcom,tcs-config: 73 TCS type:: 79 - description: Number of TCS 81 The tuple defining the configuration of TCS. Must have two cells which 82 describe each TCS type. The order of the TCS must match the hardware 85 qcom,tcs-offset: [all …]
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/openbmc/linux/drivers/scsi/aic94xx/ |
H A D | aic94xx_tmf.c | 47 #define DECLARE_TCS(tcs) \ argument 48 struct tasklet_completion_status tcs = { \ 59 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_clear_nexus_tasklet_complete() local 66 tcs->dl_opcode = dl->opcode; in asd_clear_nexus_tasklet_complete() 74 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_clear_nexus_timedout() local 77 tcs->dl_opcode = TMF_RESP_FUNC_FAILED; in asd_clear_nexus_timedout() 86 DECLARE_TCS(tcs); \ 95 ascb->uldd_task = &tcs; \ 107 res = tcs.dl_opcode; \ 248 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_tmf_timedout() local [all …]
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/openbmc/linux/tools/testing/selftests/sgx/ |
H A D | test_encl.c | 75 void *tcs = (void *)op->tcs_page; in do_encl_init_tcs_page() local 78 memset(tcs, 0, 16); /* STATE and FLAGS */ in do_encl_init_tcs_page() 79 memcpy(tcs + 16, &op->ssa, 8); /* OSSA */ in do_encl_init_tcs_page() 80 memset(tcs + 24, 0, 4); /* CSSA */ in do_encl_init_tcs_page() 82 memcpy(tcs + 28, &val_32, 4); /* NSSA */ in do_encl_init_tcs_page() 83 memcpy(tcs + 32, &op->entry, 8); /* OENTRY */ in do_encl_init_tcs_page() 84 memset(tcs + 40, 0, 24); /* AEP, OFSBASE, OGSBASE */ in do_encl_init_tcs_page() 86 memcpy(tcs + 64, &val_32, 4); /* FSLIMIT */ in do_encl_init_tcs_page() 87 memcpy(tcs + 68, &val_32, 4); /* GSLIMIT */ in do_encl_init_tcs_page() 88 memset(tcs + 72, 0, 4024); /* Reserved */ in do_encl_init_tcs_page()
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H A D | test_encl_bootstrap.S | 10 .section ".tcs", "aw" 43 # RBX contains the base address for TCS, which is the first address 44 # inside the enclave for TCS #1 and one page into the enclave for 45 # TCS #2. By adding the value of encl_stack to it, we get 50 # Entry point for dynamically created TCS page expected to follow 97 # Stack of TCS #1 101 # Stack of TCS #2
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H A D | main.c | 134 * Return the offset in the enclave where the TCS segment can be found. 135 * The first RW segment loaded is the TCS. 153 * The first RW segment loaded is the TCS, skip that to get info on the 290 self->run.tcs = self->encl.encl_base; in TEST_F() 363 self->run.tcs = self->encl.encl_base; in TEST_F() 429 self->run.tcs = self->encl.encl_base; 512 self->run.tcs = self->encl.encl_base; in TEST_F() 548 self->run.tcs = self->encl.encl_base; in TEST_F() 572 * Sanity check that it is possible to enter either of the two hardcoded TCS 581 self->run.tcs = self->encl.encl_base; in TEST_F() [all …]
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H A D | test_encl.lds | 5 tcs PT_LOAD; 13 .tcs : { 14 *(.tcs*) 15 } : tcs
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/openbmc/linux/drivers/net/ethernet/intel/ixgbe/ |
H A D | ixgbe_lib.c | 25 u8 tcs = adapter->hw_tcs; in ixgbe_cache_ring_dcb_sriov() local 28 if (tcs <= 1) in ixgbe_cache_ring_dcb_sriov() 39 if ((reg_idx & ~vmdq->mask) >= tcs) { in ixgbe_cache_ring_dcb_sriov() 50 if ((reg_idx & ~vmdq->mask) >= tcs) in ixgbe_cache_ring_dcb_sriov() 61 if (fcoe->offset < tcs) in ixgbe_cache_ring_dcb_sriov() 112 * TCs : TC0/1 TC2/3 TC4-7 in ixgbe_get_first_reg_idx() 125 * TCs : TC0 TC1 TC2/3 in ixgbe_get_first_reg_idx() 333 u8 tcs = adapter->hw_tcs; in ixgbe_set_dcb_sriov_queues() local 336 if (tcs <= 1) in ixgbe_set_dcb_sriov_queues() 344 vmdq_i = min_t(u16, vmdq_i, MAX_TX_QUEUES / tcs); in ixgbe_set_dcb_sriov_queues() [all …]
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/openbmc/qemu/target/mips/tcg/sysemu/ |
H A D | cp0_helper.c | 108 * FIXME: This code assumes that all VPEs have the same number of TCs, 196 tcst = &cpu->tcs[tc].CP0_TCStatus; in sync_c0_entryhi() 262 return other->tcs[other_tc].CP0_TCStatus; in helper_mftc0_tcstatus() 279 return other->tcs[other_tc].CP0_TCBind; in helper_mftc0_tcbind() 296 return other->tcs[other_tc].PC; in helper_mftc0_tcrestart() 313 return other->tcs[other_tc].CP0_TCHalt; in helper_mftc0_tchalt() 330 return other->tcs[other_tc].CP0_TCContext; in helper_mftc0_tccontext() 347 return other->tcs[other_tc].CP0_TCSchedule; in helper_mftc0_tcschedule() 364 return other->tcs[other_tc].CP0_TCScheFBack; in helper_mftc0_tcschefback() 446 tcstatus = other->tcs[other_tc].CP0_Debug_tcstatus; in helper_mftc0_debug() [all …]
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/openbmc/linux/drivers/net/ethernet/intel/ice/ |
H A D | ice_dcb_lib.c | 9 * ice_dcb_get_ena_tc - return bitmap of enabled TCs 10 * @dcbcfg: DCB config to evaluate for enabled TCs 103 * ice_dcb_get_num_tc - Get the number of TCs from DCBX config 104 * @dcbcfg: config to retrieve number of TCs from 114 * enabled and create a bitmask of enabled TCs in ice_dcb_get_num_tc() 119 /* Scan bitmask for contiguous TCs starting with TC0 */ in ice_dcb_get_num_tc() 125 pr_err("Non-contiguous TCs - Disabling DCB\n"); in ice_dcb_get_num_tc() 158 /* get bitmap of enabled TCs */ in ice_get_first_droptc() 161 /* get bitmap of PFC enabled TCs */ in ice_get_first_droptc() 318 /* returns number of contigous TCs and 1 TC for non-contigous TCs, in ice_dcb_bwchk() [all …]
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/openbmc/linux/Documentation/networking/device_drivers/ethernet/intel/ |
H A D | iavf.rst | 155 1. Create traffic classes (TCs). Maximum of 8 TCs can be created per interface. 158 Example: Sets up two tcs, tc0 and tc1, with 16 queues each and max tx rate set 167 map: priority mapping for up to 16 priorities to tcs (e.g. map 0 0 0 0 1 1 1 1 172 number of queues for all tcs is 64 or number of cores, whichever is lower.) 176 TCs, the queue configurations, and the QoS parameters. 186 TCs are configured using mqprio. 192 3. Apply TCs to ingress (RX) flow of interface:: 199 - Setting up channels via ethtool (ethtool -L) is not supported when the TCs 216 - If traffic matches multiple TC filters that point to different TCs, that
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H A D | i40e.rst | 664 1. Create traffic classes (TCs). Maximum of 8 TCs can be created per interface. 667 Example: Sets up two tcs, tc0 and tc1, with 16 queues each and max tx rate set 676 map: priority mapping for up to 16 priorities to tcs (e.g. map 0 0 0 0 1 1 1 1 681 number of queues for all tcs is 64 or number of cores, whichever is lower.) 685 TCs, the queue configurations, and the QoS parameters. 697 3. Apply TCs to ingress (RX) flow of interface:: 705 TCs are configured using mqprio. 722 - If traffic matches multiple TC filters that point to different TCs,
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/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,bcm-voter.yaml | 24 qcom,tcs-wait: 30 The AMC TCS is triggered immediately when icc_set_bw() is called. The 63 qcom,tcs-wait = <QCOM_ICC_TAG_AMC>;
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/openbmc/linux/arch/x86/include/asm/ |
H A D | sgx.h | 190 * enum sgx_tcs_flags - execution flags for TCS 203 * struct sgx_tcs - Thread Control Structure (TCS) 204 * @state: used to mark an entered TCS 219 * Thread Control Structure (TCS) is an enclave page visible in its address 221 * an enclave by supplying address of TCS to ENCLU(EENTER). A TCS can be entered 257 * %SGX_PAGE_TYPE_TCS: a TCS page 282 * %SGX_SECINFO_TCS: a TCS page
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/openbmc/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl2/ |
H A D | hw_atl2.c | 115 unsigned int tcs, q_per_tc; in hw_atl2_hw_queue_to_tc_map_set() local 124 tcs = 8; in hw_atl2_hw_queue_to_tc_map_set() 128 tcs = 4; in hw_atl2_hw_queue_to_tc_map_set() 135 for (tc = 0; tc != tcs; tc++) { in hw_atl2_hw_queue_to_tc_map_set() 177 tx_buff_size /= cfg->tcs; in hw_atl2_hw_qos_set() 178 rx_buff_size /= cfg->tcs; in hw_atl2_hw_qos_set() 179 for (tc = 0; tc < cfg->tcs; tc++) { in hw_atl2_hw_qos_set() 263 (BIT(nic_cfg->tcs) - 1); in hw_atl2_hw_init_tx_tc_rate_limit() 269 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit() 295 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit() [all …]
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/openbmc/linux/drivers/net/ethernet/aquantia/atlantic/ |
H A D | aq_nic.c | 81 if (cfg->tcs > 2) in aq_nic_cfg_update_num_vecs() 101 cfg->tcs = AQ_CFG_TCS_DEF; in aq_nic_cfg_start() 153 cfg->prio_tc_map[i] = cfg->tcs * i / 8; in aq_nic_cfg_start() 555 self->aq_vecs * cfg->tcs); in aq_nic_start() 560 self->aq_vecs * cfg->tcs); in aq_nic_start() 564 for (i = 0; i < cfg->tcs; i++) { in aq_nic_start() 1068 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) { in aq_nic_get_stats() 1600 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) in aq_nic_setup_tc_mqprio() argument 1609 * disable request (tcs is 0) and we already is disabled in aq_nic_setup_tc_mqprio() 1611 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos)) in aq_nic_setup_tc_mqprio() [all …]
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H A D | aq_ptp.h | 21 /* Index must to be 8 (8 TCs) or 16 (4 TCs).
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/openbmc/linux/arch/x86/include/uapi/asm/ |
H A D | sgx.h | 129 * Regular (PT_REG) or TCS (PT_TCS) can be removed from an initialized 162 * @tcs: TCS used to enter the enclave 177 __u64 tcs; member 207 * with @function, asynchronous exit pointer, and @run.tcs respectively.
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/openbmc/u-boot/doc/device-tree-bindings/nand/ |
H A D | nvidia,tegra20-nand.txt | 29 Order is: MAX_TRP_TREA, TWB, Max(tCS, tCH, tALS, tALH), 30 TWHR, Max(tCS, tCH, tALS, tALH), TWH, TWP, TRH, TADL
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/openbmc/linux/include/soc/qcom/ |
H A D | tcs.h | 48 * struct tcs_request: A set of tcs_cmds sent together in a TCS 72 /* Construct a Bus Clock Manager (BCM) specific TCS command */
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/openbmc/linux/drivers/net/ethernet/mscc/ |
H A D | ocelot_mm.c | 60 /* Only commit preemptible TCs when MAC Merge is active. in ocelot_port_update_active_preemptible_tcs() 71 * TCs affects the oversized frame dropping logic, so that needs to be in ocelot_port_update_active_preemptible_tcs() 79 "port %d %s/%s, MM TX %s, preemptible TCs 0x%x, active 0x%x\n", in ocelot_port_update_active_preemptible_tcs()
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/openbmc/linux/drivers/interconnect/qcom/ |
H A D | bcm-voter.c | 14 #include <soc/qcom/tcs.h> 30 * @tcs_wait: mask for which buckets require TCS completion 265 * qcom_icc_bcm_voter_commit - generates and commits tcs cmds based on bcms 382 if (of_property_read_u32(np, "qcom,tcs-wait", &voter->tcs_wait)) in qcom_icc_bcm_voter_probe()
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/openbmc/linux/drivers/net/ethernet/intel/fm10k/ |
H A D | fm10k_dcbnl.c | 15 /* we support 8 TCs in all modes */ in fm10k_dcbnl_ieee_getets() 81 /* record flow control max count and state of TCs */ in fm10k_dcbnl_ieee_getpfc()
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