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/openbmc/linux/drivers/clk/sifive/
H A Dsifive-prci.c10 #include "sifive-prci.h"
11 #include "fu540-prci.h"
12 #include "fu740-prci.h"
19 * __prci_readl() - read from a PRCI register
20 * @pd: PRCI context
21 * @offs: register offset to read from (in bytes, from PRCI base address)
24 * address of the PRCI register target described by @pd, and return
46 * @r: value read from the PRCI PLL configuration register
48 * Given a value @r read from an FU740 PRCI PLL configuration register,
89 * assemble a PRCI PLL configuration register value, and return it to
[all …]
H A Dfu540-prci.h8 * The FU540 PRCI implements clock and reset control for the SiFive
10 * over all PRCI resources.
12 * This driver is based on the PRCI driver written by Wesley Terpstra:
25 #include <dt-bindings/clock/sifive-fu540-prci.h>
27 #include "sifive-prci.h"
29 /* PRCI integration data for each WRPLL instance */
67 /* List of clock controls provided by the PRCI */
H A Dsifive-prci.h220 * @va: base virtual address of the PRCI IP block
223 * PRCI per-device instance data
236 * @cfg0_offs: WRPLL CFG0 register offset (in bytes) from the PRCI base address
237 * @cfg1_offs: WRPLL CFG1 register offset (in bytes) from the PRCI base address
252 * struct __prci_clock - describes a clock device managed by PRCI
258 * @pd: PRCI-specific data associated with this clock (if not NULL)
260 * PRCI clock data. Used by the PRCI driver to register PRCI-provided
H A Dfu740-prci.h12 #include <dt-bindings/clock/sifive-fu740-prci.h>
14 #include "sifive-prci.h"
16 /* PRCI integration data for each WRPLL instance */
83 /* List of clock controls provided by the PRCI */
H A DKconfig13 bool "PRCI driver for SiFive SoCs"
19 Supports the Power Reset Clock interface (PRCI) IP block found in
H A DMakefile2 obj-$(CONFIG_CLK_SIFIVE_PRCI) += sifive-prci.o
/openbmc/u-boot/drivers/clk/sifive/
H A Dfu540-prci.c18 * The FU540 PRCI implements clock and reset control for the SiFive
20 * over all PRCI resources.
22 * This driver is based on the PRCI driver written by Wesley Terpstra.
40 #include <dt-bindings/clk/sifive-fu540-prci.h>
156 * @va: base virtual address of the PRCI IP block
159 * PRCI per-device instance data
171 * @cfg0_offs: WRPLL CFG0 register offset (in bytes) from the PRCI base address
198 * struct __prci_clock - describes a clock device managed by PRCI
204 * @pd: PRCI-specific data associated with this clock (if not NULL)
206 * PRCI clock data. Used by the PRCI driver to register PRCI-provided
[all …]
H A DKconfig13 bool "PRCI driver for SiFive FU540 SoCs"
17 Supports the Power Reset Clock interface (PRCI) IP block found in
H A DMakefile5 obj-$(CONFIG_CLK_SIFIVE_FU540_PRCI) += fu540-prci.o
/openbmc/linux/Documentation/devicetree/bindings/clock/sifive/
H A Dfu540-prci.yaml5 $id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml#
8 title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)
15 is via the PRCI IP block.
17 macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
26 const: sifive,fu540-c000-prci
54 prci: clock-controller@10000000 {
55 compatible = "sifive,fu540-c000-prci";
H A Dfu740-prci.yaml5 $id: http://devicetree.org/schemas/clock/sifive/fu740-prci.yaml#
8 title: SiFive FU740 Power Reset Clock Interrupt Controller (PRCI)
16 is via the PRCI IP block.
18 macros defined in include/dt-bindings/clock/sifive-fu740-prci.h.
27 const: sifive,fu740-c000-prci
58 prci: clock-controller@10000000 {
59 compatible = "sifive,fu740-c000-prci";
/openbmc/linux/arch/riscv/boot/dts/sifive/
H A Dfu740-c000.dtsi6 #include <dt-bindings/clock/sifive-fu740-prci.h>
181 prci: clock-controller@10000000 { label
182 compatible = "sifive,fu740-c000-prci";
193 clocks = <&prci FU740_PRCI_CLK_PCLK>;
201 clocks = <&prci FU740_PRCI_CLK_PCLK>;
209 clocks = <&prci FU740_PRCI_CLK_PCLK>;
221 clocks = <&prci FU740_PRCI_CLK_PCLK>;
234 clocks = <&prci FU740_PRCI_CLK_PCLK>;
245 clocks = <&prci FU740_PRCI_CLK_PCLK>;
255 clocks = <&prci FU740_PRCI_CLK_PCLK>;
[all …]
H A Dfu540-c000.dtsi6 #include <dt-bindings/clock/sifive-fu540-prci.h>
180 prci: clock-controller@10000000 { label
181 compatible = "sifive,fu540-c000-prci";
191 clocks = <&prci FU540_PRCI_CLK_TLCLK>;
208 clocks = <&prci FU540_PRCI_CLK_TLCLK>;
216 clocks = <&prci FU540_PRCI_CLK_TLCLK>;
229 clocks = <&prci FU540_PRCI_CLK_TLCLK>;
240 clocks = <&prci FU540_PRCI_CLK_TLCLK>;
250 clocks = <&prci FU540_PRCI_CLK_TLCLK>;
263 clocks = <&prci FU540_PRCI_CLK_GEMGXLPLL>,
[all …]
/openbmc/qemu/include/hw/misc/
H A Dsifive_u_prci.h2 * QEMU SiFive U PRCI (Power, Reset, Clock, Interrupt) interface
61 #define TYPE_SIFIVE_U_PRCI "riscv.sifive.u.prci"
85 * Clock indexes for use by Device Tree data and the PRCI driver.
87 * These values are from sifive-fu540-prci.h in the Linux kernel.
H A Dsifive_e_prci.h2 * QEMU SiFive E PRCI (Power, Reset, Clock, Interrupt) interface
54 #define TYPE_SIFIVE_E_PRCI "riscv.sifive.e.prci"
/openbmc/qemu/hw/misc/
H A Dsifive_e_prci.c2 * QEMU SiFive E PRCI (Power, Reset, Clock, Interrupt)
6 * Simple model of the PRCI to emulate register reads made by the SDK BSP
116 * Create PRCI device. in type_init()
H A Dsifive_u_prci.c2 * QEMU SiFive U PRCI (Power, Reset, Clock, Interrupt)
6 * Simple model of the PRCI to emulate register reads made by the SDK BSP
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dsifive,fu740-pcie.yaml87 #include <dt-bindings/clock/sifive-fu740-prci.h>
115 clocks = <&prci FU740_PRCI_CLK_PCIE_AUX>;
116 resets = <&prci 4>;
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dsifive-serial.yaml56 #include <dt-bindings/clock/sifive-fu540-prci.h>
62 clocks = <&prci FU540_PRCI_CLK_TLCLK>;
/openbmc/linux/include/dt-bindings/clock/
H A Dsifive-fu540-prci.h11 /* Clock indexes for use by Device Tree data and the PRCI driver */
H A Dsifive-fu740-prci.h12 /* Clock indexes for use by Device Tree data and the PRCI driver */
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dsifive,gpio.yaml79 #include <dt-bindings/clock/sifive-fu540-prci.h>
/openbmc/qemu/hw/riscv/
H A Dsifive_u.c13 * 3) PRCI (Power, Reset, Clock, Interrupt)
245 "sifive,fu540-c000-prci"); in create_fdt()
768 object_initialize_child(obj, "prci", &s->prci, TYPE_SIFIVE_U_PRCI); in type_init()
854 if (!sysbus_realize(SYS_BUS_DEVICE(&s->prci), errp)) { in sifive_u_soc_realize()
857 sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0, memmap[SIFIVE_U_DEV_PRCI].base); in sifive_u_soc_realize()
/openbmc/qemu/include/hw/riscv/
H A Dsifive_u.h48 SiFiveUPRCIState prci; member
/openbmc/u-boot/doc/
H A DREADME.sifive-fu54012 2. SiFive PRCI Driver for clock.
218 [ 3.126400] sifive-u54-prci 10000000.prci: Registered U54 core clocks

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