/openbmc/u-boot/include/configs/ |
H A D | dra7xx_evm.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 22 /* MMC ENV related defines */ 81 * 0x000000 - 0x040000 : QSPI.SPL (256KiB) 82 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 83 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) 84 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) 85 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) 86 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) 87 * 0x9E0000 - 0x2000000 : USERLAND 114 /* NAND support */ [all …]
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H A D | chiliboard.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * Copyright (C) 2017 Grinn - http://grinn-global.com/ 26 "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system\0" \ 28 "nandboot=echo Booting from nand ...; " \ 30 "nand read ${fdt_addr} NAND.u-boot-spl-os; " \ 31 "nand read ${loadaddr} NAND.kernel; " \ 32 "bootz ${loadaddr} - ${fdt_addr}\0" 65 "bootz ${loadaddr} - ${fdt_addr}; " \ 97 "bootz ${loadaddr} - ${fdt_addr}; " \ 125 /* NAND: device related configs */ [all …]
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H A D | ti816x_evm.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 5 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 6 * Antoine Tenart, <atenart@adeneo-embedded.com> 48 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 57 * GPMC NAND block. We support 1 device and the physical address to 63 /* NAND: SPL related configs */ 65 /* NAND: device related configs */ 72 /* NAND: driver related configs */ 94 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 109 * Disable MMC DM for SPL build and can be re-enabled after adding
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H A D | am335x_evm.h | 4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 35 #define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds" 48 "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \ 50 "nandboot=echo Booting from nand ...; " \ 52 "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ 53 "nand read ${loadaddr} NAND.kernel; " \ 54 "bootz ${loadaddr} - ${fdtaddr}\0" 92 func(NAND, nand, 0) \ 115 "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \ 143 "setenv fdtfile am335x-bone.dtb; fi; " \ [all …]
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H A D | am43xx_evm.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 20 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 55 * When building U-Boot such that there is no previous loader 97 * Disable MMC DM for SPL build and can be re-enabled after adding 144 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ 169 "if test -n $uenvcmd; then " \ 177 "bootz ${loadaddr} - ${fdtaddr}; " \ 184 "setenv fdtfile am43x-epos-evm.dtb; fi; " \ 186 "setenv fdtfile am437x-gp-evm.dtb; fi; " \ [all …]
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H A D | x530.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 23 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 40 /* NAND */ 51 #define MTDIDS_DEFAULT "nand0=nand" 52 #define MTDPARTS_DEFAULT "mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)" 76 /* NAND */ 111 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) 120 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 123 /* SPL related SPI defines */
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H A D | bav335x.h | 4 * Copyright (c) 2012-2014 Birdland Audio - http://birdland.com/oem 5 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 35 #define CONFIG_SYS_LDSCRIPT "board/birdland/bav335x/u-boot.lds" 50 "nandboot=echo Booting from nand ...; " \ 52 "nand read ${fdtaddr} u-boot-spl-os; " \ 53 "nand read ${loadaddr} kernel; " \ 54 "bootz ${loadaddr} - ${fdtaddr}\0" 76 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ 113 "env import -t -r $loadaddr $filesize\0" \ 126 "if test -e mmc ${bootpart} /etc/fstab; then " \ [all …]
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H A D | taurus.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 7 * U-Boot file: include/configs/at91sam9260ek.h 9 * (C) Copyright 2007-2008 39 /* Misc CPU related */ 59 * Initialized before u-boot gets started. 65 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 70 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 72 /* NAND flash */ 112 /* SPL related */ 119 /* bootstrap in spi flash , u-boot + env + linux in nandflash */ [all …]
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H A D | db-88f6820-amc.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 36 /* NAND */ 50 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash 53 * NAND support may be added in the future. 61 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) 70 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 74 /* SPL related SPI defines */ 80 * mv-common.h should be defined after CMD configs since it used them 83 #include "mv-common.h"
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H A D | mcx.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 21 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader 22 * and older u-boot.bin with the new U-Boot SPL. 40 * DDR related 54 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 79 * Board NAND Info. 83 /* nand at CS0 */ 86 /* NAND devices */ 88 /* nand device jffs2 lives on */ 98 /* Setup MTD for NAND on the SOM */ [all …]
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/openbmc/u-boot/board/freescale/mpc8315erdb/ |
H A D | README | 2 ----------------------------------------- 11 +------+ +------+ 14 +------+ ON +------+ ON 18 To boot the image at the beginning of NAND flash, use these 21 +------+ +------+ 24 +------+ ON +------+ ON 28 When booting from NAND, use u-boot-nand.bin, not u-boot.bin. 38 0xe060_0000 0xe060_7fff NAND FLASH (CS1) 32K 41 When booting from NAND, NAND flash is CS0 and NOR flash 59 export CROSS_COMPILE=your-cross-compiler-prefix- [all …]
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/openbmc/u-boot/board/freescale/mpc8313erdb/ |
H A D | README | 2 ----------------------------------------- 11 +------+ +------+ 14 +------+ ON +------+ ON 18 To boot the image at the beginning of NAND flash, use these 21 +------+ +------+ 24 +------+ ON +------+ ON 28 When booting from NAND, use u-boot-nand.bin, not u-boot.bin. 38 0xe280_0000 0xe280_7fff NAND FLASH (CS1) 32K 44 When booting from NAND, NAND flash is CS0 and NOR flash 61 export CROSS_COMPILE=your-cross-compiler-prefix- [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mtd/ |
H A D | marvell,nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell NAND Flash Controller (NFC) 10 - Miquel Raynal <miquel.raynal@bootlin.com> 15 - items: 16 - const: marvell,armada-8k-nand-controller 17 - const: marvell,armada370-nand-controller 18 - enum: [all …]
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H A D | brcm,brcmnand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom STB NAND Controller 10 - Brian Norris <computersforpeace@gmail.com> 11 - Kamal Dasu <kdasu.kdev@gmail.com> 14 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND 15 flash chips. It has a memory-mapped register interface for both control 25 -- Additional SoC-specific NAND controller properties -- 27 The NAND controller is integrated differently on the variety of SoCs on which [all …]
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/openbmc/linux/Documentation/driver-api/ |
H A D | mtdnand.rst | 2 MTD NAND Driver Programming Interface 10 The generic NAND driver supports almost all NAND and AG-AND based chips 15 board drivers or filesystem drivers suitable for NAND devices. 31 -------------------------- 37 - [MTD Interface] 43 - [NAND Interface] 45 These functions are exported and provide the interface to the NAND 48 - [GENERIC] 53 - [DEFAULT] 55 Default functions provide hardware related functionality which is [all …]
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/openbmc/linux/drivers/mtd/nand/raw/ |
H A D | fsmc_nand.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Driver for NAND portions 11 * Based on drivers/mtd/nand/nomadik_nand.c (removed in v3.8) 20 #include <linux/dma-direction.h> 21 #include <linux/dma-mapping.h> 29 #include <linux/mtd/nand-ecc-sw-hamming.h> 37 #include <mtd/mtd-abi.h> 61 /* fsmc controller registers for NAND flash */ 99 * TOUDEL = 7ns (Output delay from the flip-flops to the board) 120 * struct fsmc_nand_data - structure for FSMC NAND device state [all …]
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/openbmc/linux/include/linux/mtd/ |
H A D | nand.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Copyright 2017 - Free Electrons 6 * Boris Brezillon <boris.brezillon@free-electrons.com> 18 * struct nand_memory_organization - Memory organization structure 19 * @bits_per_cell: number of bits per NAND cell 27 * @ntargets: total number of targets exposed by the NAND device 55 * struct nand_row_converter - Information needed to convert an absolute offset 67 * struct nand_pos - NAND position object 68 * @target: the NAND target/die 74 * These information are usually used by specific sub-layers to select the [all …]
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H A D | rawnand.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org> 8 * Contains standard defines and IDs for NAND flash devices 17 #include <linux/mtd/nand.h> 29 /* The maximum number of NAND chips in an array */ 50 * Standard NAND flash commands 75 #define NAND_CMD_NONE -1 84 #define NAND_DATA_IFACE_CHECK_ONLY -1 97 * Enable generic NAND 'page erased' check. This check is only done when 98 * ecc.correct() returns -EBADMSG. [all …]
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/openbmc/linux/fs/jffs2/ |
H A D | README.Locking | 3 --------------------------- 11 --------- 13 The alloc_sem is a per-filesystem mutex, used primarily to ensure 24 which they belong. This is for the benefit of NAND flash - adding new 26 until this happens we ensure that any data in the write-buffer at the 28 was written afterwards. Hence, we can ensure the newly-obsoleted nodes 29 don't actually get erased until the write-buffer has been flushed to 32 With the introduction of NAND flash support and the write-buffer, 33 the alloc_sem is also used to protect the wbuf-related members of the 37 Ordering constraints: See f->sem. [all …]
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/openbmc/linux/drivers/pinctrl/ |
H A D | pinctrl-xway.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/drivers/pinctrl/pinmux-xway.c 4 * based on linux/drivers/pinctrl/pinmux-pxa910.c 21 #include "pinctrl-lantiq.h" 110 /* --------- ase related code --------- */ 238 /* --------- danube related code --------- */ 341 GRP_MUX("nand ale", EBU, danube_pins_nand_ale), 342 GRP_MUX("nand cs1", EBU, danube_pins_nand_cs1), 343 GRP_MUX("nand cle", EBU, danube_pins_nand_cle), 389 "nand ale", "nand cs1", [all …]
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/openbmc/u-boot/board/ti/ks2_evm/ |
H A D | README | 1 U-Boot port for Texas Instruments Keystone II EVM boards 4 Author: Murali Karicheri <m-karicheri2@ti.com> 6 This README has information on the U-Boot port for K2HK, K2E, and K2L EVM boards. 8 http://www.advantech.com/Support/TI-EVM/EVMK2HX_sd.aspx 9 https://www.einfochips.com/index.php/partnerships/texas-instruments/k2e-evm.html 10 https://www.einfochips.com/index.php/partnerships/texas-instruments/k2l-evm.html 29 Some of the peripherals that are configured by U-Boot 30 +------+-------+-------+-----------+-----------+-------+-------+----+ 31 | |DDR3 |NAND |MSM SRAM |ETH ports |UART |I2C |SPI | 32 +------+-------+-------+-----------+-----------+-------+-------+----+ [all …]
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/openbmc/u-boot/drivers/mtd/nand/raw/ |
H A D | sunxi_nand.c | 1 // SPDX-License-Identifier: GPL-2.0+ 7 * https://github.com/yuq/sunxi-nfc-mtd 10 * https://github.com/hno/Allwinner-Info 30 #include <nand.h> 78 #define NFC_PAGE_SHIFT(x) (((x) < 10 ? 0 : (x) - 10) << 8) 114 #define NFC_ADR_NUM(x) (((x) - 1) << 16) 171 * @RB_NATIVE: use sunxi NAND controller Ready/Busy support. The Ready/Busy 172 * pin of the NAND flash chip must be connected to one of the 173 * native NAND R/B pins (those which can be muxed to the NAND 176 * pin of the NAND flash chip must be connected to a GPIO capable [all …]
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/openbmc/u-boot/drivers/mtd/nand/spi/ |
H A D | winbond.c | 1 // SPDX-License-Identifier: GPL-2.0 40 return -ERANGE; in w25m02gv_ooblayout_ecc() 42 region->offset = (16 * section) + 8; in w25m02gv_ooblayout_ecc() 43 region->length = 8; in w25m02gv_ooblayout_ecc() 52 return -ERANGE; in w25m02gv_ooblayout_free() 54 region->offset = (16 * section) + 2; in w25m02gv_ooblayout_free() 55 region->length = 6; in w25m02gv_ooblayout_free() 72 spinand->scratchbuf, in w25m02gv_select_target() 75 *spinand->scratchbuf = target; in w25m02gv_select_target() 76 return spi_mem_exec_op(spinand->slave, &op); in w25m02gv_select_target() [all …]
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/openbmc/u-boot/board/ti/am335x/ |
H A D | README | 5 the related build targets (am335x_evm_uartN, etc). 12 - AM335x GP EVM 13 - AM335x EVM SK 14 - Beaglebone White 15 - Beaglebone Black 23 worth noting that aside from things such as NAND or MMC only being 27 - GPIO is only required if DDR3 power is controlled in a way similar to 29 - SPI is only required for SPI flash, or exposing the SPI bus. 32 - I2C, to talk with the PMIC and ensure that we do not run afoul of 38 define additional text blocks (such as for NAND or DFU strings). Also [all …]
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/openbmc/u-boot/doc/ |
H A D | README.nand | 1 # SPDX-License-Identifier: GPL-2.0+ 2 NAND FLASH commands and notes 12 nand bad 15 nand device 16 Print information about the current NAND device. 18 nand device num 21 nand erase off|partition size 22 nand erase clean [off|partition size] 32 If `clean' is specified, a JFFS2-style clean marker is written to 40 nand info [all …]
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