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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dmpfs.c36 #include <linux/mlx5/mpfs.h>
39 #include "lib/mpfs.h"
41 /* HW L2 Table (MPFS) management */
100 struct mlx5_mpfs *mpfs; in mlx5_mpfs_init() local
105 mpfs = kzalloc(sizeof(*mpfs), GFP_KERNEL); in mlx5_mpfs_init()
106 if (!mpfs) in mlx5_mpfs_init()
109 mutex_init(&mpfs->lock); in mlx5_mpfs_init()
110 mpfs->size = l2table_size; in mlx5_mpfs_init()
111 mpfs->bitmap = bitmap_zalloc(l2table_size, GFP_KERNEL); in mlx5_mpfs_init()
112 if (!mpfs->bitmap) { in mlx5_mpfs_init()
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/openbmc/linux/drivers/soc/microchip/
H A Dmpfs-sys-controller.c3 * Microchip PolarFire SoC (MPFS) system controller driver
19 #include <soc/microchip/mpfs.h>
49 dev_warn(sys_controller->client.dev, "MPFS sys controller service timeout\n"); in mpfs_blocking_transaction()
66 dev_warn(sys_controller->client.dev, "MPFS sys controller service failed\n"); in mpfs_blocking_transaction()
104 .name = "mpfs-rng",
108 .name = "mpfs-generic-service",
141 dev_info(&pdev->dev, "Registered MPFS system controller\n"); in mpfs_sys_controller_probe()
162 {.compatible = "microchip,mpfs-sys-controller", },
195 dev_dbg(dev, "Parent device was not an MPFS system controller\n"); in mpfs_sys_controller_get()
199 dev_dbg(dev, "MPFS system controller found but could not register as a sub device\n"); in mpfs_sys_controller_get()
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H A DKconfig2 tristate "Microchip PolarFire SoC (MPFS) system controller support"
5 This driver adds support for the PolarFire SoC (MPFS) system controller.
/openbmc/linux/Documentation/devicetree/bindings/riscv/
H A Dmicrochip.yaml23 - microchip,mpfs-icicle-reference-rtlv2203
24 - microchip,mpfs-icicle-reference-rtlv2210
25 - const: microchip,mpfs-icicle-kit
26 - const: microchip,mpfs
32 - microchip,mpfs-sev-kit
34 - const: microchip,mpfs
/openbmc/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
11 compatible = "microchip,mpfs";
177 compatible = "microchip,mpfs-sys-controller";
188 compatible = "microchip,mpfs-ccache", "sifive,fu540-c000-ccache", "cache";
233 compatible = "microchip,mpfs-clkcfg";
241 compatible = "microchip,mpfs-ccc";
249 compatible = "microchip,mpfs-ccc";
257 compatible = "microchip,mpfs-ccc";
265 compatible = "microchip,mpfs-ccc";
334 compatible = "microchip,mpfs-sd4hc", "cdns,sd4hc";
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H A DMakefile2 dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb
3 dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb
4 dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb
5 dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb
6 dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb
H A Dmpfs-icicle-kit.dts6 #include "mpfs.dtsi"
7 #include "mpfs-icicle-kit-fabric.dtsi"
16 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
17 "microchip,mpfs";
H A Dmpfs-sev-kit.dts6 #include "mpfs.dtsi"
7 #include "mpfs-sev-kit-fabric.dtsi"
16 compatible = "microchip,mpfs-sev-kit", "microchip,mpfs";
H A Dmpfs-polarberry.dts6 #include "mpfs.dtsi"
7 #include "mpfs-polarberry-fabric.dtsi"
14 compatible = "sundance,polarberry", "microchip,mpfs";
H A Dmpfs-icicle-kit-fabric.dtsi5 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
6 "microchip,mpfs";
H A Dmpfs-tysom-m.dts11 #include "mpfs.dtsi"
12 #include "mpfs-tysom-m-fabric.dtsi"
19 compatible = "aldec,tysom-m-mpfs250t-rev2", "microchip,mpfs";
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dmicrochip,mpfs-musb.yaml4 $id: http://devicetree.org/schemas/usb/microchip,mpfs-musb.yaml#
7 title: Microchip MPFS USB Controller
18 - microchip,mpfs-musb
48 #include "dt-bindings/clock/microchip,mpfs-clock.h"
50 compatible = "microchip,mpfs-musb";
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmicrochip,mpfs-clkcfg.yaml4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml#
22 const: microchip,mpfs-clkcfg
44 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
55 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
70 #include <dt-bindings/clock/microchip,mpfs-clock.h>
75 compatible = "microchip,mpfs-clkcfg";
H A Dmicrochip,mpfs-ccc.yaml4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml#
20 const: microchip,mpfs-ccc
57 See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of
72 compatible = "microchip,mpfs-ccc";
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dmicrochip,mpfs-spi.yaml4 $id: http://devicetree.org/schemas/spi/microchip,mpfs-spi.yaml#
23 - const: microchip,mpfs-qspi
26 - const: microchip,mpfs-spi
50 #include "dt-bindings/clock/microchip,mpfs-clock.h"
52 compatible = "microchip,mpfs-spi";
/openbmc/linux/drivers/char/hw_random/
H A Dmpfs-rng.c3 * Microchip PolarFire SoC (MPFS) hardware random driver
13 #include <soc/microchip/mpfs.h>
86 return dev_err_probe(&pdev->dev, ret, "Failed to register MPFS hwrng\n"); in mpfs_rng_probe()
88 dev_info(&pdev->dev, "Registered MPFS hwrng\n"); in mpfs_rng_probe()
95 .name = "mpfs-rng",
103 MODULE_DESCRIPTION("PolarFire SoC (MPFS) hardware random driver");
/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dmicrochip,mpfs-can.yaml4 $id: http://devicetree.org/schemas/net/can/microchip,mpfs-can.yaml#
8 Microchip PolarFire SoC (MPFS) can controller
18 const: microchip,mpfs-can
40 compatible = "microchip,mpfs-can";
/openbmc/linux/Documentation/devicetree/bindings/soc/microchip/
H A Dmicrochip,mpfs-sys-controller.yaml4 $id: http://devicetree.org/schemas/soc/microchip/microchip,mpfs-sys-controller.yaml#
7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller
27 const: microchip,mpfs-sys-controller
38 compatible = "microchip,mpfs-sys-controller";
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dmicrochip,mpfs-mailbox.yaml4 $id: http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#
7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller
14 const: microchip,mpfs-mailbox
47 compatible = "microchip,mpfs-mailbox";
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Dmicrochip,mfps-rtc.yaml8 title: Microchip PolarFire Soc (MPFS) RTC
20 - microchip,mpfs-rtc
59 #include "dt-bindings/clock/microchip,mpfs-clock.h"
61 compatible = "microchip,mpfs-rtc";
/openbmc/linux/drivers/mailbox/
H A Dmailbox-mpfs.c3 * Microchip PolarFire SoC (MPFS) system controller/mailbox controller driver
20 #include <soc/microchip/mpfs.h>
203 ret = devm_request_irq(mbox->dev, mbox->irq, mpfs_mbox_inbox_isr, 0, "mpfs-mailbox", chan); in mpfs_mbox_startup()
262 dev_err(&pdev->dev, "Registering MPFS mailbox controller failed\n"); in mpfs_mbox_probe()
265 dev_info(&pdev->dev, "Registered MPFS mailbox controller driver\n"); in mpfs_mbox_probe()
271 {.compatible = "microchip,mpfs-mailbox", },
278 .name = "mpfs-mailbox",
287 MODULE_DESCRIPTION("MPFS mailbox controller driver");
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dmicrochip,mpfs-gpio.yaml4 $id: http://devicetree.org/schemas/gpio/microchip,mpfs-gpio.yaml#
7 title: Microchip MPFS GPIO Controller
16 - microchip,mpfs-gpio
80 compatible = "microchip,mpfs-gpio";
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dmicrochip,corei2c.yaml7 title: Microchip MPFS I2C Controller
19 - const: microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs
49 compatible = "microchip,mpfs-i2c", "microchip,corei2c-rtl-v7";
/openbmc/linux/drivers/reset/
H A Dreset-mpfs.c3 * PolarFire SoC (MPFS) Peripheral Clock Reset Controller
15 #include <dt-bindings/clock/microchip,mpfs-clock.h>
16 #include <soc/microchip/mpfs.h>
142 .name = "clk_mpfs.reset-mpfs",
/openbmc/linux/drivers/clk/microchip/
H A DMakefile4 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs.o
5 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs-ccc.o

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