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/openbmc/u-boot/arch/arm/mach-uniphier/clk/
H A DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-early-ld4.o clk-dram-ld4.o dpll-ld4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-early-ld4.o clk-dram-ld4.o dpll-pro4.o
7 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-early-ld4.o clk-dram-ld4.o dpll-sld8.o
8 obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-early-ld4.o clk-dram-pro5.o dpll-pro5.o
9 obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o
10 obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-early-ld4.o clk-dram-pxs2.o dpll-pxs2.o
14 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o pll-ld4.o dpll-tail.o
16 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o pll-ld4.o dpll-tail.o
/openbmc/linux/arch/ia64/lib/
H A Dip_fast_csum.S44 (p7) ld4 r20=[in0],8
45 (p7) ld4 r21=[r15],8
48 ld4 r22=[in0],8
49 ld4 r23=[r15],8
51 ld4 r24=[in0]
100 ld4 r20=[in0],4
101 ld4 r21=[in1],4
104 ld4 r22=[in0],4
105 ld4 r23=[in1],4
108 ld4 r24=[in0],4
[all …]
H A Dcopy_user.S343 // Stop bit not required after ld4 because if we fail on ld4
346 EX(.failure_in1,(p8) ld4 val2[0]=[src1],4) // 4-byte aligned
394 EX(.failure_in1,(p7) ld4 val1[1]=[src1],4) // at least 4 bytes
500 // size loads, e.g. failing ld4 means no ld1 nor ld2 executed
515 // The combination ld1, ld2, ld4, ld8 where you fail on ld8 is impossible
534 // 2 or 3 bytes left to copy and we did not execute the ld8 nor ld4.
/openbmc/u-boot/arch/arm/dts/
H A Duniphier-ld4-ref.dts3 // Device Tree Source for UniPhier LD4 Reference Board
9 #include "uniphier-ld4.dtsi"
14 model = "UniPhier LD4 Reference Board";
15 compatible = "socionext,uniphier-ld4-ref", "socionext,uniphier-ld4";
H A Duniphier-ld4.dtsi3 // Device Tree Source for UniPhier LD4 SoC
11 compatible = "socionext,uniphier-ld4";
207 compatible = "socionext,uniphier-ld4-mioctrl",
212 compatible = "socionext,uniphier-ld4-mio-clock";
217 compatible = "socionext,uniphier-ld4-mio-reset";
223 compatible = "socionext,uniphier-ld4-perictrl",
228 compatible = "socionext,uniphier-ld4-peri-clock";
233 compatible = "socionext,uniphier-ld4-peri-reset";
315 compatible = "socionext,uniphier-ld4-soc-glue",
320 compatible = "socionext,uniphier-ld4-pinctrl";
[all …]
H A Dzynq-zybo-z7.dts34 ld4 {
35 label = "zynq-zybo-z7:green:ld4";
/openbmc/linux/arch/arm/boot/dts/socionext/
H A Duniphier-ld4.dtsi3 // Device Tree Source for UniPhier LD4 SoC
12 compatible = "socionext,uniphier-ld4";
211 compatible = "socionext,uniphier-ld4-mioctrl",
216 compatible = "socionext,uniphier-ld4-mio-clock";
221 compatible = "socionext,uniphier-ld4-mio-reset";
227 compatible = "socionext,uniphier-ld4-perictrl",
232 compatible = "socionext,uniphier-ld4-peri-clock";
237 compatible = "socionext,uniphier-ld4-peri-reset";
338 compatible = "socionext,uniphier-ld4-soc-glue",
343 compatible = "socionext,uniphier-ld4-pinctrl";
[all …]
H A Duniphier-ld4-ref.dts3 // Device Tree Source for UniPhier LD4 Reference Board
9 #include "uniphier-ld4.dtsi"
14 model = "UniPhier LD4 Reference Board";
15 compatible = "socionext,uniphier-ld4-ref", "socionext,uniphier-ld4";
H A DMakefile4 uniphier-ld4-ref.dtb \
/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += umc-ld4.o \
6 ddrphy-training.o ddrphy-ld4.o
8 ddrphy-training.o ddrphy-ld4.o
10 ddrphy-training.o ddrphy-ld4.o
/openbmc/u-boot/arch/arm/mach-uniphier/boot-device/
H A DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += boot-device-ld4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += boot-device-ld4.o
7 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-device-ld4.o
/openbmc/linux/Documentation/devicetree/bindings/arm/socionext/
H A Duniphier.yaml17 - description: LD4 SoC boards
20 - socionext,uniphier-ld4-ref
21 - const: socionext,uniphier-ld4
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsocionext,uniphier-clock.yaml17 - socionext,uniphier-ld4-clock
29 - socionext,uniphier-ld4-mio-clock
40 - socionext,uniphier-ld4-peri-clock
/openbmc/linux/arch/ia64/kernel/
H A Dfsys.S70 ld4 r9=[r9]
78 ld4 r8=[r8] // r8 = pid->level
85 ld4 r8=[r17] // r8 = pid->numbers[pid->level].nr
101 ld4 r9=[r9]
109 ld4 r8=[r8] // r8 = pid->level
116 ld4 r8=[r17] // r8 = pid->numbers[pid->level].nr
199 ld4 r2 = [r2] // process work pending flags
215 ld4.acq r28 = [r20] // gtod_lock.sequence, Must take first
221 ld4 r2 = [r29] // itc_jitter value
225 ld4 r3 = [r24] // clocksource mult value
[all …]
H A Drelocate_kernel.S68 ld4 r19=[r2],4 // r19=ptce_count[0]
69 ld4 r21=[r17],4 // r21=ptce_stride[0]
71 ld4 r20=[r2] // r20=ptce_count[1]
72 ld4 r22=[r17] // r22=ptce_stride[1]
/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Dsocionext,uniphier-reset.yaml17 - socionext,uniphier-ld4-reset
29 - socionext,uniphier-ld4-mio-reset
41 - socionext,uniphier-ld4-peri-reset
/openbmc/u-boot/arch/arm/mach-uniphier/bcu/
H A DMakefile3 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += bcu-ld4.o
4 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += bcu-ld4.o
/openbmc/linux/Documentation/devicetree/bindings/soc/socionext/
H A Dsocionext,uniphier-sysctrl.yaml21 - socionext,uniphier-ld4-sysctrl
53 const: socionext,uniphier-ld4-sysctrl
63 - socionext,uniphier-ld4-sysctrl
/openbmc/u-boot/arch/arm/mach-uniphier/sbc/
H A DMakefile5 obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-ld4.o
6 obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-ld4.o
/openbmc/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-zybo-z7.dts28 led-ld4 {
29 label = "zynq-zybo-z7:green:ld4";
/openbmc/u-boot/arch/arm/mach-uniphier/
H A DKconfig18 bool "UniPhier LD4/sLD8 SoCs"
34 bool "Enable UniPhier LD4 SoC support"
/openbmc/linux/drivers/clk/uniphier/
H A Dclk-uniphier-core.c96 .compatible = "socionext,uniphier-ld4-clock",
133 .compatible = "socionext,uniphier-ld4-mio-clock",
170 .compatible = "socionext,uniphier-ld4-peri-clock",
/openbmc/linux/arch/ia64/include/asm/
H A Dspinlock.h55 asm volatile ("ld4.c.nc %0=[%1]" : "=r"(serve) : "r"(p) : "memory"); in __ticket_spin_lock()
142 "ld4 r2 = [%0];;\n" in arch_read_lock()
192 "ld4 r2 = [%0];;\n" in arch_write_lock()
/openbmc/linux/drivers/pinctrl/uniphier/
H A DKconfig13 bool "UniPhier LD4 SoC pinctrl driver"
/openbmc/u-boot/drivers/pinctrl/uniphier/
H A DKconfig7 bool "UniPhier LD4 SoC pinctrl driver"

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