| /openbmc/linux/arch/powerpc/sysdev/xics/ |
| H A D | ics-native.c | 3 * ICS backend for OPAL managed interrupts.
32 struct ics ics; member
38 #define to_ics_native(_ics) container_of(_ics, struct ics_native, ics)
48 struct ics *ics = irq_data_get_irq_chip_data(d); in ics_native_unmask_irq() local
49 struct ics_native *in = to_ics_native(ics); in ics_native_unmask_irq()
52 pr_devel("ics-native: unmask virq %d [hw 0x%x]\n", d->irq, vec); in ics_native_unmask_irq()
86 struct ics *ics = irq_data_get_irq_chip_data(d); in ics_native_mask_irq() local
87 struct ics_native *in = to_ics_native(ics); in ics_native_mask_irq()
89 pr_devel("ics-native: mask virq %d [hw 0x%x]\n", d->irq, vec); in ics_native_mask_irq()
101 struct ics *ics = irq_data_get_irq_chip_data(d); in ics_native_set_affinity() local
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| H A D | ics-opal.c | 3 * ICS backend for OPAL managed interrupts.
47 pr_devel("ics-hal: unmask virq %d [hw 0x%x]\n", d->irq, hw_irq); in ics_opal_unmask_irq()
87 pr_devel("ics-hal: mask virq %d [hw 0x%x]\n", d->irq, hw_irq); in ics_opal_mask_irq()
123 pr_debug("ics-hal: set-affinity irq %d [hw 0x%x] server: 0x%x/0x%x\n", in ics_opal_set_affinity()
137 .name = "OPAL ICS",
147 static int ics_opal_host_match(struct ics *ics, struct device_node *node) in ics_opal_host_match() argument
152 static int ics_opal_check(struct ics *ics, unsigned int hw_irq) in ics_opal_check() argument
169 static void ics_opal_mask_unknown(struct ics *ics, unsigned long vec) in ics_opal_mask_unknown() argument
183 static long ics_opal_get_server(struct ics *ics, unsigned long vec) in ics_opal_get_server() argument
196 /* Only one global & state struct ics */
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| H A D | ics-rtas.c | 152 static int ics_rtas_check(struct ics *ics, unsigned int hw_irq) in ics_rtas_check() argument
168 static void ics_rtas_mask_unknown(struct ics *ics, unsigned long vec) in ics_rtas_mask_unknown() argument
173 static long ics_rtas_get_server(struct ics *ics, unsigned long vec) in ics_rtas_get_server() argument
183 static int ics_rtas_host_match(struct ics *ics, struct device_node *node) in ics_rtas_host_match() argument
192 /* Only one global & state struct ics */
193 static struct ics ics_rtas = {
208 /* We enable the RTAS "ICS" if RTAS is present with the in ics_rtas_init()
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| H A D | Makefile | 6 obj-$(CONFIG_PPC_ICS_RTAS) += ics-rtas.o
7 obj-$(CONFIG_PPC_ICS_NATIVE) += ics-native.o
8 obj-$(CONFIG_PPC_POWERNV) += ics-opal.o icp-opal.o
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| H A D | xics-common.c | 30 /* Globals common to all ICP/ICS implementations */
41 static struct ics *xics_ics;
338 /* Don't call into ICS for IPIs */ in xics_host_map()
351 /* Let the ICS be the chip data for the XICS domain. For ICS native */ in xics_host_map()
479 void __init xics_register_ics(struct ics *ics) in xics_register_ics() argument
483 xics_ics = ics; in xics_register_ics()
491 /* We fetch the interrupt server size from the first ICS node in xics_get_server_size()
528 /* Now locate ICS */ in xics_init()
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| /openbmc/qemu/hw/intc/ |
| H A D | xics.c | 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics
70 void ics_pic_print_info(ICSState *ics, GString *buf) in ics_pic_print_info() argument
74 g_string_append_printf(buf, "ICS %4x..%4x %p\n", in ics_pic_print_info()
75 ics->offset, ics->offset + ics->nr_irqs - 1, ics); in ics_pic_print_info()
77 if (!ics->irqs) { in ics_pic_print_info()
82 ics_synchronize_state(ics); in ics_pic_print_info()
85 for (i = 0; i < ics->nr_irqs; i++) { in ics_pic_print_info()
86 ICSIRQState *irq = ics->irqs + i; in ics_pic_print_info()
92 ics->offset + i, in ics_pic_print_info()
109 static void ics_reject(ICSState *ics, uint32_t nr);
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| H A D | xics_spapr.c | 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics
156 ICSState *ics = spapr->ics; in rtas_set_xive() local
165 if (!ics) { in rtas_set_xive()
174 if (!ics_valid_irq(ics, nr) || !xics_icp_get(XICS_FABRIC(spapr), server) in rtas_set_xive()
180 srcno = nr - ics->offset; in rtas_set_xive()
181 ics_write_xive(ics, srcno, server, priority, priority); in rtas_set_xive()
191 ICSState *ics = spapr->ics; in rtas_get_xive() local
200 if (!ics) { in rtas_get_xive()
207 if (!ics_valid_irq(ics, nr)) { in rtas_get_xive()
213 srcno = nr - ics->offset; in rtas_get_xive()
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| H A D | xics_kvm.c | 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
183 * ICS-KVM
185 void ics_get_kvm_state(ICSState *ics) in ics_get_kvm_state() argument
195 for (i = 0; i < ics->nr_irqs; i++) { in ics_get_kvm_state()
196 ICSIRQState *irq = &ics->irqs[i]; in ics_get_kvm_state()
198 if (ics_irq_free(ics, i)) { in ics_get_kvm_state()
203 i + ics->offset, &state, false, &error_fatal); in ics_get_kvm_state()
247 void ics_synchronize_state(ICSState *ics) in ics_synchronize_state() argument
249 ics_get_kvm_state(ics); in ics_synchronize_state()
252 int ics_set_kvm_state_one(ICSState *ics, int srcno, Error **errp) in ics_set_kvm_state_one() argument
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| /openbmc/linux/arch/powerpc/kvm/ |
| H A D | book3s_xics.c | 39 * Each ICS has a spin lock protecting the information about the IRQ
51 * ICS
55 * - Make ICS lockless as well, or at least a per-interrupt lock or hashed
59 /* -- ICS routines -- */
72 struct kvmppc_ics *ics; in ics_deliver_irq() local
76 XICS_DBG("ics deliver %#x (level: %d)\n", irq, level); in ics_deliver_irq()
78 ics = kvmppc_xics_find_ics(xics, irq, &src); in ics_deliver_irq()
79 if (!ics) { in ics_deliver_irq()
83 state = &ics->irq_state[src]; in ics_deliver_irq()
125 static void ics_check_resend(struct kvmppc_xics *xics, struct kvmppc_ics *ics, in ics_check_resend() argument
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| H A D | book3s_hv_rm_xics.c | 37 /* -- ICS routines -- */
39 struct kvmppc_ics *ics, struct kvmppc_icp *icp) in ics_rm_check_resend() argument
44 struct ics_irq_state *state = &ics->irq_state[i]; in ics_rm_check_resend()
229 struct kvmppc_ics *ics = xics->ics[icsid]; in icp_rm_check_resend() local
233 if (!ics) in icp_rm_check_resend()
235 ics_rm_check_resend(xics, ics, icp); in icp_rm_check_resend()
281 struct kvmppc_ics *ics; in icp_rm_deliver_irq() local
301 /* Get the ICS state and lock it */ in icp_rm_deliver_irq()
302 ics = kvmppc_xics_find_ics(xics, new_irq, &src); in icp_rm_deliver_irq()
303 if (!ics) { in icp_rm_deliver_irq()
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| H A D | book3s_xics.h | 13 * There are up to 1024 ICS nodes, each of which can represent
63 /* One bit per ICS */
112 struct kvmppc_ics *ics[KVMPPC_XICS_MAX_ICS_ID + 1]; member
133 struct kvmppc_ics *ics; in kvmppc_xics_find_ics() local
139 ics = xics->ics[icsid]; in kvmppc_xics_find_ics()
140 if (!ics) in kvmppc_xics_find_ics()
142 return ics; in kvmppc_xics_find_ics()
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| /openbmc/qemu/hw/pci-host/ |
| H A D | pnv_phb3_msi.c | 101 ICSState *ics = ICS(msi); in phb3_msi_try_send() local
132 icp_irq(ics, server, srcno + ics->offset, prio); in phb3_msi_try_send()
160 ICSState *ics = ICS(msi); in pnv_phb3_msi_send() local
165 if (src >= ics->nr_irqs) { in pnv_phb3_msi_send()
193 static void phb3_msi_reject(ICSState *ics, uint32_t nr) in phb3_msi_reject() argument
195 Phb3MsiState *msi = PHB3_MSI(ics); in phb3_msi_reject()
196 unsigned int srcno = nr - ics->offset; in phb3_msi_reject()
206 static void phb3_msi_resend(ICSState *ics) in phb3_msi_resend() argument
208 Phb3MsiState *msi = PHB3_MSI(ics); in phb3_msi_resend()
246 ICSState *ics = ICS(msi); in pnv_phb3_msi_update_config() local
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| /openbmc/qemu/include/hw/ppc/ |
| H A D | xics.h | 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics
89 #define TYPE_ICS "ics"
91 ICS, TYPE_ICS)
116 static inline bool ics_valid_irq(ICSState *ics, uint32_t nr) in ics_valid_irq() argument
118 return (nr >= ics->offset) && (nr < (ics->offset + ics->nr_irqs)); in ics_valid_irq()
161 void icp_irq(ICSState *ics, int server, int nr, uint8_t priority);
164 void ics_write_xive(ICSState *ics, int nr, int server,
168 static inline bool ics_irq_free(ICSState *ics, uint32_t srcno) in ics_irq_free() argument
170 return !(ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MASK); in ics_irq_free()
173 void ics_set_irq_type(ICSState *ics, int srcno, bool lsi);
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| H A D | xics_spapr.h | 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics
33 #define TYPE_ICS_SPAPR "ics-spapr"
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| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | xics.h | 3 * Common definitions across all variants of ICP and ICS interrupt
69 /* Native ICS */
75 /* RTAS ICS */
82 /* HAL ICS */
89 /* ICS instance, hooked up to chip_data of an irq */
90 struct ics { struct
92 int (*check)(struct ics *ics, unsigned int hwirq); argument
93 void (*mask_unknown)(struct ics *ics, unsigned long vec); argument
94 long (*get_server)(struct ics *ics, unsigned long vec); argument
95 int (*host_match)(struct ics *ics, struct device_node *node); argument
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| /openbmc/linux/drivers/iio/adc/ |
| H A D | stmpe-adc.c | 212 static void stmpe_adc_voltage_chan(struct iio_chan_spec *ics, int chan) in stmpe_adc_voltage_chan() argument
214 ics->type = IIO_VOLTAGE; in stmpe_adc_voltage_chan()
215 ics->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); in stmpe_adc_voltage_chan()
216 ics->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); in stmpe_adc_voltage_chan()
217 ics->indexed = 1; in stmpe_adc_voltage_chan()
218 ics->channel = chan; in stmpe_adc_voltage_chan()
221 static void stmpe_adc_temp_chan(struct iio_chan_spec *ics, int chan) in stmpe_adc_temp_chan() argument
223 ics->type = IIO_TEMP; in stmpe_adc_temp_chan()
224 ics->info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED); in stmpe_adc_temp_chan()
225 ics->indexed = 1; in stmpe_adc_temp_chan()
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| /openbmc/qemu/hw/ppc/ |
| H A D | spapr_irq.c | 208 { SPAPR_INTC((spapr_)->ics), SPAPR_INTC((spapr_)->xive), }
317 object_property_add_child(OBJECT(spapr), "ics", obj); in spapr_irq_init()
325 spapr->ics = ICS_SPAPR(obj); in spapr_irq_init()
432 if (spapr->ics) { in spapr_qirq()
433 assert(ics_valid_irq(spapr->ics, irq)); in spapr_qirq()
518 if (!spapr->ics) { in spapr_irq_update_active_intc()
530 new_intc = SPAPR_INTC(spapr->ics); in spapr_irq_update_active_intc()
540 static int ics_find_free_block(ICSState *ics, int num, int alignnum) in ics_find_free_block() argument
544 for (first = 0; first < ics->nr_irqs; first += alignnum) { in ics_find_free_block()
545 if (num > (ics->nr_irqs - first)) { in ics_find_free_block()
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| H A D | pnv_psi.c | 168 ICSState *ics = &PNV8_PSI(psi)->ics; in pnv_psi_set_irsn() local
181 /* We ignore the compare mask as well, our ICS emulation is too in pnv_psi_set_irsn()
185 ics->offset = (val & PSIHB_IRSN_COMP_MSK) >> PSIHB_IRSN_COMP_SH; in pnv_psi_set_irsn()
255 * CLG: We could define a new ICS object with a custom eoi() in pnv_psi_power8_set_irq()
269 ICSState *ics = &PNV8_PSI(psi)->ics; in pnv_psi_set_xivr() local
299 * if you change the source number dynamically, our simple ICS in pnv_psi_set_xivr()
301 * ICS entry based on what source number was written. This will in pnv_psi_set_xivr()
305 ics_write_xive(ics, src, server, prio, prio); in pnv_psi_set_xivr()
477 object_initialize_child(obj, "ics-psi", &psi8->ics, TYPE_ICS); in pnv_psi_power8_instance_init()
478 object_property_add_alias(obj, ICS_PROP_XICS, OBJECT(&psi8->ics), in pnv_psi_power8_instance_init()
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| /openbmc/linux/Documentation/watchdog/ |
| H A D | wdt.rst | 9 - ICS WDT501-P
10 - ICS WDT501-P (no fan tachometer)
11 - ICS WDT500-P
26 The ICS ISA-bus wdt card cannot be safely probed for. Instead you need to
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| /openbmc/linux/drivers/input/touchscreen/ |
| H A D | mk712.c | 3 * ICS MK712 touchscreen controller driver
12 * This driver supports the ICS MicroClock MK712 TouchScreen controller,
15 * Documentation for ICS MK712 can be found at:
45 MODULE_DESCRIPTION("ICS MicroClock MK712 TouchScreen driver");
174 mk712_dev->name = "ICS MicroClock MK712 TouchScreen"; in mk712_init()
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| /openbmc/linux/block/partitions/ |
| H A D | acorn.c | 325 * Check for a valid ICS partition using the checksum.
341 * Purpose: allocate ICS partitions.
344 * Returns: -1 on error, 0 for no ICS table, 1 for partitions ok.
358 * Try ICS style partitions - sector 0 contains partition info. in adfspart_check_ICS()
369 strlcat(state->pp_buf, " [ICS]", PAGE_SIZE); in adfspart_check_ICS()
379 * Negative sizes tell the RISC OS ICS driver to ignore in adfspart_check_ICS()
437 * Purpose: allocate ICS partitions.
440 * Returns: -1 on error, 0 for no ICS table, 1 for partitions ok.
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| /openbmc/linux/Documentation/driver-api/media/ |
| H A D | v4l2-intro.rst | 7 hardware: most devices have multiple ICs, export multiple device nodes in
11 Especially the fact that V4L2 drivers have to setup supporting ICs to
13 Usually these ICs are connected to the main bridge driver through one or
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| /openbmc/linux/Documentation/devicetree/bindings/hwmon/pmbus/ |
| H A D | ti,lm25066.yaml | 8 title: National Semiconductor/Texas Instruments LM250x6/LM506x power-management ICs
14 The LM25066 family of power-management ICs (a.k.a. hot-swap
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| /openbmc/linux/arch/riscv/include/asm/ |
| H A D | kexec.h | 3 * Copyright (C) 2019 FORTH-ICS/CARV
4 * Nick Kossifidis <mick@ics.forth.gr>
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| /openbmc/linux/Documentation/devicetree/bindings/regulator/ |
| H A D | renesas,raa215300.yaml | 25 …cts/power-power-management/multi-channel-power-management-ics-pmics/ssdsoc-power-management-ics-pm…
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