Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0 |
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#
80748eb4 |
| 19-Jun-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'misc-20240619' of https://github.com/philmd/qemu into staging
Misc patches queue
. Remove deprecated pc-i440fx-2.0 -> 2.3 machines (Phil) . Always use little endian audio format in virti
Merge tag 'misc-20240619' of https://github.com/philmd/qemu into staging
Misc patches queue
. Remove deprecated pc-i440fx-2.0 -> 2.3 machines (Phil) . Always use little endian audio format in virtio-snd (Phil) . Avoid using Monitor in INTERRUPT_STATS_PROVIDER::print_info (Phil) . Introduce x-query-interrupt-controllers QMP command (Phil) . Introduce pnv_chip_foreach_cpu() to remove one CPU_FOREACH use (Cédric) . Constify few uses of IOMMUTLBEvent (Phil) . Wire loongson_ipi device to loongson3_virt/TCG (Jiaxun) . Fix inclusion of tracing headers on s390x/TCG (Phil) . Add few shortcuts missing to readline (Manos) . Update ui/display entries in MAINTAINERS (Gerd) . Use qemu_add_mouse_change_notifier on Cocoa (Akihiko) . Fix Standard VGA screen blanking and cleanups (Gerd) . Fix USB/MTP reported "free space" value (Fabio) . Cast size_memop() returned value (Roman)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmZyuKYACgkQ4+MsLN6t # wN5guxAAvwJWbxQA8B4+gfiYaMK0AnM4leuCZ+8Sf+LhK32k2UkFA4NnKBkxGmO+ # 45NOEEEEv1Tukvtq1STHkYEdERJbHndpSFk2XmaYY09Ofo54vv2dXy6MD6GJriuA # Pr9Mivzs490RSPXmxhsa8GU5IE6CO3LamgpSeH8XxPTvCbRIiB8LcKsme6utBAZv # 9dHnEX5sXEEY2ZvArQd+eueyJfRyN4+1PpQkE9uH/wLIBqHAkHgSvFVaLo+PtA7T # xfcFvrawRTWIU+P1lojmCMb+mOj+YS7yigpkkYQC4SFm0PEv5J5nyhr/mhhiVuSS # tK8DNNi44F7/Z2CzEwbwk1PEnfKWtCgG2rEiR5uT6E8nmvxaOr2LfswBjLSwVDPS # mBOnjTMLqTBPKq8E8x2di1h2cJ9PZ90zZtWzYD8Eqoq+eqz/x+8z/qP4vifzO+NB # 7lj4IQZzLn+iktDGpjfh2RNoV9F9i9BwFGJqO2i0MzVftezJuGfe9olVOP2ErpnR # jqB7gzgc6g4tYiOK9WchuIeB/S9dU/5qqQxWwINWX0j4cHF6Qq71LyejCTfpqpf8 # jjF65XdGHcyVm9NAnr18MTzwdu3YYWf4w2OGIHg7iGLC0hv3U+EzEEMpv2E6pelM # iXgtqkRQm9qJaSrjfv0MUp9irjq01aIaHceFmP20QtkMP256E6c= # =Ed8Z # -----END PGP SIGNATURE----- # gpg: Signature made Wed 19 Jun 2024 03:53:26 AM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* tag 'misc-20240619' of https://github.com/philmd/qemu: (74 commits) exec: Make the MemOp enum cast explicit ui+display: rename is_buffer_shared() -> surface_is_allocated() ui+display: rename is_placeholder() -> surface_is_placeholder() stdvga: fix screen blanking ui/cocoa: Use qemu_add_mouse_change_notifier MAINTAINERS: drop spice+ui maintainership MAINTAINERS: drop virtio-gpu maintainership util/readline: Add C-u shortcut util/readline: Add C-n, C-p shortcuts util/readline: Fix lints for readline_handle_byte target/s390x: Use s390_skeys_get|set() helper hw/s390x: Introduce s390_skeys_get|set() helpers hw/mips/loongson3_virt: Wire up loongson_ipi device hw/intc/loongson_ipi: Replace ipi_getcpu with cpu_by_arch_id hw/intc/loongson_ipi: Provide per core MMIO address spaces hw/intc: Remove loongarch_ipi.c hw/usb/dev-mtp: Correctly report free space hw/usb: Remove unused 'host.h' header hw/i386/iommu: Constify IOMMUTLBEvent in vtd_page_walk_hook prototype memory: Constify IOMMUTLBEvent in memory_region_notify_iommu() ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
dd77c49e |
| 07-Jun-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/ppc: Avoid using Monitor in ics_pic_print_info()
Replace Monitor API by HumanReadableText one.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.p
hw/ppc: Avoid using Monitor in ics_pic_print_info()
Replace Monitor API by HumanReadableText one.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Message-Id: <20240610062105.49848-5-philmd@linaro.org>
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#
5242494c |
| 07-Jun-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/ppc: Avoid using Monitor in icp_pic_print_info()
Replace Monitor API by HumanReadableText one.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.p
hw/ppc: Avoid using Monitor in icp_pic_print_info()
Replace Monitor API by HumanReadableText one.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com> Message-Id: <20240610062105.49848-3-philmd@linaro.org>
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Revision tags: v8.0.0 |
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#
55745005 |
| 17-Dec-2022 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20221216' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
reset refactoring queue: * remove uses of qdev_reset_all(), qbus_reset_all(), device_legacy_rese
Merge tag 'pull-target-arm-20221216' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
reset refactoring queue: * remove uses of qdev_reset_all(), qbus_reset_all(), device_legacy_reset() * convert various devices to 3-phase reset, so we can remove their uses of device_class_set_parent_reset()
# gpg: Signature made Fri 16 Dec 2022 21:41:11 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20221216' of https://git.linaro.org/people/pmaydell/qemu-arm: (36 commits) hw/pci-host/pnv_phb3_msi: Convert TYPE_PHB3_MSI to 3-phase reset hw/intc/xics: Convert TYPE_ICS to 3-phase reset hw/intc/xics: Reset TYPE_ICS objects with device_cold_reset() pci: Convert child classes of TYPE_PCIE_ROOT_PORT to 3-phase reset pci: Convert TYPE_PCIE_ROOT_PORT to 3-phase reset hw/display/virtio-vga: Convert TYPE_VIRTIO_VGA_BASE to 3-phase reset hw/virtio: Convert TYPE_VIRTIO_PCI to 3-phase reset target/xtensa: Convert to 3-phase reset target/tricore: Convert to 3-phase reset target/sparc: Convert to 3-phase reset target/sh4: Convert to 3-phase reset target/rx: Convert to 3-phase reset target/riscv: Convert to 3-phase reset target/ppc: Convert to 3-phase reset target/openrisc: Convert to 3-phase reset target/nios2: Convert to 3-phase reset target/mips: Convert to 3-phase reset target/microblaze: Convert to 3-phase reset target/m68k: Convert to 3-phase reset target/loongarch: Convert to 3-phase reset ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v7.2.0 |
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#
a0c2e80a |
| 25-Nov-2022 |
Peter Maydell <peter.maydell@linaro.org> |
hw/pci-host/pnv_phb3_msi: Convert TYPE_PHB3_MSI to 3-phase reset
Convert the TYPE_PHB3_MSI class to 3-phase reset, so we can avoid using the device_class_set_parent_reset() function.
Signed-off-by:
hw/pci-host/pnv_phb3_msi: Convert TYPE_PHB3_MSI to 3-phase reset
Convert the TYPE_PHB3_MSI class to 3-phase reset, so we can avoid using the device_class_set_parent_reset() function.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20221125115240.3005559-8-peter.maydell@linaro.org
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Revision tags: v7.0.0, v6.2.0, v6.1.0, v5.2.0 |
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#
4dad0a9a |
| 21-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM queue, 2020-09-18
Fixes: * Error value corrections (Markus Armbruster) * Correct object_class_dynamic
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM queue, 2020-09-18
Fixes: * Error value corrections (Markus Armbruster) * Correct object_class_dynamic_cast_assert() documentation (Eduardo Habkost) * Ensure objects using QEMU_ALIGNED are properly aligned (Richard Henderson)
QOM cleanups (Eduardo Habkost): * Rename some constants * Simplify parameters of OBJECT_DECLARE* macros * Additional DECLARE_*CHECKER* usage * Additional OBJECT_DECLARE_TYPE usage * Additional OBJECT_DECLARE_SIMPLE_TYPE usage
# gpg: Signature made Fri 18 Sep 2020 21:45:29 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request: Use OBJECT_DECLARE_SIMPLE_TYPE when possible Use OBJECT_DECLARE_TYPE when possible qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros qom: Remove ParentClassType argument from OBJECT_DECLARE_SIMPLE_TYPE scripts/codeconverter: Update to latest version target/s390x: Set instance_align on S390CPU TypeInfo target/riscv: Set instance_align on RISCVCPU TypeInfo target/ppc: Set instance_align on PowerPCCPU TypeInfo target/arm: Set instance_align on CPUARM TypeInfo qom: Allow objects to be allocated with increased alignment qom: Correct error values in two contracts qom: Clean up object_property_get_enum()'s error value qom: Correct object_class_dynamic_cast_assert() documentation sifive: Use DECLARE_*CHECKER* macros sifive: Move QOM typedefs and add missing includes sifive_u: Rename memmap enum constants sifive_e: Rename memmap enum constants
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
30b5707c |
| 16-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
One of the goals of having less boilerplate on QOM declarations is to avoid human error. Requiring an extra argument that is never
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
One of the goals of having less boilerplate on QOM declarations is to avoid human error. Requiring an extra argument that is never used is an opportunity for mistakes.
Remove the unused argument from OBJECT_DECLARE_TYPE and OBJECT_DECLARE_SIMPLE_TYPE.
Coccinelle patch used to convert all users of the macros:
@@ declarer name OBJECT_DECLARE_TYPE; identifier InstanceType, ClassType, lowercase, UPPERCASE; @@ OBJECT_DECLARE_TYPE(InstanceType, ClassType, - lowercase, UPPERCASE);
@@ declarer name OBJECT_DECLARE_SIMPLE_TYPE; identifier InstanceType, lowercase, UPPERCASE; @@ OBJECT_DECLARE_SIMPLE_TYPE(InstanceType, - lowercase, UPPERCASE);
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20200916182519.415636-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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#
f4ef8c9c |
| 11-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM boilerplate cleanup
Documentation build fix: * memory: Remove kernel-doc comment marker (Eduardo Habk
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM boilerplate cleanup
Documentation build fix: * memory: Remove kernel-doc comment marker (Eduardo Habkost)
QOM cleanups: * Rename QOM macros for consistency between TYPE_* and type checking constants (Eduardo Habkost)
QOM new macros: * OBJECT_DECLARE_* and OBJECT_DEFINE_* macros (Daniel P. Berrangé) * DECLARE_*_CHECKER macros (Eduardo Habkost)
Automated QOM boilerplate changes: * Automated changes to use DECLARE_*_CHECKER (Eduardo Habkost * Automated changes to use OBJECT_DECLARE* (Eduardo Habkost)
# gpg: Signature made Thu 10 Sep 2020 19:17:49 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request: (33 commits) virtio-vga: Use typedef name for instance_size vhost-user-vga: Use typedef name for instance_size xilinx_axienet: Use typedef name for instance_size lpc_ich9: Use typedef name for instance_size omap_intc: Use typedef name for instance_size xilinx_axidma: Use typedef name for instance_size tusb6010: Rename TUSB to TUSB6010 pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312 vfio: Rename PCI_VFIO to VFIO_PCI usb: Rename USB_SERIAL_DEV to USB_SERIAL sabre: Rename SABRE_DEVICE to SABRE rs6000_mc: Rename RS6000MC_DEVICE to RS6000MC filter-rewriter: Rename FILTER_COLO_REWRITER to FILTER_REWRITER esp: Rename ESP_STATE to ESP ahci: Rename ICH_AHCI to ICH9_AHCI vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENID vfio: Rename VFIO_AP_DEVICE_TYPE to TYPE_VFIO_AP_DEVICE dev-smartcard-reader: Rename CCID_DEV_NAME to TYPE_USB_CCID_DEV ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE gpex: Fix type checking function name ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
c821774a |
| 31-Aug-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Use OBJECT_DECLARE_TYPE where possible
Replace DECLARE_OBJ_CHECKERS with OBJECT_DECLARE_TYPE where the typedefs can be safely removed.
Generated running:
$ ./scripts/codeconverter/converter.py -i
Use OBJECT_DECLARE_TYPE where possible
Replace DECLARE_OBJ_CHECKERS with OBJECT_DECLARE_TYPE where the typedefs can be safely removed.
Generated running:
$ ./scripts/codeconverter/converter.py -i \ --pattern=DeclareObjCheckers $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20200831210740.126168-16-ehabkost@redhat.com> Message-Id: <20200831210740.126168-17-ehabkost@redhat.com> Message-Id: <20200831210740.126168-18-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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#
8110fa1d |
| 31-Aug-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Use DECLARE_*CHECKER* macros
Generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé <berrange@redha
Use DECLARE_*CHECKER* macros
Generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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#
db1015e9 |
| 03-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TY
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE.
Patch generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')
which will split "typdef struct { ... } TypedefName" declarations.
Followed by:
$ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]')
which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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Revision tags: v5.0.0 |
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#
035b2197 |
| 03-Feb-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.0-20200203' into staging
ppc patch queue 2020-02093
This pull request supersedes ppc-for-5.0-20200131. The only changes are one extra p
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.0-20200203' into staging
ppc patch queue 2020-02093
This pull request supersedes ppc-for-5.0-20200131. The only changes are one extra patch to suppress some irritating warnings during tests under TCG, and an extra Tested-by in one of the other patches.
Here's the next batch of patches for ppc and associated machine types. Highlights includes: * Remove the deprecated "prep" machine type and its OpenHackware firmware * Add TCG emulation of the msgsndp etc. supervisor privileged doorbell instructions * Allow "pnv" machine type to run Hostboot style firmwares * Add a virtual TPM device for spapr machines * Implement devices for POWER8 PHB3 and POWER9 PHB4 host bridges for the pnv machine type * Use faster Spectre mitigation by default for POWER9 DD2.3 machines * Introduce Firmware Assisted NMI dump facility for spapr machines * Fix a performance regression with load/store multiple instructions in TCG
as well as some other assorted cleanups and fixes.
# gpg: Signature made Mon 03 Feb 2020 03:30:24 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-5.0-20200203: (35 commits) tests: Silence various warnings with pseries target/ppc: Use probe_write for DCBZ target/ppc: Remove redundant mask in DCBZ target/ppc: Use probe_access for LMW, STMW target/ppc: Use probe_access for LSW, STSW ppc: spapr: Activate the FWNMI functionality migration: Include migration support for machine check handling ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls target/ppc: Build rtas error log upon an MCE target/ppc: Handle NMI guest exit ppc: spapr: Introduce FWNMI capability Wrapper function to wait on condition for the main loop mutex target/ppc/cpu.h: Put macro parameter in parentheses spapr: Enable DD2.3 accelerated count cache flush in pseries-5.0 machine ppc/pnv: change the PowerNV machine devices to be non user creatable ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge docs/specs/tpm: reST-ify TPM documentation hw/ppc/Kconfig: Enable TPM_SPAPR as part of PSERIES config tpm_spapr: Support suspend and resume ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
9ae1329e |
| 27-Jan-2020 |
Cédric Le Goater <clg@kaod.org> |
ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge
This is a model of the PCIe Host Bridge (PHB3) found on a POWER8 processor. It includes the PowerBus logic interface (PBCQ), IOMMU support, a sin
ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge
This is a model of the PCIe Host Bridge (PHB3) found on a POWER8 processor. It includes the PowerBus logic interface (PBCQ), IOMMU support, a single PCIe Gen.3 Root Complex, and support for MSI and LSI interrupt sources as found on a POWER8 system using the XICS interrupt controller.
The POWER8 processor comes in different flavors: Venice, Murano, Naple, each having a different number of PHBs. To make things simpler, the models provides 3 PHB3 per chip. Some platforms, like the Firestone, can also couple PHBs on the first chip to provide more bandwidth but this is too specific to model in QEMU.
XICS requires some adjustment to support the PHB3 MSI. The changes are provided here but they could be decoupled in prereq patches.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20200127144506.11132-3-clg@kaod.org> [dwg: Use device_class_set_props()] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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Revision tags: v4.2.0 |
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#
bbe16574 |
| 18-Nov-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/ppc-for-4.2-pull-request' into staging
ppc patch queue 2019-11-15
Several fixes for 4.2.0-rc2:
fix mos6522 performance issue, xive/xics issues, f
Merge remote-tracking branch 'remotes/vivier2/tags/ppc-for-4.2-pull-request' into staging
ppc patch queue 2019-11-15
Several fixes for 4.2.0-rc2:
fix mos6522 performance issue, xive/xics issues, fix /chosen device-tree on reset and KVM default cpu-model for all machine classes
# gpg: Signature made Mon 18 Nov 2019 10:52:19 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "lvivier@redhat.com" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/ppc-for-4.2-pull-request: mos6522: fix T1 and T2 timers spapr/kvm: Set default cpu model for all machine classes spapr: Add /chosen to FDT only at reset time to preserve kernel and initramdisk ppc: Skip partially initialized vCPUs in 'info pic' xive, xics: Fix reference counting on CPU objects ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChip
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
0990ce6a |
| 24-Oct-2019 |
Greg Kurz <groug@kaod.org> |
ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChip
SpaprInterruptControllerClass and PnvChipClass have an intc_create() method that calls the appropriate routine, ie. icp_create()
ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChip
SpaprInterruptControllerClass and PnvChipClass have an intc_create() method that calls the appropriate routine, ie. icp_create() or xive_tctx_create(), to establish the link between the VCPU and the presenter component of the interrupt controller during realize.
There aren't any symmetrical call to be called when the VCPU gets unrealized though. It is assumed that object_unparent() is the only thing to do.
This is questionable because the parenting logic around the CPU and presenter objects is really an implementation detail of the interrupt controller. It shouldn't be open-coded in the machine code.
Fix this by adding an intc_destroy() method that undoes what was done in intc_create(). Also NULLify the presenter pointers to avoid having stale pointers around. This will allow to reliably check if a vCPU has a valid presenter.
Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <157192724208.3146912.7254684777515287626.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
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58560ad2 |
| 24-Oct-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20191024' into staging
ppc patch queue 2019-10-24
Last pull request before soft freeze. * Lots of fixes and cleanups for spapr inter
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20191024' into staging
ppc patch queue 2019-10-24
Last pull request before soft freeze. * Lots of fixes and cleanups for spapr interrupt controllers * More SLOF updates to fix problems with full FDT rendering at CAS time (alas, more yet are to come) * A few other assorted changes
This isn't quite as well tested as I usually try to do before a pull request. But I've been sick and running into some other difficulties, and wanted to get this sent out before heading towards KVM forum.
# gpg: Signature made Thu 24 Oct 2019 09:14:31 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-4.2-20191024: (28 commits) spapr/xive: Set the OS CAM line at reset ppc/pnv: Fix naming of routines realizing the CPUs ppc: Reset the interrupt presenter from the CPU reset handler ppc/pnv: Add a PnvChip pointer to PnvCore ppc/pnv: Introduce a PnvCore reset handler spapr_cpu_core: Implement DeviceClass::reset spapr: move CPU reset after presenter creation spapr: Don't request to unplug the same core twice pseries: Update SLOF firmware image spapr: Move SpaprIrq::nr_xirqs to SpaprMachineClass spapr: Remove SpaprIrq::nr_msis spapr, xics, xive: Move SpaprIrq::post_load hook to backends spapr, xics, xive: Move SpaprIrq::reset hook logic into activate/deactivate spapr: Remove SpaprIrq::init_kvm hook spapr, xics, xive: Match signatures for XICS and XIVE KVM connect routines spapr, xics, xive: Move dt_populate from SpaprIrq to SpaprInterruptController spapr, xics, xive: Move print_info from SpaprIrq to SpaprInterruptController spapr, xics, xive: Move set_irq from SpaprIrq to SpaprInterruptController spapr: Formalize notion of active interrupt controller spapr, xics, xive: Move irq claim and free from SpaprIrq to SpaprInterruptController ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d49e8a9b |
| 22-Oct-2019 |
Cédric Le Goater <clg@kaod.org> |
ppc: Reset the interrupt presenter from the CPU reset handler
On the sPAPR machine and PowerNV machine, the interrupt presenters are created by a machine handler at the core level and are reset inde
ppc: Reset the interrupt presenter from the CPU reset handler
On the sPAPR machine and PowerNV machine, the interrupt presenters are created by a machine handler at the core level and are reset independently. This is not consistent and it raises issues when it comes to handle hot-plugged CPUs. In that case, the presenters are not reset. This is less of an issue in XICS, although a zero MFFR could be a concern, but in XIVE, the OS CAM line is not set and this breaks the presenting algorithm. The current code has workarounds which need a global cleanup.
Extend the sPAPR IRQ backend and the PowerNV Chip class with a new cpu_intc_reset() handler called by the CPU reset handler and remove the XiveTCTX reset handler which is now redundant.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20191022163812.330-6-clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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0f0b4386 |
| 07-Oct-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20191004' into staging
ppc patch queue 2019-10-04
Here's the next batch of ppc and spapr patches. Includes: * Fist part of a large
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.2-20191004' into staging
ppc patch queue 2019-10-04
Here's the next batch of ppc and spapr patches. Includes: * Fist part of a large cleanup to irq infrastructure * Recreate the full FDT at CAS time, instead of making a difficult to follow set of updates. This will help us move towards eliminating CAS reboots altogether * No longer provide RTAS blob to SLOF - SLOF can include it just as well itself, since guests will generally need to relocate it with a call to instantiate-rtas * A number of DFP fixes and cleanups from Mark Cave-Ayland * Assorted bugfixes * Several new small devices for powernv
# gpg: Signature made Fri 04 Oct 2019 10:35:57 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392
* remotes/dgibson/tags/ppc-for-4.2-20191004: (53 commits) ppc/pnv: Remove the XICSFabric Interface from the POWER9 machine spapr: Eliminate SpaprIrq::init hook spapr: Add return value to spapr_irq_check() spapr: Use less cryptic representation of which irq backends are supported xive: Improve irq claim/free path spapr, xics, xive: Better use of assert()s on irq claim/free paths spapr: Handle freeing of multiple irqs in frontend only spapr: Remove unhelpful tracepoints from spapr_irq_free_xics() spapr: Eliminate SpaprIrq:get_nodename method spapr: Simplify spapr_qirq() handling spapr: Fix indexing of XICS irqs spapr: Eliminate nr_irqs parameter to SpaprIrq::init spapr: Clarify and fix handling of nr_irqs spapr: Replace spapr_vio_qirq() helper with spapr_vio_irq_pulse() helper spapr: Fold spapr_phb_lsi_qirq() into its single caller xics: Create sPAPR specific ICS subtype xics: Merge TYPE_ICS_BASE and TYPE_ICS_SIMPLE classes xics: Eliminate reset hook xics: Rename misleading ics_simple_*() functions xics: Eliminate 'reject', 'resend' and 'eoi' class hooks ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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642e9271 |
| 24-Sep-2019 |
David Gibson <david@gibson.dropbear.id.au> |
xics: Merge TYPE_ICS_BASE and TYPE_ICS_SIMPLE classes
TYPE_ICS_SIMPLE is the only subtype of TYPE_ICS_BASE that's ever instantiated. The existence of different classes is mostly a hang over from wh
xics: Merge TYPE_ICS_BASE and TYPE_ICS_SIMPLE classes
TYPE_ICS_SIMPLE is the only subtype of TYPE_ICS_BASE that's ever instantiated. The existence of different classes is mostly a hang over from when we (misguidedly) had separate subtypes for the KVM and non-KVM version of the device.
There could be some call for an abstract base type for ICS variants that use a different representation of their state (PowerNV PHB3 might want this). The current split isn't really in the right place for that though. If we need this in future, we can re-implement it more in line with what we actually need.
So, collapse the two classes together into just TYPE_ICS.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org>
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da2ef5b2 |
| 23-Sep-2019 |
David Gibson <david@gibson.dropbear.id.au> |
xics: Eliminate reset hook
Currently TYPE_XICS_BASE and TYPE_XICS_SIMPLE have their own reset methods, using the standard technique for having the subtype call the supertype's methods before doing i
xics: Eliminate reset hook
Currently TYPE_XICS_BASE and TYPE_XICS_SIMPLE have their own reset methods, using the standard technique for having the subtype call the supertype's methods before doing its own thing.
But TYPE_XICS_SIMPLE is the only subtype of TYPE_XICS_BASE ever instantiated, so there's no point having the split here. Merge them together into just an ics_reset() function.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org>
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28976c99 |
| 23-Sep-2019 |
David Gibson <david@gibson.dropbear.id.au> |
xics: Rename misleading ics_simple_*() functions
There are a number of ics_simple_*() functions that aren't actually specific to TYPE_XICS_SIMPLE at all, and are equally valid on TYPE_XICS_BASE. Re
xics: Rename misleading ics_simple_*() functions
There are a number of ics_simple_*() functions that aren't actually specific to TYPE_XICS_SIMPLE at all, and are equally valid on TYPE_XICS_BASE. Rename them to ics_*() accordingly.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org>
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d5803c73 |
| 23-Sep-2019 |
David Gibson <david@gibson.dropbear.id.au> |
xics: Eliminate 'reject', 'resend' and 'eoi' class hooks
Currently ics_reject(), ics_resend() and ics_eoi() indirect through class methods. But there's only one implementation of each method, the o
xics: Eliminate 'reject', 'resend' and 'eoi' class hooks
Currently ics_reject(), ics_resend() and ics_eoi() indirect through class methods. But there's only one implementation of each method, the one in TYPE_ICS_SIMPLE. TYPE_ICS_BASE has no implementation, but it's never instantiated, and has no other subtypes.
So clean up by eliminating the method and just having ics_reject(), ics_resend() and ics_eoi() contain the logic directly.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org>
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00ed3da9 |
| 24-Sep-2019 |
David Gibson <david@gibson.dropbear.id.au> |
xics: Minor fixes for XICSFabric interface
Interface instances should never be directly dereferenced. So, the common practice is to make them incomplete types to make sure no-one does that. XICSFra
xics: Minor fixes for XICSFabric interface
Interface instances should never be directly dereferenced. So, the common practice is to make them incomplete types to make sure no-one does that. XICSFrabric, however, had a dummy type which is less safe.
We were also using OBJECT_CHECK() where we should have been using INTERFACE_CHECK().
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org>
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4a99d405 |
| 11-Sep-2019 |
Cédric Le Goater <clg@kaod.org> |
spapr/irq: Introduce an ics_irq_free() helper
It will help us to discard interrupt numbers which have not been claimed in the next patch.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id:
spapr/irq: Introduce an ics_irq_free() helper
It will help us to discard interrupt numbers which have not been claimed in the next patch.
Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190911133937.2716-2-clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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95a9457f |
| 16-Aug-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/armbru/tags/pull-include-2019-08-13-v2' into staging
Header cleanup patches for 2019-08-13
# gpg: Signature made Fri 16 Aug 2019 12:39:12 BST # gpg:
Merge remote-tracking branch 'remotes/armbru/tags/pull-include-2019-08-13-v2' into staging
Header cleanup patches for 2019-08-13
# gpg: Signature made Fri 16 Aug 2019 12:39:12 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-include-2019-08-13-v2: (29 commits) sysemu: Split sysemu/runstate.h off sysemu/sysemu.h sysemu: Move the VMChangeStateEntry typedef to qemu/typedefs.h Include sysemu/sysemu.h a lot less Clean up inclusion of sysemu/sysemu.h numa: Move remaining NUMA declarations from sysemu.h to numa.h Include sysemu/hostmem.h less numa: Don't include hw/boards.h into sysemu/numa.h Include hw/boards.h a bit less Include hw/qdev-properties.h less Include qemu/main-loop.h less Include qemu/queue.h slightly less Include hw/hw.h exactly where needed Include qom/object.h slightly less Include exec/memory.h slightly less Include migration/vmstate.h less migration: Move the VMStateDescription typedef to typedefs.h Clean up inclusion of exec/cpu-common.h Include hw/irq.h a lot less typedefs: Separate incomplete types and function types ide: Include hw/ide/internal a bit less outside hw/ide/ ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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