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/openbmc/linux/Documentation/trace/coresight/
H A Dcoresight-config.rst82 enabled on a class of devices - i.e. any ETMv4, or specific devices, e.g. a
113 associated feature 'strobing' that works on ETMv4 CoreSight Devices.
122 3) perf starts tracing on the system. As each ETMv4 that perf uses for
123 trace is enabled, the configuration manager will check if the ETMv4
125 In this case 'strobing' is enabled & programmed into the ETMv4.
127 4) When the ETMv4 is disabled, any registers marked as needing to be
H A Dcoresight-etm4x-reference.rst2 ETMv4 sysfs linux driver programming reference.
8 Supplement to existing ETMv4 driver documentation.
17 ETMv4 registers that they effect. Note the register names are given without
365 Where val is per ETMv4 spec.
378 Where val is per ETMv4 spec.
495 Set resource selector control value. Value per ETMv4 spec.
501 Where val is per ETMv4 spec.
822 data trace. As A-profile data trace is architecturally prohibited in ETMv4,
H A Dcoresight.rst121 ETMv3.x ETMv4, PTMv1.0, PTMv1.1, STM, STM500, ITM
/openbmc/linux/drivers/hwtracing/coresight/
H A Dcoresight-etm4x-cfg.h12 /* ETMv4 specific config defines */
27 /* ETMv4 specific config functions */
H A Dcoresight-cfg-afdo.c9 /* ETMv4 includes and features */
15 /* preload in features for ETMv4 */
H A Dcoresight-etm4x.h229 * See ETMv4.4 spec ARM IHI0064F section 4.3.6 System instructions
568 /* ETMv4 resources */
591 /* ETMv4 programming modes */
646 * * = 4 for ETMv4
771 * struct etmv4_config - configuration information related to an ETMv4
986 * @arch_features: Bitmap of arch features of etmv4 devices.
H A Dcoresight-etm4x-cfg.c134 * @csdev: An ETMv4 CoreSight device.
H A DKconfig101 tristate "CoreSight ETMv4.x / ETE driver"
H A Dcoresight-config.h31 #define CS_CFG_MATCH_CLASS_SRC_ETM4 0x0002 /* match any ETMv4 device */
H A Dcoresight-etm-perf.c59 /* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
61 /* contextid2 enables tracing CONTEXTIDR_EL2 for ETMv4 */
H A Dcoresight-etm4x-core.c666 /* Go from generic option to ETMv4 specifics */ in etm4_parse_event_config()
1095 * the component is an ETMv4. Even though TRCIDR1 also in etm4_init_iomem_access()
1102 pr_warn_once("TRCDEVARCH doesn't match ETMv4 architecture\n"); in etm4_init_iomem_access()
1742 * section 1.3.4 ("Possible functional configurations of an ETMv4 trace in __etm4_cpu_save()
2217 /* ETMv4 UCI data */
H A Dcoresight-etm4x-sysfs.c2437 * accessing the ETMv4 trace core registers in etmv4_cross_read()
/openbmc/linux/tools/perf/util/cs-etm-decoder/
H A Dcs-etm-decoder.c158 * For ETMv4 if the trace minor version is 4 or more then we can assume in cs_etm_decoder__get_etmv4_arch_ver()
169 config->reg_configr = params->etmv4.reg_configr; in cs_etm_decoder__gen_etmv4_config()
170 config->reg_traceidr = params->etmv4.reg_traceidr; in cs_etm_decoder__gen_etmv4_config()
171 config->reg_idr0 = params->etmv4.reg_idr0; in cs_etm_decoder__gen_etmv4_config()
172 config->reg_idr1 = params->etmv4.reg_idr1; in cs_etm_decoder__gen_etmv4_config()
173 config->reg_idr2 = params->etmv4.reg_idr2; in cs_etm_decoder__gen_etmv4_config()
174 config->reg_idr8 = params->etmv4.reg_idr8; in cs_etm_decoder__gen_etmv4_config()
180 config->arch_ver = cs_etm_decoder__get_etmv4_arch_ver(params->etmv4.reg_idr1); in cs_etm_decoder__gen_etmv4_config()
668 csid = (t_params->etmv4.reg_traceidr & CORESIGHT_TRACE_ID_VAL_MASK); in cs_etm_decoder__create_etm_decoder()
H A Dcs-etm-decoder.h56 struct cs_etmv4_trace_params etmv4; member
/openbmc/linux/tools/perf/util/
H A Dcs-etm.h68 /* ETMv4 metadata */
87 * ETE metadata is ETMv4 plus TRCDEVARCH register and doesn't support header V0 since it was
134 * ETMv4 exception encoding number:
H A Dcs-etm.c660 t_params[idx].etmv4.reg_idr0 = metadata[idx][CS_ETMV4_TRCIDR0]; in cs_etm__set_trace_param_etmv4()
661 t_params[idx].etmv4.reg_idr1 = metadata[idx][CS_ETMV4_TRCIDR1]; in cs_etm__set_trace_param_etmv4()
662 t_params[idx].etmv4.reg_idr2 = metadata[idx][CS_ETMV4_TRCIDR2]; in cs_etm__set_trace_param_etmv4()
663 t_params[idx].etmv4.reg_idr8 = metadata[idx][CS_ETMV4_TRCIDR8]; in cs_etm__set_trace_param_etmv4()
664 t_params[idx].etmv4.reg_configr = metadata[idx][CS_ETMV4_TRCCONFIGR]; in cs_etm__set_trace_param_etmv4()
665 t_params[idx].etmv4.reg_traceidr = metadata[idx][CS_ETMV4_TRCTRACEIDR]; in cs_etm__set_trace_param_etmv4()
2036 * ETMv4 exception type CS_ETMV4_EXC_CALL covers SVC, SMC and in cs_etm__is_syscall()
2111 * ETMv4 has 5 bits for exception number; if the numbers in cs_etm__is_sync_exception()
3146 if (HAS_PARAM(j, ETMV4, TS_SOURCE) || metadata[j][CS_ETMV4_TS_SOURCE] != 1) in cs_etm__has_virtual_ts()
/openbmc/linux/tools/perf/arch/arm/util/
H A Dcs-etm.c493 * bits in ETMv3/PTM. For ETMv4 we must remap options in cs_etmv4_get_config()
519 int etmv3 = 0, etmv4 = 0, ete = 0; in cs_etm_info_priv_size() local
535 etmv4++; in cs_etm_info_priv_size()
550 etmv4++; in cs_etm_info_priv_size()
560 (etmv4 * CS_ETMV4_PRIV_SIZE) + in cs_etm_info_priv_size()
574 /* Take any of the RO files for ETMv4 and see if it present */ in cs_etm_is_etmv4()
709 /* ETE uses the same registers as ETMv4 plus TRCDEVARCH */ in cs_etm_save_ete_header()
/openbmc/linux/tools/include/linux/
H A Dcoresight-pmu.h39 /* ETMv4 CONFIGR programming bits for the ETM OPTs */
/openbmc/linux/include/linux/
H A Dcoresight-pmu.h39 /* ETMv4 CONFIGR programming bits for the ETM OPTs */
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Darm,embedded-trace-extension.yaml16 allows tracing the CPU execution. It overlaps with the CoreSight ETMv4
/openbmc/linux/tools/perf/tests/shell/lib/
H A Dcoresight.sh8 # This currently works with ETMv4 / ETF not any other packet types at thi