Home
last modified time | relevance | path

Searched +full:ecx +full:- +full:2000 (Results 1 – 25 of 36) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Dcalxeda.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
12 Bindings for boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC
13 or Cortex-A15 based ECX-2000 SOCs
20 - enum:
21 - calxeda,highbank
22 - calxeda,ecx-2000
/openbmc/linux/arch/arm/boot/dts/calxeda/
H A Decx-2000.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
6 /dts-v1/;
12 model = "Calxeda ECX-2000";
13 compatible = "calxeda,ecx-2000";
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a15";
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 dtb-$(CONFIG_ARCH_HIGHBANK) += \
4 ecx-2000.dtb
5 dtb-$(CONFIG_ARCH_HIGHBANK) += \
7 ecx-2000.dtb
/openbmc/u-boot/arch/x86/cpu/intel_common/
H A Dcar.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
9 * Copyright (C) 2007-2008 coresystems GmbH
15 #include <asm/msr-index.h>
19 #include <asm/processor-flags.h>
27 /* Cache 4GB - MRC_SIZE_KB for MRC */
28 #define CACHE_MRC_BYTES ((CONFIG_CACHE_MRC_SIZE_KB << 10) - 1)
29 #define CACHE_MRC_BASE (0xFFFFFFFF - CACHE_MRC_BYTES)
32 #define CPU_PHYSMASK_HI (1 << (CONFIG_CPU_ADDR_BITS - 32) - 1)
38 * value (built-in self test). We preserve this value until it can
[all …]
H A Dmicrocode.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2000 Ronald G. Minnich
16 #include <asm/msr-index.h>
22 * struct microcode_update - standard microcode header from Intel
43 update->data = fdt_getprop(blob, node, "data", &update->size); in microcode_decode_node()
44 if (!update->data) in microcode_decode_node()
45 return -ENOENT; in microcode_decode_node()
47 update->header_version = fdtdec_get_int(blob, node, in microcode_decode_node()
48 "intel,header-version", 0); in microcode_decode_node()
49 update->update_revision = fdtdec_get_int(blob, node, in microcode_decode_node()
[all …]
/openbmc/qemu/docs/system/arm/
H A Dhighbank.rst4 ``highbank`` is a model of the Calxeda Highbank (ECX-1000) system,
5 which has four Cortex-A9 cores.
7 ``midway`` is a model of the Calxeda Midway (ECX-2000) system,
8 which has four Cortex-A15 cores.
12 - L2x0 cache controller
13 - SP804 dual timer
14 - PL011 UART
15 - PL061 GPIOs
16 - PL031 RTC
17 - PL022 synchronous serial port controller
[all …]
/openbmc/linux/drivers/cpufreq/
H A Dhighbank-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * the cpufreq-dt driver changes to frequency to alert the highbank
19 #include <linux/pl320-ipc.h>
40 if (clk_data->new_rate > clk_data->old_rate) in hb_cpufreq_clk_notify()
41 while (hb_voltage_change(clk_data->new_rate)) in hb_cpufreq_clk_notify()
45 if (clk_data->new_rate < clk_data->old_rate) in hb_cpufreq_clk_notify()
46 while (hb_voltage_change(clk_data->new_rate)) in hb_cpufreq_clk_notify()
60 struct platform_device_info devinfo = { .name = "cpufreq-dt", }; in hb_cpufreq_driver_init()
67 (!of_machine_is_compatible("calxeda,ecx-2000"))) in hb_cpufreq_driver_init()
68 return -ENODEV; in hb_cpufreq_driver_init()
[all …]
H A Dcpufreq-dt-platdev.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include "cpufreq-dt.h"
16 * platforms using "operating-points" (V1) property.
19 { .compatible = "allwinner,sun4i-a10", },
20 { .compatible = "allwinner,sun5i-a10s", },
21 { .compatible = "allwinner,sun5i-a13", },
22 { .compatible = "allwinner,sun5i-r8", },
23 { .compatible = "allwinner,sun6i-a31", },
24 { .compatible = "allwinner,sun6i-a31s", },
25 { .compatible = "allwinner,sun7i-a20", },
[all …]
/openbmc/linux/arch/x86/kernel/
H A Dhead_64.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
7 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
21 #include <asm/processor-flags.h>
26 #include <asm/nospec-branch.h>
33 * because we need identity-mapped pages.
36 #define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
70 leaq (__end_init_task - PTREGS_SIZE)(%rip), %rsp
[all …]
H A Dcpuid.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* ----------------------------------------------------------------------- *
4 * Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
6 * ----------------------------------------------------------------------- */
16 * and the upper 32 bits of the file position as the incoming %ecx,
54 cpuid_count(cmd->regs.eax, cmd->regs.ecx, in cpuid_smp_cpuid()
55 &cmd->regs.eax, &cmd->regs.ebx, in cpuid_smp_cpuid()
56 &cmd->regs.ecx, &cmd->regs.edx); in cpuid_smp_cpuid()
58 complete(&cmd->done); in cpuid_smp_cpuid()
72 return -EINVAL; /* Invalid chunk size */ in cpuid_read()
[all …]
H A Dapm_32.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* -*- linux-c -*-
4 * Copyright 1994-2001 Stephen Rothwell (sfr@canb.auug.org.au)
16 * (Thanks to Ulrich Windl <Ulrich.Windl@rz.uni-regensburg.de>)
29 * Jan 2000, Version 1.12
30 * Feb 2000, Version 1.13
31 * Nov 2000, Version 1.14
43 * 1.1: support user-space standby and suspend, power off after system
46 * is only incorrect by 30-60mS (vs. 1S previously) (Gabor J. Toth
48 * screen-blanking and gpm (Stephen Rothwell); Linux 1.99.4
[all …]
H A Dprocess_32.c5 * Gareth Hughes <gareth@valinux.com>, May 2000
9 * This file handles the architecture-dependent parts of process handling..
70 printk("%sEAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n", in __show_regs()
71 log_lvl, regs->ax, regs->bx, regs->cx, regs->dx); in __show_regs()
73 log_lvl, regs->si, regs->di, regs->bp, regs->sp); in __show_regs()
75 log_lvl, (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, regs->ss, regs->flags); in __show_regs()
94 /* Only print out debug registers if they are in their non-default state. */ in __show_regs()
107 BUG_ON(dead_task->mm); in release_thread()
115 regs->fs = 0; in start_thread()
116 regs->ds = __USER_DS; in start_thread()
[all …]
/openbmc/linux/arch/arm/mach-highbank/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Calxeda ECX-1000/2000 (Highbank/Midway)"
H A Dhighbank.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2010-2011 Calxeda, Inc.
8 #include <linux/dma-map-ops.h>
12 #include <linux/pl320-ipc.h>
21 #include <asm/hardware/cache-l2x0.h>
55 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) in highbank_init_irq()
71 int reg = -1; in highbank_platform_notifier()
78 if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci")) in highbank_platform_notifier()
80 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci")) in highbank_platform_notifier()
82 else if (of_device_is_compatible(dev->of_node, "arm,pl330")) in highbank_platform_notifier()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dcalxeda-ddr-ctrlr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/calxeda-ddr-ctrlr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Andre Przywara <andre.przywara@arm.com>
20 - calxeda,hb-ddr-ctrl
21 - calxeda,ecx-2000-ddr-ctrl
30 - compatible
31 - reg
32 - interrupts
[all …]
/openbmc/linux/arch/x86/um/
H A Dptrace_32.c2 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
9 #include <asm/ptrace-abi.h>
21 if (err != -EINVAL) in arch_switch_to()
23 "not EINVAL\n", -err); in arch_switch_to()
58 [ECX] = HOST_CX,
81 case ECX: in putreg()
92 UPT_SYSCALL_NR(&child->thread.regs.regs) = value; in putreg()
96 return -EIO; in putreg()
100 return -EIO; in putreg()
105 return -EIO; in putreg()
[all …]
/openbmc/linux/include/uapi/linux/
H A Dtoshiba.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2 /* toshiba.h -- Linux driver for accessing the SMM on Toshiba laptops
4 * Copyright (c) 1996-2000 Jonathan A. Buzzard (jonathan@buzzard.org.uk)
41 unsigned int ecx __attribute__ ((packed)); member
48 * IOCTLs (0x90 - 0x91)
59 * SCI_GET (0xf300) or SCI_SET (0xf400), returning -EINVAL if not.
/openbmc/linux/arch/x86/entry/
H A Dentry_64_compat.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Compatibility mode system call entry point for x86-64.
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
7 #include <asm/asm-offsets.h>
16 #include <asm/nospec-branch.h>
25 * 32-bit SYSENTER entry.
27 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
28 * on 64-bit kernels running on Intel CPUs.
33 * never happened in any of Google's Bionic versions -- it only happened
34 * in a narrow range of Intel-provided versions.
[all …]
H A Dentry_64.S1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
7 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
9 * entry.S contains the system-call and fault low-level handling routines.
14 * - iret frame: Architecture defined interrupt frame from SS to RIP
18 * - SYM_FUNC_START/END:Define functions in the symbol table.
19 * - idtentry: Define exception entry points.
25 #include <asm/asm-offsets.h>
40 #include <asm/nospec-branch.h>
50 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
[all …]
/openbmc/linux/drivers/idle/
H A Dintel_idle.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * intel_idle.c - native hardware idle loop for modern Intel processors
5 * Copyright (c) 2013 - 2020, Intel Corporation.
23 * for preventing entry into deep C-states
25 * CPU will flush caches as needed when entering a C-state via MWAIT
33 * ACPI has a .suspend hack to turn off deep c-statees during suspend
39 /* un-commen
139 unsigned long ecx = 1*irqoff; /* break on interrupt flag */ __intel_idle() local
212 unsigned long ecx = 1; /* break on interrupt flag */ intel_idle_s2idle() local
1717 unsigned int eax, ebx, ecx, edx; sklh_idle_state_table_update() local
2057 unsigned int eax, ebx, ecx; intel_idle_init() local
[all...]
/openbmc/linux/arch/x86/kernel/cpu/
H A Damd.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <asm/spec-ctrl.h>
19 #include <asm/pci-direct.h>
32 * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX
43 * variable number of family-specific model-stepping ranges created by
54 #define AMD_LEGACY_ERRATUM(...) { -1, __VA_ARGS__, 0 }
93 /* OSVW unavailable or ID unknown, match family-model-stepping range */ in cpu_has_amd_erratum()
94 ms = (cpu->x86_model << 4) | cpu->x86_stepping; in cpu_has_amd_erratum()
96 if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) && in cpu_has_amd_erratum()
143 * and section 2.6.2 of "AMD-K6 Processor Revision Guide - Model 6"
[all …]
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
62 #include <asm/intel-family.h>
140 info = (struct ppin_info *)id->driver_data; in ppin_init()
142 if (rdmsrl_safe(info->msr_ppin_ctl, &val)) in ppin_init()
152 wrmsrl_safe(info->msr_ppin_ctl, val | 2UL); in ppin_init()
153 rdmsrl_safe(info->msr_ppin_ctl, &val); in ppin_init()
158 c->ppi in ppin_init()
813 unsigned int eax, ebx, ecx, edx; detect_num_cpu_cores() local
826 unsigned int n, dummy, ebx, ecx, edx, l2size; cpu_detect_cache_sizes() local
888 u32 eax, ebx, ecx, edx; detect_ht_early() local
1034 u32 eax, ebx, ecx, edx; get_cpu_cap() local
1116 u32 eax, ebx, ecx, edx; get_cpu_address_sizes() local
[all...]
/openbmc/linux/arch/x86/kernel/cpu/microcode/
H A Dintel.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
24 #include <asm/intel-family.h>
63 return hdr->datasize ? hdr->totalsiz in get_totalsize()
74 unsigned int eax, ebx, ecx, edx; intel_cpu_collect_info() local
402 unsigned int eax = 1, ebx, ecx = 0, edx; load_builtin_intel_microcode() local
[all...]
/openbmc/qemu/hw/arm/
H A Dhighbank.c4 * Copyright (c) 2010-2012 Calxeda
31 #include "qemu/error-report.h"
33 #include "hw/ide/ahci-sysbus.h"
39 #include "target/arm/cpu-qom.h"
100 #define TYPE_HIGHBANK_REGISTERS "highbank-regs"
113 .name = "highbank-regs",
126 s->regs[0x40] = 0x05F20121; in highbank_regs_reset()
127 s->regs[0x41] = 0x2; in highbank_regs_reset()
128 s->regs[0x42] = 0x05F30121; in highbank_regs_reset()
129 s->regs[0x43] = 0x05F40121; in highbank_regs_reset()
[all …]
/openbmc/linux/drivers/edac/
H A Dhighbank_mc_edac.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
57 struct hb_mc_drvdata *drvdata = mci->pvt_info; in highbank_mc_err_handler()
61 status = readl(drvdata->mc_int_base + HB_DDR_ECC_INT_STATUS); in highbank_mc_err_handler()
64 err_addr = readl(drvdata->mc_err_base + HB_DDR_ECC_U_ERR_ADDR); in highbank_mc_err_handler()
68 0, 0, -1, in highbank_mc_err_handler()
69 mci->ctl_name, ""); in highbank_mc_err_handler()
72 u32 syndrome = readl(drvdata->mc_err_base + HB_DDR_ECC_C_ERR_STAT); in highbank_mc_err_handler()
74 err_addr = readl(drvdata->mc_err_base + HB_DDR_ECC_C_ERR_ADDR); in highbank_mc_err_handler()
78 0, 0, -1, in highbank_mc_err_handler()
[all …]

12