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Searched full:clk_peri_pwm7 (Results 1 – 15 of 15) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dmediatek,mt2712-pwm.yaml89 <&pericfg CLK_PERI_PWM6>, <&pericfg CLK_PERI_PWM7>;
/openbmc/linux/include/dt-bindings/clock/
H A Dmt8135-clk.h162 #define CLK_PERI_PWM7 24 macro
H A Dmediatek,mt6795-clk.h183 #define CLK_PERI_PWM7 8 macro
H A Dmt8173-clk.h202 #define CLK_PERI_PWM7 9 macro
H A Dmt2712-clk.h248 #define CLK_PERI_PWM7 9 macro
H A Dmt2701-clk.h230 #define CLK_PERI_PWM7 9 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8173-pericfg.c59 GATE_PERI0(CLK_PERI_PWM7, "peri_pwm7", "axi_sel", 8),
H A Dclk-mt6795-pericfg.c48 GATE_PERI(CLK_PERI_PWM7, "peri_pwm7", "axi_sel", 8),
H A Dclk-mt8135.c473 GATE_PERI0(CLK_PERI_PWM7, "pwm7_ck", "axi_sel", 8),
H A Dclk-mt2712.c894 GATE_PERI0(CLK_PERI_PWM7, "per_pwm7", "pwm_sel", 9),
H A Dclk-mt2701.c847 GATE_PERI0(CLK_PERI_PWM7, "pwm7_ck", "axisel_d4", 8),
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h223 #define CLK_PERI_PWM7 8 macro
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c655 GATE_PERI0(CLK_PERI_PWM7, CLK_TOP_AXISEL_D4, 8),
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi573 <&pericfg CLK_PERI_PWM7>;
H A Dmt2712e.dtsi491 <&pericfg CLK_PERI_PWM7>;