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/openbmc/linux/drivers/iio/light/
H A Drohm-bu27034.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * https://fscdn.rohm.com/en/products/databook/datasheet/ic/sensor/light/bu27034nuc-e.pdf
21 #include <linux/iio/iio-gts-helper.h>
29 #define BU27034_MASK_MEAS_MODE GENMASK(2, 0)
34 #define BU27034_MASK_D2_GAIN_LO GENMASK(2, 0)
55 * inevitable even if the sensor clock would be perfectly phase-locked to CPU
56 * clock - which we can't say is the case.
59 * risk of losing a sample because things can in a rainy-day scenario be
68 * Other option that was pointed to me would be always sleeping 1/2 of the
72 * Downside is that the time-stamps would be very inaccurate as the wake-up
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H A Dapds9300.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * apds9300.c - IIO driver for Avago APDS9300 ambient light sensor
57 /* Calculated values 1000 * (CH1/CH0)^1.4 for CH1/CH0 from 0 to 0.52 */
59 0, 2, 4, 7, 11, 15, 19, 24, 29, 34, 40, 45, 51, 57, 64, 70, 77, 84, 91,
65 static unsigned long apds9300_calculate_lux(u16 ch0, u16 ch1) in apds9300_calculate_lux() argument
70 if (ch0 == 0) in apds9300_calculate_lux()
73 tmp = DIV_ROUND_UP(ch1 * 100, ch0); in apds9300_calculate_lux()
75 lux = 3150 * ch0 - (unsigned long)DIV_ROUND_UP_ULL(ch0 in apds9300_calculate_lux()
78 lux = 2290 * ch0 - 2910 * ch1; in apds9300_calculate_lux()
80 lux = 1570 * ch0 - 1800 * ch1; in apds9300_calculate_lux()
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H A Dtsl2583.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2016-2017 Brian Masney <masneyb@onstation.org>
61 /* Per-device data */
70 unsigned int ch0; member
108 s16 ch0; member
113 /* Index = (0 - 3) Used to validate the gain selection index */
131 chip->als_settings.als_time = 100; in tsl2583_defaults()
137 chip->als_settings.als_gain = 0; in tsl2583_defaults()
140 chip->als_settings.als_gain_trim = 1000; in tsl2583_defaults()
143 chip->als_settings.als_cal_target = 130; in tsl2583_defaults()
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/openbmc/u-boot/board/renesas/sh7757lcr/
H A DREADME.sh7757lcr10 - SH7757 (SH-4A)
11 - DDR3-SDRAM 256MB (with ECC)
12 - SPI ROM 8MB
13 - 2D Graphic controller
14 - Ethernet controller
15 - eMMC 2GB
23 - make sh7785lcr_config
31 - sh_g200
32 - write_mac
41 2. write_mac
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/openbmc/linux/drivers/gpu/drm/i915/soc/
H A Dintel_dram.c1 // SPDX-License-Identifier: MIT
50 tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG); in pnv_detect_mem_freq()
54 dev_priv->fsb_freq = 533; /* 133*4 */ in pnv_detect_mem_freq()
57 dev_priv->fsb_freq = 800; /* 200*4 */ in pnv_detect_mem_freq()
60 dev_priv->fsb_freq = 667; /* 167*4 */ in pnv_detect_mem_freq()
63 dev_priv->fsb_freq = 400; /* 100*4 */ in pnv_detect_mem_freq()
69 dev_priv->mem_freq = 533; in pnv_detect_mem_freq()
72 dev_priv->mem_freq = 667; in pnv_detect_mem_freq()
75 dev_priv->mem_freq = 800; in pnv_detect_mem_freq()
80 tmp = intel_uncore_read(&dev_priv->uncore, CSHRDDR3CTL); in pnv_detect_mem_freq()
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra186-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
16 handles memory requests for 40-bit virtual addresses from internal clients
27 pattern: "^memory-controller@[0-9a-f]+$"
31 - enum:
32 - nvidia,tegra186-mc
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/openbmc/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-dai-tdm.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "mt8183-afe-clk.h"
11 #include "mt8183-afe-common.h"
12 #include "mt8183-interconnection.h"
13 #include "mt8183-reg.h"
44 TDM_WLEN_32_BIT = 2,
50 TDM_CHANNEL_BCK_32 = 2,
56 TDM_CHANNEL_NUM_8 = 2,
92 return snd_pcm_format_physical_width(format) - 1; in get_tdm_lrck_width()
99 case 2: in get_tdm_ch()
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/openbmc/u-boot/arch/arm/mach-uniphier/
H A Dmemconf.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2011-2015 Panasonic Corporation
13 #include "sg-regs.h"
22 /* set up ch0 */ in __uniphier_memconf_init()
23 switch (bd->dram_ch[0].width) { in __uniphier_memconf_init()
26 size_per_word = bd->dram_ch[0].size; in __uniphier_memconf_init()
30 size_per_word = bd->dram_ch[0].size >> 1; in __uniphier_memconf_init()
33 pr_err("error: unsupported DRAM ch0 width\n"); in __uniphier_memconf_init()
34 return -EINVAL; in __uniphier_memconf_init()
54 pr_err("error: unsupported DRAM ch0 size\n"); in __uniphier_memconf_init()
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H A Ddram_init.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2012-2015 Panasonic Corporation
4 * Copyright (C) 2015-2017 Socionext Inc.
15 #include "sg-regs.h"
16 #include "soc-info.h"
84 return -EINVAL; in uniphier_memconf_decode()
89 /* set up ch0 */ in uniphier_memconf_decode()
109 pr_err("error: invalid value is set to MEMCONF ch0 size\n"); in uniphier_memconf_decode()
110 return -EINVAL; in uniphier_memconf_decode()
114 size *= 2; in uniphier_memconf_decode()
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H A Dsc-regs.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Copyright (C) 2011-2015 Panasonic Corporation
6 * Copyright (C) 2015-2016 Socionext Inc.
49 #define SC_RSTCTRL_NRST_NAND (0x1 << 2)
62 #define SC_RSTCTRL4_NRST_UMCA0 (0x1 << 8) /* UMC ch0 standby */
65 #define SC_RSTCTRL4_NRST_UMC30 (0x1 << 4) /* UMC ch0 */
78 #define SC_CLKCTRL_CEN_NAND (0x1 << 2)
85 #define SC_CLKCTRL4_CEN_UMC2 (0x1 << 2) /* UMC ch2 */
87 #define SC_CLKCTRL4_CEN_UMC0 (0x1 << 0) /* UMC ch0 */
/openbmc/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-dai-tdm.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "mt8192-afe-clk.h"
12 #include "mt8192-afe-common.h"
13 #include "mt8192-afe-gpio.h"
14 #include "mt8192-interconnection.h"
32 TDM_OUT_DSP_B = 2,
47 TDM_WLEN_32_BIT = 2,
53 TDM_CHANNEL_BCK_32 = 2,
59 TDM_CHANNEL_NUM_8 = 2,
84 return snd_pcm_format_physical_width(format) - 1; in get_tdm_lrck_width()
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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
24 - const: allwinner,sun5i-a13-tcon
25 - const: allwinner,sun6i-a31-tcon
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/openbmc/u-boot/arch/arm/dts/
H A Dstih410-clock.dtsi5 * it under the terms of the GNU General Public License version 2 as
8 #include <dt-bindings/clock/stih410-clks.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 compatible = "st,stih410-clk", "simple-bus";
20 clk_sysin: clk-sysin {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
23 clock-frequency = <30000000>;
24 clock-output-names = "CLK_SYSIN";
[all …]
H A Dstih407-clock.dtsi5 * it under the terms of the GNU General Public License version 2 as
8 #include <dt-bindings/clock/stih407-clks.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
18 clk_sysin: clk-sysin {
19 #clock-cells = <0>;
20 compatible = "fixed-clock";
21 clock-frequency = <30000000>;
27 arm_periph_clk: clk-m-a9-periphs {
28 #clock-cells = <0>;
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/openbmc/u-boot/doc/
H A DREADME.sh7753evb10 - SH7753 (SH-4A)
11 - DDR3-SDRAM 512MB
12 - SPI ROM 8MB
13 - Gigabit Ethernet controllers
14 - eMMC 4GB
22 - make sh7753evb_config
30 - write_mac
39 write_mac [GETHERC ch0] [GETHERC ch1]
47 Usage 2) Show current data
53 GETHERC ch0 = 74:90:50:00:33:9e
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H A DREADME.sh7752evb10 - SH7752 (SH-4A)
11 - DDR3-SDRAM 512MB
12 - SPI ROM 8MB
13 - Gigabit Ethernet controllers
14 - eMMC 4GB
22 - make sh7752evb_config
30 - write_mac
39 write_mac [GETHERC ch0] [GETHERC ch1]
47 Usage 2) Show current data
53 GETHERC ch0 = 74:90:50:00:33:9e
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/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Drenesas,usb-dmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,usb-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
13 - $ref: dma-controller.yaml#
18 - enum:
19 - renesas,r8a7742-usb-dmac # RZ/G1H
20 - renesas,r8a7743-usb-dmac # RZ/G1M
21 - renesas,r8a7744-usb-dmac # RZ/G1N
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H A Drenesas,rz-dmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 - $ref: dma-controller.yaml#
18 - enum:
19 - renesas,r9a07g043-dmac # RZ/G2UL
20 - renesas,r9a07g044-dmac # RZ/G2{L,LC}
21 - renesas,r9a07g054-dmac # RZ/V2L
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/openbmc/linux/drivers/misc/
H A Dtsl2550.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * tsl2550.c - Linux kernel modules for ambient light sensor
44 static const u8 TSL2550_MODE_RANGE[2] = {
58 data->operating_mode = mode; in tsl2550_set_operating_mode()
74 tsl2550_set_operating_mode(client, data->operating_mode); in tsl2550_set_power_state()
77 data->power_state = state; in tsl2550_set_power_state()
90 return -EAGAIN; in tsl2550_get_adc_value()
121 0, 1, 2, 3, 4, 5, 6, 7,
141 * pages 2, 3.
143 static int tsl2550_calculate_lux(u8 ch0, u8 ch1) in tsl2550_calculate_lux() argument
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/openbmc/linux/include/linux/usb/
H A Dr8a66597.h1 // SPDX-License-Identifier: GPL-2.0
28 unsigned xtal:2;
124 #define XTAL 0xC000 /* b15-14: Crystal selection */
133 #define HSE 0x0080 /* b7: Hi-speed enable */
135 #define DRPD 0x0020 /* b5: D+/- pull down control */
140 #define OVCBIT 0x8000 /* b15-14: Over-current bit */
141 #define OVCMON 0xC000 /* b15-14: Over-current monitor */
143 #define IDMON 0x0004 /* b3: ID-pin monitor */
144 #define LNST 0x0003 /* b1-0: D+, D- line status */
146 #define FS_KSTS 0x0002 /* Full-Speed K State */
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/openbmc/linux/Documentation/devicetree/bindings/input/
H A Diqs62x-keys.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/iqs62x-keys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 - $ref: input.yaml#
16 The Azoteq IQS620A, IQS621, IQS622, IQS624 and IQS625 multi-function sensors
17 feature a variety of self-capacitive, mutual-inductive and Hall-effect sens-
23 further details and examples. Sensor hardware configuration (self-capacitive
24 vs. mutual-inductive, etc.) is selected based on the device's firmware.
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/openbmc/linux/Documentation/firmware-guide/acpi/
H A Dintel-pmc-mux.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Intel North Mux-Agent
10 North Mux-Agent is a function of the Intel PMC firmware that is supported on
13 platforms that allow the mux-agent to be configured from the operating system
16 The North Mux-Agent (aka. Intel PMC Mux Control, or just mux-agent) driver
18 (drivers/platform/x86/intel_scu_ipc.c). The driver registers with the USB Type-C
19 Mux Class which allows the USB Type-C Controller and Interface drivers to
28 -------
30 For every USB Type-C connector under the mux-agent control on the system, there
31 is a separate child node under the PMC mux-agent device node. Those nodes do not
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/openbmc/qemu/hw/timer/
H A Drenesas_cmt.c2 * Renesas 16bit Compare-match timer
9 * SPDX-License-Identifier: GPL-2.0-or-later
13 * version 2 or later, as published by the Free Software Foundation.
28 #include "hw/qdev-properties.h"
33 * +0 CMSTR - common control
34 * +2 CMCR - ch0
35 * +4 CMCNT - ch0
36 * +6 CMCOR - ch0
37 * +8 CMCR - ch1
38 * +10 CMCNT - ch1
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/openbmc/linux/sound/oss/dmasound/
H A Ddmasound_paula.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * - added versioning
12 * - put in and populated the hardware_afmts field.
13 * [0.2] - put in SNDCTL_DSP_GETCAPS value.
14 * [0.3] - put in constraint on state buffer usage.
15 * [0.4] - put in default hard/soft settings
65 * Helper pointers for 16(14)-bit sound
92 * Heartbeat interferes with sound since the 7 kHz low-pass filter and the
167 return -EFAULT; in ami_ct_s8()
172 used = count*2; in ami_ct_s8()
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/openbmc/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Duncore-memory.json3 "BriefDescription": "Cycles - at UCLK",
186 "BriefDescription": "Multi-socket cacheline Directory lookups (any state found)",
195 "BriefDescription": "Multi-socket cacheline Directory lookups (cacheline found in A state)",
204 "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in I state)",
213 "BriefDescription": "Multi-socket cacheline Directory lookup (cacheline found in S state)",
286 "BriefDescription": "Multi-socket cacheline Directory update from A to I",
294 "BriefDescription": "Multi-socket cacheline Directory update from A to S",
302 "BriefDescription": "Multi-socket cacheline Directory update from/to Any state",
310 "BriefDescription": "Multi-socket cacheline Directory Updates",
316 …"PublicDescription": "Counts 1lm or 2lm hit data returns that would result in directory update fr…
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