xref: /openbmc/linux/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1f5a98bfeSMaxime Ripard# SPDX-License-Identifier: GPL-2.0
2f5a98bfeSMaxime Ripard%YAML 1.2
3f5a98bfeSMaxime Ripard---
4f5a98bfeSMaxime Ripard$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5f5a98bfeSMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml#
6f5a98bfeSMaxime Ripard
7*dd3cb467SAndrew Lunntitle: Allwinner A10 Timings Controller (TCON)
8f5a98bfeSMaxime Ripard
9f5a98bfeSMaxime Ripardmaintainers:
10f5a98bfeSMaxime Ripard  - Chen-Yu Tsai <wens@csie.org>
11f5a98bfeSMaxime Ripard  - Maxime Ripard <mripard@kernel.org>
12f5a98bfeSMaxime Ripard
13f5a98bfeSMaxime Riparddescription: |
14f5a98bfeSMaxime Ripard  The TCON acts as a timing controller for RGB, LVDS and TV
15f5a98bfeSMaxime Ripard  interfaces.
16f5a98bfeSMaxime Ripard
17f5a98bfeSMaxime Ripardproperties:
18f5a98bfeSMaxime Ripard  "#clock-cells":
19f5a98bfeSMaxime Ripard    const: 0
20f5a98bfeSMaxime Ripard
21f5a98bfeSMaxime Ripard  compatible:
22f5a98bfeSMaxime Ripard    oneOf:
23f5a98bfeSMaxime Ripard      - const: allwinner,sun4i-a10-tcon
24f5a98bfeSMaxime Ripard      - const: allwinner,sun5i-a13-tcon
25f5a98bfeSMaxime Ripard      - const: allwinner,sun6i-a31-tcon
26f5a98bfeSMaxime Ripard      - const: allwinner,sun6i-a31s-tcon
27f5a98bfeSMaxime Ripard      - const: allwinner,sun7i-a20-tcon
28f5a98bfeSMaxime Ripard      - const: allwinner,sun8i-a23-tcon
29f5a98bfeSMaxime Ripard      - const: allwinner,sun8i-a33-tcon
30f5a98bfeSMaxime Ripard      - const: allwinner,sun8i-a83t-tcon-lcd
31f5a98bfeSMaxime Ripard      - const: allwinner,sun8i-a83t-tcon-tv
32f5a98bfeSMaxime Ripard      - const: allwinner,sun8i-r40-tcon-tv
33f5a98bfeSMaxime Ripard      - const: allwinner,sun8i-v3s-tcon
34f5a98bfeSMaxime Ripard      - const: allwinner,sun9i-a80-tcon-lcd
35f5a98bfeSMaxime Ripard      - const: allwinner,sun9i-a80-tcon-tv
36ae5a5d26SSamuel Holland      - const: allwinner,sun20i-d1-tcon-lcd
37ae5a5d26SSamuel Holland      - const: allwinner,sun20i-d1-tcon-tv
38f5a98bfeSMaxime Ripard
39f5a98bfeSMaxime Ripard      - items:
40f5a98bfeSMaxime Ripard          - enum:
41612e31e0SAndrey Lebedev              - allwinner,sun7i-a20-tcon0
42612e31e0SAndrey Lebedev              - allwinner,sun7i-a20-tcon1
43612e31e0SAndrey Lebedev          - const: allwinner,sun7i-a20-tcon
44612e31e0SAndrey Lebedev
45612e31e0SAndrey Lebedev      - items:
46612e31e0SAndrey Lebedev          - enum:
47f5a98bfeSMaxime Ripard              - allwinner,sun50i-a64-tcon-lcd
48f5a98bfeSMaxime Ripard          - const: allwinner,sun8i-a83t-tcon-lcd
49f5a98bfeSMaxime Ripard
50f5a98bfeSMaxime Ripard      - items:
51f5a98bfeSMaxime Ripard          - enum:
52f5a98bfeSMaxime Ripard              - allwinner,sun8i-h3-tcon-tv
53f5a98bfeSMaxime Ripard              - allwinner,sun50i-a64-tcon-tv
54f5a98bfeSMaxime Ripard          - const: allwinner,sun8i-a83t-tcon-tv
55f5a98bfeSMaxime Ripard
56b50f4f94SMaxime Ripard      - items:
57b50f4f94SMaxime Ripard          - enum:
58b50f4f94SMaxime Ripard              - allwinner,sun50i-h6-tcon-tv
59b50f4f94SMaxime Ripard          - const: allwinner,sun8i-r40-tcon-tv
60b50f4f94SMaxime Ripard
61f5a98bfeSMaxime Ripard  reg:
62f5a98bfeSMaxime Ripard    maxItems: 1
63f5a98bfeSMaxime Ripard
64f5a98bfeSMaxime Ripard  interrupts:
65f5a98bfeSMaxime Ripard    maxItems: 1
66f5a98bfeSMaxime Ripard
67f5a98bfeSMaxime Ripard  clocks:
68f5a98bfeSMaxime Ripard    minItems: 1
69f5a98bfeSMaxime Ripard    maxItems: 4
70f5a98bfeSMaxime Ripard
71f5a98bfeSMaxime Ripard  clock-names:
72f5a98bfeSMaxime Ripard    minItems: 1
73f5a98bfeSMaxime Ripard    maxItems: 4
74f5a98bfeSMaxime Ripard
75f5a98bfeSMaxime Ripard  clock-output-names:
76f5a98bfeSMaxime Ripard    description:
77f5a98bfeSMaxime Ripard      Name of the LCD pixel clock created.
783d21a460SRob Herring    maxItems: 1
79f5a98bfeSMaxime Ripard
80f5a98bfeSMaxime Ripard  dmas:
81f5a98bfeSMaxime Ripard    maxItems: 1
82f5a98bfeSMaxime Ripard
83f5a98bfeSMaxime Ripard  resets:
84f5a98bfeSMaxime Ripard    anyOf:
85f5a98bfeSMaxime Ripard      - items:
86f5a98bfeSMaxime Ripard          - description: TCON Reset Line
87f5a98bfeSMaxime Ripard
88f5a98bfeSMaxime Ripard      - items:
89f5a98bfeSMaxime Ripard          - description: TCON Reset Line
90f5a98bfeSMaxime Ripard          - description: TCON LVDS Reset Line
91f5a98bfeSMaxime Ripard
92f5a98bfeSMaxime Ripard      - items:
93f5a98bfeSMaxime Ripard          - description: TCON Reset Line
94f5a98bfeSMaxime Ripard          - description: TCON eDP Reset Line
95f5a98bfeSMaxime Ripard
96f5a98bfeSMaxime Ripard      - items:
97f5a98bfeSMaxime Ripard          - description: TCON Reset Line
98f5a98bfeSMaxime Ripard          - description: TCON eDP Reset Line
99f5a98bfeSMaxime Ripard          - description: TCON LVDS Reset Line
100f5a98bfeSMaxime Ripard
101f5a98bfeSMaxime Ripard  reset-names:
102f5a98bfeSMaxime Ripard    oneOf:
103f5a98bfeSMaxime Ripard      - const: lcd
104f5a98bfeSMaxime Ripard
105f5a98bfeSMaxime Ripard      - items:
106f5a98bfeSMaxime Ripard          - const: lcd
107f5a98bfeSMaxime Ripard          - const: lvds
108f5a98bfeSMaxime Ripard
109f5a98bfeSMaxime Ripard      - items:
110f5a98bfeSMaxime Ripard          - const: lcd
111f5a98bfeSMaxime Ripard          - const: edp
112f5a98bfeSMaxime Ripard
113f5a98bfeSMaxime Ripard      - items:
114f5a98bfeSMaxime Ripard          - const: lcd
115f5a98bfeSMaxime Ripard          - const: edp
116f5a98bfeSMaxime Ripard          - const: lvds
117f5a98bfeSMaxime Ripard
118f5a98bfeSMaxime Ripard  ports:
119b6755423SRob Herring    $ref: /schemas/graph.yaml#/properties/ports
120f5a98bfeSMaxime Ripard
121f5a98bfeSMaxime Ripard    properties:
122f5a98bfeSMaxime Ripard      port@0:
123b6755423SRob Herring        $ref: /schemas/graph.yaml#/properties/port
124f5a98bfeSMaxime Ripard        description: |
125f5a98bfeSMaxime Ripard          Input endpoints of the controller.
126f5a98bfeSMaxime Ripard
127f5a98bfeSMaxime Ripard      port@1:
128b6755423SRob Herring        $ref: /schemas/graph.yaml#/$defs/port-base
129b6755423SRob Herring        unevaluatedProperties: false
130f5a98bfeSMaxime Ripard        description: |
131f5a98bfeSMaxime Ripard          Output endpoints of the controller.
132f5a98bfeSMaxime Ripard
133f5a98bfeSMaxime Ripard        patternProperties:
134f5a98bfeSMaxime Ripard          "^endpoint(@[0-9])$":
135b6755423SRob Herring            $ref: /schemas/graph.yaml#/$defs/endpoint-base
136b6755423SRob Herring            unevaluatedProperties: false
137f5a98bfeSMaxime Ripard
138f5a98bfeSMaxime Ripard            properties:
139f5a98bfeSMaxime Ripard              allwinner,tcon-channel:
140f5a98bfeSMaxime Ripard                $ref: /schemas/types.yaml#/definitions/uint32
141f5a98bfeSMaxime Ripard                description: |
142f5a98bfeSMaxime Ripard                  TCON can have 1 or 2 channels, usually with the
143f5a98bfeSMaxime Ripard                  first channel being used for the panels interfaces
144f5a98bfeSMaxime Ripard                  (RGB, LVDS, etc.), and the second being used for the
145f5a98bfeSMaxime Ripard                  outputs that require another controller (TV Encoder,
146f5a98bfeSMaxime Ripard                  HDMI, etc.).
147f5a98bfeSMaxime Ripard
148f5a98bfeSMaxime Ripard                  If that property is present, specifies the TCON
149f5a98bfeSMaxime Ripard                  channel the endpoint is associated to. If that
150f5a98bfeSMaxime Ripard                  property is not present, the endpoint number will be
151f5a98bfeSMaxime Ripard                  used as the channel number.
152f5a98bfeSMaxime Ripard
153f5a98bfeSMaxime Ripard    required:
154f5a98bfeSMaxime Ripard      - port@0
155f5a98bfeSMaxime Ripard      - port@1
156f5a98bfeSMaxime Ripard
157f5a98bfeSMaxime Ripardrequired:
158f5a98bfeSMaxime Ripard  - compatible
159f5a98bfeSMaxime Ripard  - reg
160f5a98bfeSMaxime Ripard  - interrupts
161f5a98bfeSMaxime Ripard  - clocks
162f5a98bfeSMaxime Ripard  - clock-names
163f5a98bfeSMaxime Ripard  - resets
164f5a98bfeSMaxime Ripard  - ports
165f5a98bfeSMaxime Ripard
166f5a98bfeSMaxime RipardadditionalProperties: false
167f5a98bfeSMaxime Ripard
168f5a98bfeSMaxime RipardallOf:
169f5a98bfeSMaxime Ripard  - if:
170f5a98bfeSMaxime Ripard      properties:
171f5a98bfeSMaxime Ripard        compatible:
172f5a98bfeSMaxime Ripard          contains:
173f5a98bfeSMaxime Ripard            enum:
174f5a98bfeSMaxime Ripard              - allwinner,sun4i-a10-tcon
175f5a98bfeSMaxime Ripard              - allwinner,sun5i-a13-tcon
176f5a98bfeSMaxime Ripard              - allwinner,sun7i-a20-tcon
177f5a98bfeSMaxime Ripard
178f5a98bfeSMaxime Ripard    then:
179f5a98bfeSMaxime Ripard      properties:
180f5a98bfeSMaxime Ripard        clocks:
181f5a98bfeSMaxime Ripard          minItems: 3
182f5a98bfeSMaxime Ripard
183f5a98bfeSMaxime Ripard        clock-names:
184f5a98bfeSMaxime Ripard          items:
185f5a98bfeSMaxime Ripard            - const: ahb
186f5a98bfeSMaxime Ripard            - const: tcon-ch0
187f5a98bfeSMaxime Ripard            - const: tcon-ch1
188f5a98bfeSMaxime Ripard
189f5a98bfeSMaxime Ripard  - if:
190f5a98bfeSMaxime Ripard      properties:
191f5a98bfeSMaxime Ripard        compatible:
192f5a98bfeSMaxime Ripard          contains:
193f5a98bfeSMaxime Ripard            enum:
194f5a98bfeSMaxime Ripard              - allwinner,sun6i-a31-tcon
195f5a98bfeSMaxime Ripard              - allwinner,sun6i-a31s-tcon
196f5a98bfeSMaxime Ripard
197f5a98bfeSMaxime Ripard    then:
198f5a98bfeSMaxime Ripard      properties:
199f5a98bfeSMaxime Ripard        clocks:
200f5a98bfeSMaxime Ripard          minItems: 4
201f5a98bfeSMaxime Ripard
202f5a98bfeSMaxime Ripard        clock-names:
203f5a98bfeSMaxime Ripard          items:
204f5a98bfeSMaxime Ripard            - const: ahb
205f5a98bfeSMaxime Ripard            - const: tcon-ch0
206f5a98bfeSMaxime Ripard            - const: tcon-ch1
207f5a98bfeSMaxime Ripard            - const: lvds-alt
208f5a98bfeSMaxime Ripard
209f5a98bfeSMaxime Ripard  - if:
210f5a98bfeSMaxime Ripard      properties:
211f5a98bfeSMaxime Ripard        compatible:
212f5a98bfeSMaxime Ripard          contains:
213f5a98bfeSMaxime Ripard            enum:
214f5a98bfeSMaxime Ripard              - allwinner,sun8i-a23-tcon
215f5a98bfeSMaxime Ripard              - allwinner,sun8i-a33-tcon
216f5a98bfeSMaxime Ripard
217f5a98bfeSMaxime Ripard    then:
218f5a98bfeSMaxime Ripard      properties:
219f5a98bfeSMaxime Ripard        clocks:
220f5a98bfeSMaxime Ripard          minItems: 3
221f5a98bfeSMaxime Ripard
222f5a98bfeSMaxime Ripard        clock-names:
223f5a98bfeSMaxime Ripard          items:
224f5a98bfeSMaxime Ripard            - const: ahb
225f5a98bfeSMaxime Ripard            - const: tcon-ch0
226f5a98bfeSMaxime Ripard            - const: lvds-alt
227f5a98bfeSMaxime Ripard
228f5a98bfeSMaxime Ripard  - if:
229f5a98bfeSMaxime Ripard      properties:
230f5a98bfeSMaxime Ripard        compatible:
231f5a98bfeSMaxime Ripard          contains:
232f5a98bfeSMaxime Ripard            enum:
233f5a98bfeSMaxime Ripard              - allwinner,sun8i-a83t-tcon-lcd
234f5a98bfeSMaxime Ripard              - allwinner,sun8i-v3s-tcon
235f5a98bfeSMaxime Ripard              - allwinner,sun9i-a80-tcon-lcd
2362a29f80eSSamuel Holland              - allwinner,sun20i-d1-tcon-lcd
237f5a98bfeSMaxime Ripard
238f5a98bfeSMaxime Ripard    then:
239f5a98bfeSMaxime Ripard      properties:
240f5a98bfeSMaxime Ripard        clocks:
241f5a98bfeSMaxime Ripard          minItems: 2
242f5a98bfeSMaxime Ripard
243f5a98bfeSMaxime Ripard        clock-names:
244f5a98bfeSMaxime Ripard          items:
245f5a98bfeSMaxime Ripard            - const: ahb
246f5a98bfeSMaxime Ripard            - const: tcon-ch0
247f5a98bfeSMaxime Ripard
248f5a98bfeSMaxime Ripard  - if:
249f5a98bfeSMaxime Ripard      properties:
250f5a98bfeSMaxime Ripard        compatible:
251f5a98bfeSMaxime Ripard          contains:
252f5a98bfeSMaxime Ripard            enum:
253f5a98bfeSMaxime Ripard              - allwinner,sun8i-a83t-tcon-tv
254f5a98bfeSMaxime Ripard              - allwinner,sun8i-r40-tcon-tv
255f5a98bfeSMaxime Ripard              - allwinner,sun9i-a80-tcon-tv
2562a29f80eSSamuel Holland              - allwinner,sun20i-d1-tcon-tv
257f5a98bfeSMaxime Ripard
258f5a98bfeSMaxime Ripard    then:
259f5a98bfeSMaxime Ripard      properties:
260f5a98bfeSMaxime Ripard        clocks:
261f5a98bfeSMaxime Ripard          minItems: 2
262f5a98bfeSMaxime Ripard
263f5a98bfeSMaxime Ripard        clock-names:
264f5a98bfeSMaxime Ripard          items:
265f5a98bfeSMaxime Ripard            - const: ahb
266f5a98bfeSMaxime Ripard            - const: tcon-ch1
267f5a98bfeSMaxime Ripard
268f5a98bfeSMaxime Ripard  - if:
269f5a98bfeSMaxime Ripard      properties:
270f5a98bfeSMaxime Ripard        compatible:
271f5a98bfeSMaxime Ripard          contains:
272f5a98bfeSMaxime Ripard            enum:
273f5a98bfeSMaxime Ripard              - allwinner,sun5i-a13-tcon
274f5a98bfeSMaxime Ripard              - allwinner,sun6i-a31-tcon
275f5a98bfeSMaxime Ripard              - allwinner,sun6i-a31s-tcon
276f5a98bfeSMaxime Ripard              - allwinner,sun7i-a20-tcon
277f5a98bfeSMaxime Ripard              - allwinner,sun8i-a23-tcon
278f5a98bfeSMaxime Ripard              - allwinner,sun8i-a33-tcon
279f5a98bfeSMaxime Ripard              - allwinner,sun8i-v3s-tcon
280f5a98bfeSMaxime Ripard              - allwinner,sun9i-a80-tcon-lcd
281f5a98bfeSMaxime Ripard              - allwinner,sun4i-a10-tcon
282f5a98bfeSMaxime Ripard              - allwinner,sun8i-a83t-tcon-lcd
2832a29f80eSSamuel Holland              - allwinner,sun20i-d1-tcon-lcd
284f5a98bfeSMaxime Ripard
285f5a98bfeSMaxime Ripard    then:
286f5a98bfeSMaxime Ripard      required:
287f5a98bfeSMaxime Ripard        - "#clock-cells"
288f5a98bfeSMaxime Ripard        - clock-output-names
289f5a98bfeSMaxime Ripard
290f5a98bfeSMaxime Ripard  - if:
291f5a98bfeSMaxime Ripard      properties:
292f5a98bfeSMaxime Ripard        compatible:
293f5a98bfeSMaxime Ripard          contains:
294f5a98bfeSMaxime Ripard            enum:
295f5a98bfeSMaxime Ripard              - allwinner,sun6i-a31-tcon
296f5a98bfeSMaxime Ripard              - allwinner,sun6i-a31s-tcon
297f5a98bfeSMaxime Ripard              - allwinner,sun8i-a23-tcon
298f5a98bfeSMaxime Ripard              - allwinner,sun8i-a33-tcon
299f5a98bfeSMaxime Ripard              - allwinner,sun8i-a83t-tcon-lcd
3002a29f80eSSamuel Holland              - allwinner,sun20i-d1-tcon-lcd
301f5a98bfeSMaxime Ripard
302f5a98bfeSMaxime Ripard    then:
303f5a98bfeSMaxime Ripard      properties:
304f5a98bfeSMaxime Ripard        resets:
305f5a98bfeSMaxime Ripard          minItems: 2
306f5a98bfeSMaxime Ripard
307f5a98bfeSMaxime Ripard        reset-names:
308f5a98bfeSMaxime Ripard          items:
309f5a98bfeSMaxime Ripard            - const: lcd
310f5a98bfeSMaxime Ripard            - const: lvds
311f5a98bfeSMaxime Ripard
312f5a98bfeSMaxime Ripard  - if:
313f5a98bfeSMaxime Ripard      properties:
314f5a98bfeSMaxime Ripard        compatible:
315f5a98bfeSMaxime Ripard          contains:
316f5a98bfeSMaxime Ripard            enum:
317f5a98bfeSMaxime Ripard              - allwinner,sun9i-a80-tcon-lcd
318f5a98bfeSMaxime Ripard
319f5a98bfeSMaxime Ripard    then:
320f5a98bfeSMaxime Ripard      properties:
321f5a98bfeSMaxime Ripard        resets:
322f5a98bfeSMaxime Ripard          minItems: 3
323f5a98bfeSMaxime Ripard
324f5a98bfeSMaxime Ripard        reset-names:
325f5a98bfeSMaxime Ripard          items:
326f5a98bfeSMaxime Ripard            - const: lcd
327f5a98bfeSMaxime Ripard            - const: edp
328f5a98bfeSMaxime Ripard            - const: lvds
329f5a98bfeSMaxime Ripard
330f5a98bfeSMaxime Ripard  - if:
331f5a98bfeSMaxime Ripard      properties:
332f5a98bfeSMaxime Ripard        compatible:
333f5a98bfeSMaxime Ripard          contains:
334f5a98bfeSMaxime Ripard            enum:
335f5a98bfeSMaxime Ripard              - allwinner,sun9i-a80-tcon-tv
336f5a98bfeSMaxime Ripard
337f5a98bfeSMaxime Ripard    then:
338f5a98bfeSMaxime Ripard      properties:
339f5a98bfeSMaxime Ripard        resets:
340f5a98bfeSMaxime Ripard          minItems: 2
341f5a98bfeSMaxime Ripard
342f5a98bfeSMaxime Ripard        reset-names:
343f5a98bfeSMaxime Ripard          items:
344f5a98bfeSMaxime Ripard            - const: lcd
345f5a98bfeSMaxime Ripard            - const: edp
346f5a98bfeSMaxime Ripard
347f5a98bfeSMaxime Ripard  - if:
348f5a98bfeSMaxime Ripard      properties:
349f5a98bfeSMaxime Ripard        compatible:
350f5a98bfeSMaxime Ripard          contains:
351f5a98bfeSMaxime Ripard            enum:
352f5a98bfeSMaxime Ripard              - allwinner,sun4i-a10-tcon
353f5a98bfeSMaxime Ripard              - allwinner,sun5i-a13-tcon
354f5a98bfeSMaxime Ripard              - allwinner,sun6i-a31-tcon
355f5a98bfeSMaxime Ripard              - allwinner,sun6i-a31s-tcon
356f5a98bfeSMaxime Ripard              - allwinner,sun7i-a20-tcon
357f5a98bfeSMaxime Ripard              - allwinner,sun8i-a23-tcon
358f5a98bfeSMaxime Ripard              - allwinner,sun8i-a33-tcon
359f5a98bfeSMaxime Ripard
360f5a98bfeSMaxime Ripard    then:
361f5a98bfeSMaxime Ripard      required:
362f5a98bfeSMaxime Ripard        - dmas
363f5a98bfeSMaxime Ripard
364f5a98bfeSMaxime Ripardexamples:
365f5a98bfeSMaxime Ripard  - |
366f5a98bfeSMaxime Ripard    #include <dt-bindings/dma/sun4i-a10.h>
367f5a98bfeSMaxime Ripard
368f5a98bfeSMaxime Ripard    /*
369f5a98bfeSMaxime Ripard     * This comes from the clock/sun4i-a10-ccu.h and
370f5a98bfeSMaxime Ripard     * reset/sun4i-a10-ccu.h headers, but we can't include them since
371f5a98bfeSMaxime Ripard     * it would trigger a bunch of warnings for redefinitions of
372f5a98bfeSMaxime Ripard     * symbols with the other example.
373f5a98bfeSMaxime Ripard     */
374f5a98bfeSMaxime Ripard
375f5a98bfeSMaxime Ripard    #define CLK_AHB_LCD0	56
376f5a98bfeSMaxime Ripard    #define CLK_TCON0_CH0	149
377f5a98bfeSMaxime Ripard    #define CLK_TCON0_CH1	155
378f5a98bfeSMaxime Ripard    #define RST_TCON0		11
379f5a98bfeSMaxime Ripard
380f5a98bfeSMaxime Ripard    lcd-controller@1c0c000 {
381f5a98bfeSMaxime Ripard        compatible = "allwinner,sun4i-a10-tcon";
382f5a98bfeSMaxime Ripard        reg = <0x01c0c000 0x1000>;
383f5a98bfeSMaxime Ripard        interrupts = <44>;
384f5a98bfeSMaxime Ripard        resets = <&ccu RST_TCON0>;
385f5a98bfeSMaxime Ripard        reset-names = "lcd";
386f5a98bfeSMaxime Ripard        clocks = <&ccu CLK_AHB_LCD0>,
387f5a98bfeSMaxime Ripard                 <&ccu CLK_TCON0_CH0>,
388f5a98bfeSMaxime Ripard                 <&ccu CLK_TCON0_CH1>;
389f5a98bfeSMaxime Ripard        clock-names = "ahb",
390f5a98bfeSMaxime Ripard                      "tcon-ch0",
391f5a98bfeSMaxime Ripard                      "tcon-ch1";
392f5a98bfeSMaxime Ripard        clock-output-names = "tcon0-pixel-clock";
393f5a98bfeSMaxime Ripard        #clock-cells = <0>;
394f5a98bfeSMaxime Ripard        dmas = <&dma SUN4I_DMA_DEDICATED 14>;
395f5a98bfeSMaxime Ripard
396f5a98bfeSMaxime Ripard        ports {
397f5a98bfeSMaxime Ripard            #address-cells = <1>;
398f5a98bfeSMaxime Ripard            #size-cells = <0>;
399f5a98bfeSMaxime Ripard
400f5a98bfeSMaxime Ripard            port@0 {
401f5a98bfeSMaxime Ripard                #address-cells = <1>;
402f5a98bfeSMaxime Ripard                #size-cells = <0>;
403f5a98bfeSMaxime Ripard                reg = <0>;
404f5a98bfeSMaxime Ripard
405f5a98bfeSMaxime Ripard                endpoint@0 {
406f5a98bfeSMaxime Ripard                    reg = <0>;
407f5a98bfeSMaxime Ripard                    remote-endpoint = <&be0_out_tcon0>;
408f5a98bfeSMaxime Ripard                };
409f5a98bfeSMaxime Ripard
410f5a98bfeSMaxime Ripard                endpoint@1 {
411f5a98bfeSMaxime Ripard                    reg = <1>;
412f5a98bfeSMaxime Ripard                    remote-endpoint = <&be1_out_tcon0>;
413f5a98bfeSMaxime Ripard                };
414f5a98bfeSMaxime Ripard            };
415f5a98bfeSMaxime Ripard
416f5a98bfeSMaxime Ripard            port@1 {
417f5a98bfeSMaxime Ripard                #address-cells = <1>;
418f5a98bfeSMaxime Ripard                #size-cells = <0>;
419f5a98bfeSMaxime Ripard                reg = <1>;
420f5a98bfeSMaxime Ripard
421f5a98bfeSMaxime Ripard                endpoint@1 {
422f5a98bfeSMaxime Ripard                    reg = <1>;
423f5a98bfeSMaxime Ripard                    remote-endpoint = <&hdmi_in_tcon0>;
424f5a98bfeSMaxime Ripard                    allwinner,tcon-channel = <1>;
425f5a98bfeSMaxime Ripard                };
426f5a98bfeSMaxime Ripard            };
427f5a98bfeSMaxime Ripard        };
428f5a98bfeSMaxime Ripard    };
429f5a98bfeSMaxime Ripard
430f5a98bfeSMaxime Ripard    #undef CLK_AHB_LCD0
431f5a98bfeSMaxime Ripard    #undef CLK_TCON0_CH0
432f5a98bfeSMaxime Ripard    #undef CLK_TCON0_CH1
433f5a98bfeSMaxime Ripard    #undef RST_TCON0
434f5a98bfeSMaxime Ripard
435f5a98bfeSMaxime Ripard  - |
436f5a98bfeSMaxime Ripard    #include <dt-bindings/interrupt-controller/arm-gic.h>
437f5a98bfeSMaxime Ripard
438f5a98bfeSMaxime Ripard    /*
439f5a98bfeSMaxime Ripard     * This comes from the clock/sun6i-a31-ccu.h and
440f5a98bfeSMaxime Ripard     * reset/sun6i-a31-ccu.h headers, but we can't include them since
441f5a98bfeSMaxime Ripard     * it would trigger a bunch of warnings for redefinitions of
442f5a98bfeSMaxime Ripard     * symbols with the other example.
443f5a98bfeSMaxime Ripard     */
444f5a98bfeSMaxime Ripard
445f5a98bfeSMaxime Ripard    #define CLK_PLL_MIPI	15
446f5a98bfeSMaxime Ripard    #define CLK_AHB1_LCD0	47
447f5a98bfeSMaxime Ripard    #define CLK_LCD0_CH0	127
448f5a98bfeSMaxime Ripard    #define CLK_LCD0_CH1	129
449f5a98bfeSMaxime Ripard    #define RST_AHB1_LCD0	27
450f5a98bfeSMaxime Ripard    #define RST_AHB1_LVDS	41
451f5a98bfeSMaxime Ripard
452f5a98bfeSMaxime Ripard    lcd-controller@1c0c000 {
453f5a98bfeSMaxime Ripard        compatible = "allwinner,sun6i-a31-tcon";
454f5a98bfeSMaxime Ripard        reg = <0x01c0c000 0x1000>;
455f5a98bfeSMaxime Ripard        interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
456f5a98bfeSMaxime Ripard        dmas = <&dma 11>;
457f5a98bfeSMaxime Ripard        resets = <&ccu RST_AHB1_LCD0>, <&ccu RST_AHB1_LVDS>;
458f5a98bfeSMaxime Ripard        reset-names = "lcd", "lvds";
459f5a98bfeSMaxime Ripard        clocks = <&ccu CLK_AHB1_LCD0>,
460f5a98bfeSMaxime Ripard                 <&ccu CLK_LCD0_CH0>,
461f5a98bfeSMaxime Ripard                 <&ccu CLK_LCD0_CH1>,
462f5a98bfeSMaxime Ripard                 <&ccu CLK_PLL_MIPI>;
463f5a98bfeSMaxime Ripard        clock-names = "ahb",
464f5a98bfeSMaxime Ripard                      "tcon-ch0",
465f5a98bfeSMaxime Ripard                      "tcon-ch1",
466f5a98bfeSMaxime Ripard                      "lvds-alt";
467f5a98bfeSMaxime Ripard        clock-output-names = "tcon0-pixel-clock";
468f5a98bfeSMaxime Ripard        #clock-cells = <0>;
469f5a98bfeSMaxime Ripard
470f5a98bfeSMaxime Ripard        ports {
471f5a98bfeSMaxime Ripard            #address-cells = <1>;
472f5a98bfeSMaxime Ripard            #size-cells = <0>;
473f5a98bfeSMaxime Ripard
474f5a98bfeSMaxime Ripard            port@0 {
475f5a98bfeSMaxime Ripard                #address-cells = <1>;
476f5a98bfeSMaxime Ripard                #size-cells = <0>;
477f5a98bfeSMaxime Ripard                reg = <0>;
478f5a98bfeSMaxime Ripard
479f5a98bfeSMaxime Ripard                endpoint@0 {
480f5a98bfeSMaxime Ripard                    reg = <0>;
481f5a98bfeSMaxime Ripard                    remote-endpoint = <&drc0_out_tcon0>;
482f5a98bfeSMaxime Ripard                };
483f5a98bfeSMaxime Ripard
484f5a98bfeSMaxime Ripard                endpoint@1 {
485f5a98bfeSMaxime Ripard                    reg = <1>;
486f5a98bfeSMaxime Ripard                    remote-endpoint = <&drc1_out_tcon0>;
487f5a98bfeSMaxime Ripard                };
488f5a98bfeSMaxime Ripard            };
489f5a98bfeSMaxime Ripard
490f5a98bfeSMaxime Ripard            port@1 {
491f5a98bfeSMaxime Ripard                #address-cells = <1>;
492f5a98bfeSMaxime Ripard                #size-cells = <0>;
493f5a98bfeSMaxime Ripard                reg = <1>;
494f5a98bfeSMaxime Ripard
495f5a98bfeSMaxime Ripard                endpoint@1 {
496f5a98bfeSMaxime Ripard                    reg = <1>;
497f5a98bfeSMaxime Ripard                    remote-endpoint = <&hdmi_in_tcon0>;
498f5a98bfeSMaxime Ripard                    allwinner,tcon-channel = <1>;
499f5a98bfeSMaxime Ripard                };
500f5a98bfeSMaxime Ripard            };
501f5a98bfeSMaxime Ripard        };
502f5a98bfeSMaxime Ripard    };
503f5a98bfeSMaxime Ripard
504f5a98bfeSMaxime Ripard    #undef CLK_PLL_MIPI
505f5a98bfeSMaxime Ripard    #undef CLK_AHB1_LCD0
506f5a98bfeSMaxime Ripard    #undef CLK_LCD0_CH0
507f5a98bfeSMaxime Ripard    #undef CLK_LCD0_CH1
508f5a98bfeSMaxime Ripard    #undef RST_AHB1_LCD0
509f5a98bfeSMaxime Ripard    #undef RST_AHB1_LVDS
510f5a98bfeSMaxime Ripard
511f5a98bfeSMaxime Ripard  - |
512f5a98bfeSMaxime Ripard    #include <dt-bindings/interrupt-controller/arm-gic.h>
513f5a98bfeSMaxime Ripard
514f5a98bfeSMaxime Ripard    /*
515f5a98bfeSMaxime Ripard     * This comes from the clock/sun9i-a80-ccu.h and
516f5a98bfeSMaxime Ripard     * reset/sun9i-a80-ccu.h headers, but we can't include them since
517f5a98bfeSMaxime Ripard     * it would trigger a bunch of warnings for redefinitions of
518f5a98bfeSMaxime Ripard     * symbols with the other example.
519f5a98bfeSMaxime Ripard     */
520f5a98bfeSMaxime Ripard
521f5a98bfeSMaxime Ripard    #define CLK_BUS_LCD0	102
522f5a98bfeSMaxime Ripard    #define CLK_LCD0		58
523f5a98bfeSMaxime Ripard    #define RST_BUS_LCD0	22
524f5a98bfeSMaxime Ripard    #define RST_BUS_EDP		24
525f5a98bfeSMaxime Ripard    #define RST_BUS_LVDS	25
526f5a98bfeSMaxime Ripard
527f5a98bfeSMaxime Ripard    lcd-controller@3c00000 {
528f5a98bfeSMaxime Ripard        compatible = "allwinner,sun9i-a80-tcon-lcd";
529f5a98bfeSMaxime Ripard        reg = <0x03c00000 0x10000>;
530f5a98bfeSMaxime Ripard        interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
531f5a98bfeSMaxime Ripard        clocks = <&ccu CLK_BUS_LCD0>, <&ccu CLK_LCD0>;
532f5a98bfeSMaxime Ripard        clock-names = "ahb", "tcon-ch0";
533f5a98bfeSMaxime Ripard        resets = <&ccu RST_BUS_LCD0>, <&ccu RST_BUS_EDP>, <&ccu RST_BUS_LVDS>;
534f5a98bfeSMaxime Ripard        reset-names = "lcd", "edp", "lvds";
535f5a98bfeSMaxime Ripard        clock-output-names = "tcon0-pixel-clock";
536f5a98bfeSMaxime Ripard        #clock-cells = <0>;
537f5a98bfeSMaxime Ripard
538f5a98bfeSMaxime Ripard        ports {
539f5a98bfeSMaxime Ripard            #address-cells = <1>;
540f5a98bfeSMaxime Ripard            #size-cells = <0>;
541f5a98bfeSMaxime Ripard
542f5a98bfeSMaxime Ripard            port@0 {
543f5a98bfeSMaxime Ripard                reg = <0>;
544f5a98bfeSMaxime Ripard
545f5a98bfeSMaxime Ripard                endpoint {
546f5a98bfeSMaxime Ripard                    remote-endpoint = <&drc0_out_tcon0>;
547f5a98bfeSMaxime Ripard                };
548f5a98bfeSMaxime Ripard            };
549f5a98bfeSMaxime Ripard
550f5a98bfeSMaxime Ripard            port@1 {
551f5a98bfeSMaxime Ripard                reg = <1>;
552f5a98bfeSMaxime Ripard            };
553f5a98bfeSMaxime Ripard        };
554f5a98bfeSMaxime Ripard    };
555f5a98bfeSMaxime Ripard
556f5a98bfeSMaxime Ripard    #undef CLK_BUS_TCON0
557f5a98bfeSMaxime Ripard    #undef CLK_TCON0
558f5a98bfeSMaxime Ripard    #undef RST_BUS_TCON0
559f5a98bfeSMaxime Ripard    #undef RST_BUS_EDP
560f5a98bfeSMaxime Ripard    #undef RST_BUS_LVDS
561f5a98bfeSMaxime Ripard
562f5a98bfeSMaxime Ripard  - |
563f5a98bfeSMaxime Ripard    #include <dt-bindings/interrupt-controller/arm-gic.h>
564f5a98bfeSMaxime Ripard
565f5a98bfeSMaxime Ripard    /*
566f5a98bfeSMaxime Ripard     * This comes from the clock/sun8i-a83t-ccu.h and
567f5a98bfeSMaxime Ripard     * reset/sun8i-a83t-ccu.h headers, but we can't include them since
568f5a98bfeSMaxime Ripard     * it would trigger a bunch of warnings for redefinitions of
569f5a98bfeSMaxime Ripard     * symbols with the other example.
570f5a98bfeSMaxime Ripard     */
571f5a98bfeSMaxime Ripard
572f5a98bfeSMaxime Ripard    #define CLK_BUS_TCON0	36
573f5a98bfeSMaxime Ripard    #define CLK_TCON0		85
574f5a98bfeSMaxime Ripard    #define RST_BUS_TCON0	22
575f5a98bfeSMaxime Ripard    #define RST_BUS_LVDS	31
576f5a98bfeSMaxime Ripard
577f5a98bfeSMaxime Ripard    lcd-controller@1c0c000 {
578f5a98bfeSMaxime Ripard        compatible = "allwinner,sun8i-a83t-tcon-lcd";
579f5a98bfeSMaxime Ripard        reg = <0x01c0c000 0x1000>;
580f5a98bfeSMaxime Ripard        interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
581f5a98bfeSMaxime Ripard        clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
582f5a98bfeSMaxime Ripard        clock-names = "ahb", "tcon-ch0";
583f5a98bfeSMaxime Ripard        clock-output-names = "tcon-pixel-clock";
584f5a98bfeSMaxime Ripard        #clock-cells = <0>;
585f5a98bfeSMaxime Ripard        resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
586f5a98bfeSMaxime Ripard        reset-names = "lcd", "lvds";
587f5a98bfeSMaxime Ripard
588f5a98bfeSMaxime Ripard        ports {
589f5a98bfeSMaxime Ripard            #address-cells = <1>;
590f5a98bfeSMaxime Ripard            #size-cells = <0>;
591f5a98bfeSMaxime Ripard
592f5a98bfeSMaxime Ripard            port@0 {
593f5a98bfeSMaxime Ripard                #address-cells = <1>;
594f5a98bfeSMaxime Ripard                #size-cells = <0>;
595f5a98bfeSMaxime Ripard                reg = <0>;
596f5a98bfeSMaxime Ripard
597f5a98bfeSMaxime Ripard                endpoint@0 {
598f5a98bfeSMaxime Ripard                    reg = <0>;
599f5a98bfeSMaxime Ripard                    remote-endpoint = <&mixer0_out_tcon0>;
600f5a98bfeSMaxime Ripard                };
601f5a98bfeSMaxime Ripard
602f5a98bfeSMaxime Ripard                endpoint@1 {
603f5a98bfeSMaxime Ripard                    reg = <1>;
604f5a98bfeSMaxime Ripard                    remote-endpoint = <&mixer1_out_tcon0>;
605f5a98bfeSMaxime Ripard                };
606f5a98bfeSMaxime Ripard            };
607f5a98bfeSMaxime Ripard
608f5a98bfeSMaxime Ripard            port@1 {
609f5a98bfeSMaxime Ripard                reg = <1>;
610f5a98bfeSMaxime Ripard            };
611f5a98bfeSMaxime Ripard        };
612f5a98bfeSMaxime Ripard    };
613f5a98bfeSMaxime Ripard
614f5a98bfeSMaxime Ripard    #undef CLK_BUS_TCON0
615f5a98bfeSMaxime Ripard    #undef CLK_TCON0
616f5a98bfeSMaxime Ripard    #undef RST_BUS_TCON0
617f5a98bfeSMaxime Ripard    #undef RST_BUS_LVDS
618f5a98bfeSMaxime Ripard
619f5a98bfeSMaxime Ripard  - |
620f5a98bfeSMaxime Ripard    #include <dt-bindings/interrupt-controller/arm-gic.h>
621f5a98bfeSMaxime Ripard
622f5a98bfeSMaxime Ripard    /*
623f5a98bfeSMaxime Ripard     * This comes from the clock/sun8i-r40-ccu.h and
624f5a98bfeSMaxime Ripard     * reset/sun8i-r40-ccu.h headers, but we can't include them since
625f5a98bfeSMaxime Ripard     * it would trigger a bunch of warnings for redefinitions of
626f5a98bfeSMaxime Ripard     * symbols with the other example.
627f5a98bfeSMaxime Ripard     */
628f5a98bfeSMaxime Ripard
629f5a98bfeSMaxime Ripard    #define CLK_BUS_TCON_TV0	73
630f5a98bfeSMaxime Ripard    #define RST_BUS_TCON_TV0	49
631f5a98bfeSMaxime Ripard
632f5a98bfeSMaxime Ripard    tcon_tv0: lcd-controller@1c73000 {
633f5a98bfeSMaxime Ripard        compatible = "allwinner,sun8i-r40-tcon-tv";
634f5a98bfeSMaxime Ripard        reg = <0x01c73000 0x1000>;
635f5a98bfeSMaxime Ripard        interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
636f5a98bfeSMaxime Ripard        clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>;
637f5a98bfeSMaxime Ripard        clock-names = "ahb", "tcon-ch1";
638f5a98bfeSMaxime Ripard        resets = <&ccu RST_BUS_TCON_TV0>;
639f5a98bfeSMaxime Ripard        reset-names = "lcd";
640f5a98bfeSMaxime Ripard
641f5a98bfeSMaxime Ripard        ports {
642f5a98bfeSMaxime Ripard            #address-cells = <1>;
643f5a98bfeSMaxime Ripard            #size-cells = <0>;
644f5a98bfeSMaxime Ripard
645f5a98bfeSMaxime Ripard            port@0 {
646f5a98bfeSMaxime Ripard                #address-cells = <1>;
647f5a98bfeSMaxime Ripard                #size-cells = <0>;
648f5a98bfeSMaxime Ripard                reg = <0>;
649f5a98bfeSMaxime Ripard
650f5a98bfeSMaxime Ripard                endpoint@0 {
651f5a98bfeSMaxime Ripard                    reg = <0>;
652f5a98bfeSMaxime Ripard                    remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
653f5a98bfeSMaxime Ripard                };
654f5a98bfeSMaxime Ripard
655f5a98bfeSMaxime Ripard                endpoint@1 {
656f5a98bfeSMaxime Ripard                    reg = <1>;
657f5a98bfeSMaxime Ripard                    remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
658f5a98bfeSMaxime Ripard                };
659f5a98bfeSMaxime Ripard            };
660f5a98bfeSMaxime Ripard
661f5a98bfeSMaxime Ripard            tcon_tv0_out: port@1 {
662f5a98bfeSMaxime Ripard                #address-cells = <1>;
663f5a98bfeSMaxime Ripard                #size-cells = <0>;
664f5a98bfeSMaxime Ripard                reg = <1>;
665f5a98bfeSMaxime Ripard
666f5a98bfeSMaxime Ripard                endpoint@1 {
667f5a98bfeSMaxime Ripard                    reg = <1>;
668f5a98bfeSMaxime Ripard                    remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
669f5a98bfeSMaxime Ripard                };
670f5a98bfeSMaxime Ripard            };
671f5a98bfeSMaxime Ripard        };
672f5a98bfeSMaxime Ripard    };
673f5a98bfeSMaxime Ripard
674f5a98bfeSMaxime Ripard    #undef CLK_BUS_TCON_TV0
675f5a98bfeSMaxime Ripard    #undef RST_BUS_TCON_TV0
676f5a98bfeSMaxime Ripard
677f5a98bfeSMaxime Ripard...
678