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/openbmc/linux/tools/perf/arch/x86/tests/
H A Dinsn-x86-dat-32.c12 {{0x62, 0x81, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
14 {{0x62, 0x88, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
16 {{0x62, 0x90, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
18 {{0x62, 0x98, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
20 {{0x62, 0xa0, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
22 {{0x62, 0xa8, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
24 {{0x62, 0xb0, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
26 {{0x62, 0xb8, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
30 {{0x62, 0x05, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
34 {{0x62, 0x14, 0x05, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
[all …]
H A Dinsn-x86-dat-64.c14 {{0x48, 0x0f, 0x41, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
16 {{0x66, 0x0f, 0x41, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
20 {{0x48, 0x0f, 0x44, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
22 {{0x66, 0x0f, 0x44, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
24 {{0x0f, 0x90, 0x80, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
26 {{0x0f, 0x91, 0x80, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
28 {{0x0f, 0x92, 0x80, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
30 {{0x0f, 0x92, 0x80, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
32 {{0x0f, 0x92, 0x80, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
34 {{0x0f, 0x93, 0x80, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
[all …]
/openbmc/linux/drivers/gpu/drm/vc4/
H A Dvc4_hdmi_phy.c67 #define VC4_HDMI_TX_PHY_CTL_3_CZ_SHIFT 6
68 #define VC4_HDMI_TX_PHY_CTL_3_CZ_MASK VC4_MASK(7, 6)
80 #define VC4_HDMI_TX_PHY_PLL_CTL_0_VCO_CONT_EN BIT(6)
262 {{0x0, 0x0A}, 0x12, 0x0},
263 {{0x0, 0x0A}, 0x12, 0x0},
264 {{0x0, 0x0A}, 0x12, 0x0}
271 {{0x0, 0x09}, 0x12, 0x0},
272 {{0x0, 0x09}, 0x12, 0x0},
273 {{0x0, 0x09}, 0x12, 0x0}
280 {{0x0, 0x09}, 0x12, 0x0},
[all …]
/openbmc/linux/drivers/net/phy/
H A Dmediatek-ge-soc.c35 #define MTK_PHY_TXVLD_DA_RG 0x12
73 #define MTK_PHY_DA_RX_PSBN_GBE_MASK GENMASK(6, 4)
106 #define MTK_PHY_CR_TX_AMP_OFFSET_B_MASK GENMASK(6, 0)
110 #define MTK_PHY_CR_TX_AMP_OFFSET_D_MASK GENMASK(6, 0)
215 #define MTK_PHY_LED_ON_MASK GENMASK(6, 0)
225 #define MTK_PHY_LED_ON_FORCE_ON BIT(6)
243 #define MTK_PHY_LED_BLINK_COLLISION BIT(6)
259 #define EFS_DA_TX_I2MPB_B(x) (((x) >> 6) & GENMASK(5, 0))
265 #define EFS_DA_TX_AMP_OFFSET_C(x) (((x) >> 6) & GENMASK(5, 0))
271 #define EFS_DA_TX_R50_D(x) (((x) >> 6) & GENMASK(5, 0))
[all …]
/openbmc/linux/arch/arm/crypto/
H A Dchacha-scalar-core.S39 X12 .req r10
54 #if __LINUX_ARM_ARCH__ >= 6
63 #if __LINUX_ARM_ARCH__ >= 6
106 // quarterrounds: (x0, x4, x8, x12) and (x1, x5, x9, x13)
107 _halfround X0, X4, X8_X10, X12, X1, X5, X9_X11, X13
121 // quarterrounds: (x0, x5, x10, x15) and (x1, x6, x11, x12)
122 _halfround X0, X5, X8_X10, X15, X1, X6, X9_X11, X12
144 // Registers contain x0-x9,x12-x15.
151 // Registers contain x0-x9,x12-x15.
152 // x4-x7 are rotated by 'brot'; x12-x15 are rotated by 'drot'.
[all …]
H A Dchacha-neon-core.S205 .Lrol8_table: .byte 3, 0, 1, 2, 7, 4, 5, 6
241 vadd.u32 q12, q12, q4 // x12 += counter values 0-3
259 // x0 += x4, x12 = rotl32(x12 ^ x0, 16)
278 // x8 += x12, x4 = rotl32(x4 ^ x8, 12)
303 // x0 += x4, x12 = rotl32(x12 ^ x0, 8)
329 // x8 += x12, x4 = rotl32(x4 ^ x8, 7)
357 // x1 += x6, x12 = rotl32(x12 ^ x1, 16)
376 // x11 += x12, x6 = rotl32(x6 ^ x11, 12)
401 // x1 += x6, x12 = rotl32(x12 ^ x1, 8)
427 // x11 += x12, x6 = rotl32(x6 ^ x11, 7)
[all …]
/openbmc/linux/arch/mips/boot/dts/cavium-octeon/
H A Docteon_68xx.dts50 <7 4>, <7 5>, <7 6>, <7 7>,
61 phy0: ethernet-phy@6 {
70 reg = <6>;
79 <3 0x12 0 0x4105>,
88 <3 0x12 0 0x4105>,
97 <3 0x12 0 0x4105>,
106 <3 0x12 0 0x4105>,
123 <3 0x12 0 0x4105>,
132 <3 0x12 0 0x4105>,
141 <3 0x12 0 0x4105>,
[all …]
H A Docteon_3xxx.dts44 <3 0x12 0 0x4105>,
52 <3 0x12 0 0x4105>,
60 <3 0x12 0 0x4105>,
68 <3 0x12 0 0x4105>,
72 phy6: ethernet-phy@6 {
73 reg = <6>;
77 <3 0x12 0 0x4105>,
85 <3 0x12 0 0x4105>,
93 <3 0x12 0 0x4105>,
101 <3 0x12 0 0x4105>,
[all …]
/openbmc/linux/tools/testing/selftests/arm64/abi/
H A Dsyscall-abi-asm.S89 // Load ZA and ZT0 if enabled - uses x12 as scratch due to SME LDR
95 add x12, x12, #1
96 cmp x1, x12
114 ldp x12, x13, [x2], #16
135 ldp q6, q7, [x2, #16 * 6]
161 ldr z6, [x2, #6, MUL VL]
204 ldr p6, [x2, #6, MUL VL]
224 stp x12, x13, [x2], #16
243 stp q6, q7, [x2, #16 * 6]
263 // Save ZA if it's enabled - uses x12 as scratch due to SME STR
[all …]
/openbmc/linux/drivers/clk/mmp/
H A Dclk-of-pxa168.c233 …{0, "dfc_mux", dfc_parent_names, ARRAY_SIZE(dfc_parent_names), CLK_SET_RATE_PARENT, APMU_DFC, 6, 1…
234 …{0, "sdh0_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH0, 6,…
235 …{0, "sdh1_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH1, 6,…
236 …{0, "sdh2_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH2, 6,…
237 …{0, "sdh3_mux", sdh_parent_names, ARRAY_SIZE(sdh_parent_names), CLK_SET_RATE_PARENT, APMU_SDH3, 6,…
238 …arent_names, ARRAY_SIZE(disp_parent_names), CLK_SET_RATE_PARENT, APMU_DISP0, 6, 1, 0, &disp0_lock},
239 …arent_names, ARRAY_SIZE(ccic_parent_names), CLK_SET_RATE_PARENT, APMU_CCIC0, 6, 1, 0, &ccic0_lock},
250 {PXA168_CLK_SPH, "sph_clk", "usb_pll", 0, APMU_USB, 0x12, 0x12, 0x0, 0, &usb_lock},
251 …{PXA168_CLK_SDH0, "sdh0_clk", "sdh0_mux", CLK_SET_RATE_PARENT, APMU_SDH0, 0x12, 0x12, 0x0, 0, &sdh…
252 …{PXA168_CLK_SDH1, "sdh1_clk", "sdh1_mux", CLK_SET_RATE_PARENT, APMU_SDH1, 0x12, 0x12, 0x0, 0, &sdh…
[all …]
/openbmc/linux/include/linux/mfd/wm8350/
H A Drtc.h18 #define WM8350_RTC_DATE_MONTH 0x12
49 #define WM8350_RTC_DAY_FRI 6
56 * R18 (0x12) - RTC Date/Month
69 #define WM8350_RTC_MTH_JUN 6
87 #define WM8350_RTC_MTH_DEC_BCD 0x12
126 #define WM8350_RTC_ALMDAY_FRI 6
151 #define WM8350_RTC_ALMMTH_JUN 6
169 #define WM8350_RTC_ALMMTH_DEC_BCD 0x12
237 #define WM8350_RTC_DSW_32HZ 6
/openbmc/linux/drivers/memory/
H A Dmtk-smi.c88 #define SMI_COMMON_INIT_REGS_NR 6
288 [1] = {0x12, 0x02, 0x14, 0x14, 0x01, 0x18, 0x0a,},
289 [2] = {0x12, 0x12, 0x12, 0x12, 0x0a,},
290 [3] = {0x12, 0x12, 0x12, 0x12, 0x28, 0x28, 0x0a,},
293 [6] = {0x06, 0x01, 0x06, 0x0a,},
294 [7] = {0x0c, 0x0c, 0x12,},
319 [17] = {0x28, 0x02, 0x02, 0x12, 0x02, 0x12, 0x10, 0x02, 0x02, 0x0a,
320 0x12, 0x02, 0x02, 0x0a, 0x16, 0x02, 0x04,},
321 [18] = {0x28, 0x02, 0x02, 0x12, 0x02, 0x12, 0x10, 0x02, 0x02, 0x0a,
322 0x12, 0x02, 0x02, 0x0a, 0x16, 0x02, 0x04,},
[all …]
/openbmc/linux/drivers/iio/imu/st_lsm6dsx/
H A Dst_lsm6dsx_core.c115 .mask = BIT(6),
150 .odr_len = 6,
163 .odr_len = 6,
214 .addr = 0x12,
218 .addr = 0x12,
222 .addr = 0x12,
223 .mask = BIT(6),
254 .odr_len = 6,
267 .odr_len = 6,
316 .addr = 0x12,
[all …]
/openbmc/u-boot/arch/arm/mach-imx/mx5/
H A Dsoc.c82 for (i = 0; i < 6; i++) in imx_get_mac_from_fuse()
103 {"sata", MAKE_CFGVAL(0x28, 0x00, 0x00, 0x12)},
104 {"escpi1:0", MAKE_CFGVAL(0x38, 0x20, 0x00, 0x12)},
105 {"escpi1:1", MAKE_CFGVAL(0x38, 0x20, 0x04, 0x12)},
106 {"escpi1:2", MAKE_CFGVAL(0x38, 0x20, 0x08, 0x12)},
107 {"escpi1:3", MAKE_CFGVAL(0x38, 0x20, 0x0c, 0x12)},
109 {"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)},
110 {"esdhc2", MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)},
111 {"esdhc3", MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)},
112 {"esdhc4", MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)},
/openbmc/linux/arch/mips/crypto/
H A Dchacha-core.S23 #define X12 $s5 macro
78 x( 6); \
99 x( 6); \
112 #define PLUS_ONE_5 6
257 move X12, NONCE_0
264 AXR( 0, 1, 2, 3, 4, 5, 6, 7, 12,13,14,15, 16);
265 AXR( 8, 9,10,11, 12,13,14,15, 4, 5, 6, 7, 12);
266 AXR( 0, 1, 2, 3, 4, 5, 6, 7, 12,13,14,15, 8);
267 AXR( 8, 9,10,11, 12,13,14,15, 4, 5, 6, 7, 7);
268 AXR( 0, 1, 2, 3, 5, 6, 7, 4, 15,12,13,14, 16);
[all …]
/openbmc/linux/drivers/net/ieee802154/
H A Dat86rf230.h18 #define SR_CCA_STATUS 0x01, 0x40, 6
27 #define SR_PAD_IO 0x03, 0xc0, 6
34 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
39 #define SR_PA_BUF_LT_230 0x05, 0xc0, 6
83 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
90 #define SR_AVDD_OK 0x10, 0x40, 6
96 #define SR_RESERVED_11_1 0x11, 0xc0, 6
97 #define RG_XOSC_CTRL (0x12)
98 #define SR_XTAL_TRIM 0x12, 0x0f, 0
99 #define SR_XTAL_MODE 0x12, 0xf0, 4
[all …]
/openbmc/u-boot/drivers/video/tegra124/
H A Ddisplayport.h33 #define DPAUX_DP_AUXCTL_CMD_MOTREQWSTAT (6 << 12)
55 #define DPAUX_DP_AUXSTAT_AUXCTL_STATE_WRITE1 (6 << 20)
107 #define DPAUX_HYBRID_PADCTL_AUX_DRVZ_OHM_39 (6 << 8)
142 {0x12, 0x17, 0x1b, 0x25},
150 {0x12, 0x16, 0x1a, 0x22},
228 {0x05, 0x09, 0x0b, 0x12},
229 {0x09, 0x0d, 0x12},
231 {0x12},
320 #define DP_MAX_LANE_COUNT_TPS3_SUPPORTED_YES (1 << 6)
332 #define DP_MAX_DOWNSPREAD_NO_AUX_HANDSHAKE_LT_T (1 << 6)
[all …]
/openbmc/linux/drivers/mfd/
H A Dstmpe.h124 #define STMPE801_REG_GPIO_DIR 0x12
137 #define STMPE811_IRQ_ADC 6
152 #define STMPE811_REG_GPIO_MP_STA 0x12
180 #define STMPE1600_REG_GPSR_LSB 0x12
193 #define STMPE1601_IRQ_PWM2 6
205 #define STMPE1601_REG_IER_MSB 0x12
264 #define STMPE1801_REG_GPIO_SET_HIGH 0x12
293 #define STMPE24XX_IRQ_PWM1 6
306 #define STMPE24XX_REG_IER_MSB 0x12
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8572ds.dtsi140 nand@6,0 {
173 interrupts = <6 1 0 0>;
177 interrupts = <6 1 0 0>;
285 /* IDSEL 0x11 func 6 - PCI slot 1 */
297 /* IDSEL 0x12 func 0 - PCI slot 2 */
303 /* IDSEL 0x12 func 1 - PCI slot 2 */
309 /* IDSEL 0x12 func 2 - PCI slot 2 */
315 /* IDSEL 0x12 func 3 - PCI slot 2 */
321 /* IDSEL 0x12 func 4 - PCI slot 2 */
327 /* IDSEL 0x12 func 5 - PCI slot 2 */
[all …]
/openbmc/linux/drivers/net/wireless/mediatek/mt7601u/
H A Dinitvals_phy.h21 RF_REG_PAIR(0, 6, 0x00),
75 RF_REG_PAIR(4, 6, 0x00),
91 RF_REG_PAIR(4, 21, 0x12),
142 RF_REG_PAIR(5, 6, 0x3a),
206 { 69, 0x12 },
210 { 195, 0x81 }, { 196, 0x12 },
215 { 195, 0x23 }, { 196, 0x12 },
222 { 69, 0x12 },
228 { 195, 0x81 }, { 196, 0x12 },
247 { 69, 0x12 },
[all …]
/openbmc/linux/drivers/staging/rtl8712/
H A Drtl8712_hal.h49 RTL8712_HCI_TYPE_72USB = 0x12,
56 unsigned char signature_0; /*0x12: CE product, 0x92: IT product*/
59 * 0x12: 72S-U, 03:SDIO
64 unsigned char rf_config; /*0x11: 1T1R, 0x12: 1T2R, 0x92: 1T2R turbo,
67 unsigned char usb_ep_num; /* 4: 4EP, 6: 6EP, 11: 11EP*/
103 unsigned char ps_control_offload; /* 6. FW offloads, 0: driver handles*/
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Diomux.h32 #define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB_MASK (0x3f << 6)
33 #define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB_OFFSET 6
93 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P5DB (6<<24)
99 #define IOMUXC_GPR13_SATA_PHY_7_SATA2I (0x12<<19)
100 #define IOMUXC_GPR13_SATA_PHY_7_SATA2M (0x12<<19)
122 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P22_DB (6<<7)
139 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P996V (6<<2)
151 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P113V (0x12<<2)
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dmxm.c55 0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
60 0x00, 0x12, 0x22, 0x11, 0x32, 0x31, 0x11, 0x31,
66 0x11, 0x31, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00
70 0x00, 0x14, 0x12, 0x11, 0x00, 0x31, 0x11, 0x31,
80 if (mxm && hdr >= 6) { in mxm_sor_map()
118 u16 map = nvbios_rd16(bios, mxm + 6); in mxm_ddc_map()
/openbmc/linux/drivers/media/tuners/
H A Dfc0012.c76 0x1f, /* reg. 0x12: Set to maximum gain */ in fc0012_init()
154 reg[6] = 0x00; in fc0012_set_params()
158 reg[6] = 0x02; in fc0012_set_params()
162 reg[6] = 0x00; in fc0012_set_params()
166 reg[6] = 0x02; in fc0012_set_params()
170 reg[6] = 0x00; in fc0012_set_params()
174 reg[6] = 0x02; in fc0012_set_params()
177 reg[5] = 0x12; in fc0012_set_params()
178 reg[6] = 0x00; in fc0012_set_params()
181 reg[5] = 0x12; in fc0012_set_params()
[all …]
/openbmc/linux/drivers/media/pci/solo6x10/
H A Dsolo6x10-tw28.c25 #define DEFAULT_VDELAY_PAL (6)
31 0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f,
33 0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f,
35 0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f,
37 0x12, 0xf5, 0x0c, 0xd0, 0x00, 0x00, 0x00, 0x7f,
65 0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x12, /* 0x00 */
67 0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x12, /* 0x10 */
69 0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x12, /* 0x20 */
71 0x00, 0xf0, 0x70, 0x30, 0x80, 0x80, 0x00, 0x12, /* 0x30 */
101 0x12, 0xff, 0x09, 0xd0, 0x00, 0x00, 0x00, 0x7f,
[all …]

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