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/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h9 #define ICPU_GPR(x) (0x4 * (x)) argument
30 #define ICPU_GENERAL_CTRL_IF_SI_OWNER(x) (((x) << 4) & GENMASK(5, 4)) argument
31 #define ICPU_GENERAL_CTRL_IF_SI_OWNER_M GENMASK(5, 4)
32 #define ICPU_GENERAL_CTRL_IF_SI_OWNER_X(x) (((x) & GENMASK(5, 4)) >> 4) argument
42 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME(x) (((x) << 5) & GENMASK(9, 5)) argument
43 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_M GENMASK(9, 5)
44 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_X(x) (((x) & GENMASK(9, 5)) >> 5) argument
45 #define ICPU_SPI_MST_CFG_CLK_DIV(x) ((x) & GENMASK(4, 0)) argument
55 #define ICPU_SW_MODE_SW_SPI_CS(x) (((x) << 5) & GENMASK(8, 5)) argument
56 #define ICPU_SW_MODE_SW_SPI_CS_M GENMASK(8, 5)
[all …]
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/luton/
H A Dluton_icpu_cfg.h9 #define ICPU_GPR(x) (0x4 * (x)) argument
22 #define ICPU_GENERAL_CTRL_CPU_BUSIF_SLEEP_DIS BIT(5)
34 #define ICPU_PI_MST_CFG_TRISTATE_CTRL BIT(5)
35 #define ICPU_PI_MST_CFG_CLK_DIV(x) ((x) & GENMASK(4, 0)) argument
41 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME(x) (((x) << 5) & GENMASK(9, 5)) argument
42 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_M GENMASK(9, 5)
43 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_X(x) (((x) & GENMASK(9, 5)) >> 5) argument
44 #define ICPU_SPI_MST_CFG_CLK_DIV(x) ((x) & GENMASK(4, 0)) argument
54 #define ICPU_SW_MODE_SW_SPI_CS(x) (((x) << 5) & GENMASK(8, 5)) argument
55 #define ICPU_SW_MODE_SW_SPI_CS_M GENMASK(8, 5)
[all …]
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h9 #define ICPU_GPR(x) (0x4 * (x)) argument
30 #define ICPU_GENERAL_CTRL_IF_SI_OWNER(x) (((x) << 4) & GENMASK(5, 4)) argument
31 #define ICPU_GENERAL_CTRL_IF_SI_OWNER_M GENMASK(5, 4)
32 #define ICPU_GENERAL_CTRL_IF_SI_OWNER_X(x) (((x) & GENMASK(5, 4)) >> 4) argument
41 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME(x) (((x) << 5) & GENMASK(9, 5)) argument
42 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_M GENMASK(9, 5)
43 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_X(x) (((x) & GENMASK(9, 5)) >> 5) argument
44 #define ICPU_SPI_MST_CFG_CLK_DIV(x) ((x) & GENMASK(4, 0)) argument
54 #define ICPU_SW_MODE_SW_SPI_CS(x) (((x) << 5) & GENMASK(8, 5)) argument
55 #define ICPU_SW_MODE_SW_SPI_CS_M GENMASK(8, 5)
[all …]
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h9 #define ICPU_GPR(x) (0x4 * (x)) argument
27 #define ICPU_GENERAL_CTRL_IF_PI_MST_ENA BIT(5)
37 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME(x) (((x) << 5) & GENMASK(9, 5)) argument
38 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_M GENMASK(9, 5)
39 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_X(x) (((x) & GENMASK(9, 5)) >> 5) argument
40 #define ICPU_SPI_MST_CFG_CLK_DIV(x) ((x) & GENMASK(4, 0)) argument
50 #define ICPU_SW_MODE_SW_SPI_CS(x) (((x) << 5) & GENMASK(8, 5)) argument
51 #define ICPU_SW_MODE_SW_SPI_CS_M GENMASK(8, 5)
52 #define ICPU_SW_MODE_SW_SPI_CS_X(x) (((x) & GENMASK(8, 5)) >> 5) argument
53 #define ICPU_SW_MODE_SW_SPI_CS_OE(x) (((x) << 1) & GENMASK(4, 1)) argument
[all …]
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h9 #define ICPU_GPR(x) (0x4 * (x)) argument
29 #define ICPU_GENERAL_CTRL_IF_SI_OWNER(x) (((x) << 6) & GENMASK(7, 6)) argument
31 #define ICPU_GENERAL_CTRL_IF_SI_OWNER_X(x) (((x) & GENMASK(7, 6)) >> 4) argument
32 #define ICPU_GENERAL_CTRL_IF_SI1_OWNER(x) (((x) << 4) & GENMASK(5, 4)) argument
33 #define ICPU_GENERAL_CTRL_IF_SI1_OWNER_M GENMASK(5, 4)
34 #define ICPU_GENERAL_CTRL_IF_SI1_OWNER_X(x) (((x) & GENMASK(5, 4)) >> 4) argument
44 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME(x) (((x) << 5) & GENMASK(9, 5)) argument
45 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_M GENMASK(9, 5)
46 #define ICPU_SPI_MST_CFG_CS_DESELECT_TIME_X(x) (((x) & GENMASK(9, 5)) >> 5) argument
47 #define ICPU_SPI_MST_CFG_CLK_DIV(x) ((x) & GENMASK(4, 0)) argument
[all …]
/openbmc/linux/include/soc/mscc/
H A Docelot_hsio.h90 #define HSIO_PLL5G_CFG0_SELBGV820(x) (((x) << 23) & GENMASK(26, 23)) argument
92 #define HSIO_PLL5G_CFG0_SELBGV820_X(x) (((x) & GENMASK(26, 23)) >> 23) argument
93 #define HSIO_PLL5G_CFG0_LOOP_BW_RES(x) (((x) << 18) & GENMASK(22, 18)) argument
95 #define HSIO_PLL5G_CFG0_LOOP_BW_RES_X(x) (((x) & GENMASK(22, 18)) >> 18) argument
96 #define HSIO_PLL5G_CFG0_SELCPI(x) (((x) << 16) & GENMASK(17, 16)) argument
98 #define HSIO_PLL5G_CFG0_SELCPI_X(x) (((x) & GENMASK(17, 16)) >> 16) argument
103 #define HSIO_PLL5G_CFG0_CPU_CLK_DIV(x) (((x) << 6) & GENMASK(11, 6)) argument
105 #define HSIO_PLL5G_CFG0_CPU_CLK_DIV_X(x) (((x) & GENMASK(11, 6)) >> 6) argument
106 #define HSIO_PLL5G_CFG0_CORE_CLK_DIV(x) ((x) & GENMASK(5, 0)) argument
107 #define HSIO_PLL5G_CFG0_CORE_CLK_DIV_M GENMASK(5, 0)
[all …]
H A Docelot_qsys.h16 #define QSYS_STAT_CNT_CFG_TX_GREEN_CNT_MODE BIT(5)
25 #define QSYS_EEE_THRES_EEE_HIGH_BYTES(x) (((x) << 8) & GENMASK(15, 8)) argument
27 #define QSYS_EEE_THRES_EEE_HIGH_BYTES_X(x) (((x) & GENMASK(15, 8)) >> 8) argument
28 #define QSYS_EEE_THRES_EEE_HIGH_FRAMES(x) ((x) & GENMASK(7, 0)) argument
33 #define QSYS_EXT_CPU_CFG_EXT_CPU_PORT(x) (((x) << 8) & GENMASK(12, 8)) argument
35 #define QSYS_EXT_CPU_CFG_EXT_CPU_PORT_X(x) (((x) & GENMASK(12, 8)) >> 8) argument
36 #define QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK(x) ((x) & GENMASK(7, 0)) argument
41 #define QSYS_QMAP_SE_BASE(x) (((x) << 5) & GENMASK(12, 5)) argument
42 #define QSYS_QMAP_SE_BASE_M GENMASK(12, 5)
43 #define QSYS_QMAP_SE_BASE_X(x) (((x) & GENMASK(12, 5)) >> 5) argument
[all …]
H A Docelot_ana.h15 #define ANA_ANAGEFIL_PID_VAL(x) (((x) << 14) & GENMASK(18, 14)) argument
17 #define ANA_ANAGEFIL_PID_VAL_X(x) (((x) & GENMASK(18, 14)) >> 14) argument
19 #define ANA_ANAGEFIL_VID_VAL(x) ((x) & GENMASK(12, 0)) argument
24 #define ANA_STORMLIMIT_CFG_STORM_RATE(x) (((x) << 3) & GENMASK(6, 3)) argument
26 #define ANA_STORMLIMIT_CFG_STORM_RATE_X(x) (((x) & GENMASK(6, 3)) >> 3) argument
28 #define ANA_STORMLIMIT_CFG_STORM_MODE(x) ((x) & GENMASK(1, 0)) argument
32 #define ANA_AUTOAGE_AGE_PERIOD(x) (((x) << 1) & GENMASK(20, 1)) argument
34 #define ANA_AUTOAGE_AGE_PERIOD_X(x) (((x) & GENMASK(20, 1)) >> 1) argument
40 #define ANA_AGENCTRL_FID_MASK(x) (((x) << 12) & GENMASK(23, 12)) argument
42 #define ANA_AGENCTRL_FID_MASK_X(x) (((x) & GENMASK(23, 12)) >> 12) argument
[all …]
/openbmc/linux/lib/crypto/
H A Dchacha.c16 static void chacha_permute(u32 *x, int nrounds) in chacha_permute() argument
24 x[0] += x[4]; x[12] = rol32(x[12] ^ x[0], 16); in chacha_permute()
25 x[1] += x[5]; x[13] = rol32(x[13] ^ x[1], 16); in chacha_permute()
26 x[2] += x[6]; x[14] = rol32(x[14] ^ x[2], 16); in chacha_permute()
27 x[3] += x[7]; x[15] = rol32(x[15] ^ x[3], 16); in chacha_permute()
29 x[8] += x[12]; x[4] = rol32(x[4] ^ x[8], 12); in chacha_permute()
30 x[9] += x[13]; x[5] = rol32(x[5] ^ x[9], 12); in chacha_permute()
31 x[10] += x[14]; x[6] = rol32(x[6] ^ x[10], 12); in chacha_permute()
32 x[11] += x[15]; x[7] = rol32(x[7] ^ x[11], 12); in chacha_permute()
34 x[0] += x[4]; x[12] = rol32(x[12] ^ x[0], 8); in chacha_permute()
[all …]
/openbmc/u-boot/lib/libavb/
H A Davb_sha256.c13 #define SHFR(x, n) (x >> n) argument
14 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n))) argument
15 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) argument
16 #define CH(x, y, z) ((x & y) ^ (~x & z)) argument
17 #define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z)) argument
19 #define SHA256_F1(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22)) argument
20 #define SHA256_F2(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25)) argument
21 #define SHA256_F3(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHFR(x, 3)) argument
22 #define SHA256_F4(x) (ROTR(x, 17) ^ ROTR(x, 19) ^ SHFR(x, 10)) argument
24 #define UNPACK32(x, str) \ argument
[all …]
H A Davb_sha512.c13 #define SHFR(x, n) (x >> n) argument
14 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n))) argument
15 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n))) argument
16 #define CH(x, y, z) ((x & y) ^ (~x & z)) argument
17 #define MAJ(x, y, z) ((x & y) ^ (x & z) ^ (y & z)) argument
19 #define SHA512_F1(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39)) argument
20 #define SHA512_F2(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41)) argument
21 #define SHA512_F3(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHFR(x, 7)) argument
22 #define SHA512_F4(x) (ROTR(x, 19) ^ ROTR(x, 61) ^ SHFR(x, 6)) argument
24 #define UNPACK32(x, str) \ argument
[all …]
/openbmc/linux/drivers/scsi/aic94xx/
H A Daic94xx_dump.c24 #define MD(x) (1 << (x)) argument
122 {"OOB_BFLTR" ,0x100, 8, MD(5)},
123 {"OOB_INIT_MIN" ,0x102,16, MD(5)},
124 {"OOB_INIT_MAX" ,0x104,16, MD(5)},
125 {"OOB_INIT_NEG" ,0x106,16, MD(5)},
126 {"OOB_SAS_MIN" ,0x108,16, MD(5)},
127 {"OOB_SAS_MAX" ,0x10A,16, MD(5)},
128 {"OOB_SAS_NEG" ,0x10C,16, MD(5)},
129 {"OOB_WAKE_MIN" ,0x10E,16, MD(5)},
130 {"OOB_WAKE_MAX" ,0x110,16, MD(5)},
[all …]
/openbmc/linux/arch/mips/include/asm/
H A Dpgtable-32.h156 #define pte_pfn(x) (((unsigned long)((x).pte_high >> PFN_PTE_SHIFT)) | (unsigned long)((x).pte_low… argument
172 #define pte_pfn(x) ((unsigned long)((x).pte_high >> 6)) argument
187 #define pte_pfn(x) ((unsigned long)((x).pte >> PFN_PTE_SHIFT)) argument
192 #define pte_page(x) pfn_to_page(pte_pfn(x)) argument
204 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
211 #define __swp_type(x) (((x).val >> 10) & 0x1f) argument
212 #define __swp_offset(x) ((x).val >> 15) argument
215 #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) argument
227 * 6 6 6 6 5 5 5 5 5 5 5 5 5 5 4 4 4 4 4 4 4 4 4 4 3 3 3 3 3 3 3 3
228 * 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2
[all …]
/openbmc/linux/drivers/net/ethernet/mscc/
H A Docelot_qs.h20 #define XTR_VALID_BYTES(x) (4 - (((x) >> 24) & 3)) argument
24 #define QS_XTR_GRP_CFG_MODE(x) (((x) << 2) & GENMASK(3, 2)) argument
26 #define QS_XTR_GRP_CFG_MODE_X(x) (((x) & GENMASK(3, 2)) >> 2) argument
34 #define QS_XTR_CFG_DP_WM(x) (((x) << 5) & GENMASK(7, 5)) argument
35 #define QS_XTR_CFG_DP_WM_M GENMASK(7, 5)
36 #define QS_XTR_CFG_DP_WM_X(x) (((x) & GENMASK(7, 5)) >> 5) argument
37 #define QS_XTR_CFG_SCH_WM(x) (((x) << 2) & GENMASK(4, 2)) argument
39 #define QS_XTR_CFG_SCH_WM_X(x) (((x) & GENMASK(4, 2)) >> 2) argument
40 #define QS_XTR_CFG_OFLW_ERR_STICKY(x) ((x) & GENMASK(1, 0)) argument
45 #define QS_INJ_GRP_CFG_MODE(x) (((x) << 2) & GENMASK(3, 2)) argument
[all …]
H A Docelot_rew.h13 #define REW_PORT_VLAN_CFG_PORT_TPID(x) (((x) << 16) & GENMASK(31, 16)) argument
15 #define REW_PORT_VLAN_CFG_PORT_TPID_X(x) (((x) & GENMASK(31, 16)) >> 16) argument
17 #define REW_PORT_VLAN_CFG_PORT_PCP(x) (((x) << 12) & GENMASK(14, 12)) argument
19 #define REW_PORT_VLAN_CFG_PORT_PCP_X(x) (((x) & GENMASK(14, 12)) >> 12) argument
20 #define REW_PORT_VLAN_CFG_PORT_VID(x) ((x) & GENMASK(11, 0)) argument
25 #define REW_TAG_CFG_TAG_CFG(x) (((x) << 7) & GENMASK(8, 7)) argument
27 #define REW_TAG_CFG_TAG_CFG_X(x) (((x) & GENMASK(8, 7)) >> 7) argument
28 #define REW_TAG_CFG_TAG_TPID_CFG(x) (((x) << 5) & GENMASK(6, 5)) argument
29 #define REW_TAG_CFG_TAG_TPID_CFG_M GENMASK(6, 5)
30 #define REW_TAG_CFG_TAG_TPID_CFG_X(x) (((x) & GENMASK(6, 5)) >> 5) argument
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-ts5500.c107 * 0x7b 0 0x7a 0 x x DIO1_0 1 0
108 * 0x7b 1 0x7a 0 x x DIO1_1 3 1
109 * 0x7b 2 0x7a 0 x x DIO1_2 5 2
110 * 0x7b 3 0x7a 0 x x DIO1_3 7 3
111 * 0x7b 4 0x7a 1 x x DIO1_4 9 4
112 * 0x7b 5 0x7a 1 x x DIO1_5 11 5
113 * 0x7b 6 0x7a 1 x x DIO1_6 13 6
114 * 0x7b 7 0x7a 1 x x DIO1_7 15 7
115 * 0x7c 0 0x7a 5 x x DIO1_8 4 8
116 * 0x7c 1 0x7a 5 x x DIO1_9 6 9
[all …]
/openbmc/qemu/hw/arm/
H A Dsmmuv3-internal.h48 FIELD(IDR0, BTM, 5 , 1)
72 FIELD(IDR1, SSIDSIZE, 6 , 5)
73 FIELD(IDR1, PRIQS, 11, 5)
74 FIELD(IDR1, EVENTQS, 16, 5)
75 FIELD(IDR1, CMDQS, 21, 5)
94 FIELD(IDR3, PPS, 5, 1);
109 FIELD(IDR5, GRAN16K, 5, 1);
147 FIELD(GERROR, MSI_EVENTQ_ABT_ERR, 5, 1)
164 FIELD(STRTAB_BASE_CFG, SPLIT, 6 , 5)
358 #define CMD_TYPE(x) extract32((x)->word[0], 0 , 8) argument
[all …]
/openbmc/linux/arch/mips/crypto/
H A Dchacha-core.S31 #define X(n) X ## n macro
71 #define FOR_EACH_WORD(x) \ argument
72 x( 0); \
73 x( 1); \
74 x( 2); \
75 x( 3); \
76 x( 4); \
77 x( 5); \
78 x( 6); \
79 x( 7); \
[all …]
/openbmc/linux/Documentation/input/devices/
H A Dsentelic.rst12 Finger Sensing Pad Intellimouse Mode (scrolling wheel, 4th and 5th buttons)
16 page (5th button)
22 5. FSP will respond 0x04.
27 Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0
29 1 |Y|X|y|x|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 | | |B|F|W|W|W|W|
33 Bit6 => X overflow
35 Bit4 => X sign bit
40 Byte 2: X Movement(9-bit 2's complement integers)
46 Bit5 => 1 = 5th mouse button is pressed, Backward one page.
47 0 = 5th mouse button is not pressed.
[all …]
/openbmc/u-boot/post/lib_powerpc/fpu/
H A Dcompare-fp-1.c36 static void iuneq (float x, float y, int ok) in iuneq() argument
38 TEST (UNEQ (x, y)); in iuneq()
39 TEST (!LTGT (x, y)); in iuneq()
40 TEST (UNLE (x, y) && UNGE (x,y)); in iuneq()
43 static void ieq (float x, float y, int ok) in ieq() argument
45 TEST (ORD (x, y) && UNEQ (x, y)); in ieq()
48 static void iltgt (float x, float y, int ok) in iltgt() argument
50 TEST (!UNEQ (x, y)); /* Not optimizable. */ in iltgt()
51 TEST (LTGT (x, y)); /* Same, __builtin_islessgreater does not trap. */ in iltgt()
52 TEST (ORD (x, y) && (UNLT (x, y) || UNGT (x,y))); in iltgt()
[all …]
/openbmc/linux/sound/soc/fsl/
H A Dimx-ssi.h16 #define SSI_SCR_I2S_MODE_NORM (0 << 5)
17 #define SSI_SCR_I2S_MODE_MSTR (1 << 5)
18 #define SSI_SCR_I2S_MODE_SLAVE (2 << 5)
19 #define SSI_I2S_MODE_MASK (3 << 5)
41 #define SSI_SISR_TLS (1 << 5)
66 #define SSI_SIER_TLS_EN (1 << 5)
79 #define SSI_STCR_TXDIR (1 << 5)
92 #define SSI_SRCR_RXDIR (1 << 5)
102 #define SSI_SRCCR_WL(x) ((((x) - 2) >> 1) << 13) argument
103 #define SSI_SRCCR_DC(x) (((x) & 0x1f) << 8) argument
[all …]
/openbmc/linux/Documentation/userspace-api/media/v4l/
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/openbmc/linux/arch/m68k/fpsp040/
H A Dstanh.S8 | Input: Double-extended number X in location pointed to
11 | Output: The value tanh(X) returned in floating-point register Fp0.
23 | 1. If |X| >= (5/2) log2 or |X| <= 2**(-40), go to 3.
25 | 2. (2**(-40) < |X| < (5/2) log2) Calculate tanh(X) by
26 | sgn := sign(X), y := 2|X|, z := expm1(Y), and
27 | tanh(X) = sgn*( z/(2+z) ).
30 | 3. (|X| <= 2**(-40) or |X| >= (5/2) log2). If |X| < 1,
33 | 4. (|X| >= (5/2) log2) If |X| >= 50 log2, go to 6.
35 | 5. ((5/2) log2 <= |X| < 50 log2) Calculate tanh(X) by
36 | sgn := sign(X), y := 2|X|, z := exp(Y),
[all …]
/openbmc/linux/drivers/comedi/drivers/
H A Dni_stc.h35 #define NISTC_INTA_ACK_G0_GATE_ERR BIT(5)
55 #define NISTC_INTB_ACK_AO_UI2_TC_ERR BIT(5)
84 #define NISTC_AO_CMD2_REG 5
85 #define NISTC_AO_CMD2_END_ON_BC_TC(x) (((x) & 0x3) << 14) argument
94 #define NISTC_AO_CMD2_UC_SW_ON_TC BIT(5)
114 #define NISTC_AI_CMD1_SC_LOAD BIT(5)
132 #define NISTC_AO_CMD1_BC_LOAD BIT(5)
140 #define NISTC_DIO_OUT_SERIAL(x) (((x) & 0xff) << 8) argument
142 #define NISTC_DIO_OUT_PARALLEL(x) ((x) & 0xff) argument
152 #define NISTC_DIO_CTRL_DIR(x) ((x) & 0xff) argument
[all …]
/openbmc/linux/arch/arm/mach-ep93xx/
H A Dgpio-ep93xx.h11 #define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) argument
18 #define EP93XX_GPIO_LINE_A(x) ((x) + 0) argument
24 #define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5)
29 #define EP93XX_GPIO_LINE_B(x) ((x) + 8) argument
35 #define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5)
40 #define EP93XX_GPIO_LINE_C(x) ((x) + 40) argument
46 #define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5)
51 #define EP93XX_GPIO_LINE_D(x) ((x) + 24) argument
57 #define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5)
62 #define EP93XX_GPIO_LINE_E(x) ((x) + 32) argument
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