/openbmc/linux/Documentation/networking/dsa/ |
H A D | sja1105.rst | 8 The NXP SJA1105 is a family of 10 SPI-managed automotive switches: 10 - SJA1105E: First generation, no TTEthernet 11 - SJA1105T: First generation, TTEthernet 12 - SJA1105P: Second generation, no TTEthernet, no SGMII 13 - SJA1105Q: Second generation, TTEthernet, no SGMII 14 - SJA1105R: Second generation, no TTEthernet, SGMII 15 - SJA1105S: Second generation, TTEthernet, SGMII 16 - SJA1110A: Third generation, TTEthernet, SGMII, integrated 100base-T1 and 17 100base-TX PHYs 18 - SJA1110B: Third generation, TTEthernet, SGMII, 100base-T1, 100base-TX [all …]
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | ti,dp83869.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - $ref: ethernet-phy.yaml# 14 - Andrew Davis <afd@ti.com> 17 The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver 18 with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and 19 1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and 20 100BASE-FX Fiber protocols. 23 the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX [all …]
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H A D | ti,dp83867.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - $ref: ethernet-controller.yaml# 14 - Andrew Davis <afd@ti.com> 18 transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX 19 and 1000BASE-T Ethernet protocols. 21 The DP83867 is designed for easy implementation of 10/100/1000 Mbps Ethernet 34 nvmem-cells: 40 nvmem-cell-names: [all …]
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/openbmc/linux/drivers/net/dsa/sja1105/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 11 This is the driver for the NXP SJA1105 (5-port) and SJA1110 (10-port) 15 - SJA1105E (Gen. 1, No TT-Ethernet) 16 - SJA1105T (Gen. 1, TT-Ethernet) 17 - SJA1105P (Gen. 2, No SGMII, No TT-Ethernet) 18 - SJA1105Q (Gen. 2, No SGMII, TT-Ethernet) 19 - SJA1105R (Gen. 2, SGMII, No TT-Ethernet) 20 - SJA1105S (Gen. 2, SGMII, TT-Ethernet) 21 - SJA1110A (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 10 ports) 22 - SJA1110B (Gen. 3, SGMII, TT-Ethernet, 100base-TX PHY, 9 ports) [all …]
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/openbmc/linux/include/uapi/linux/ |
H A D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * Copyright 2006-2009 Solarflare Communications Inc. 25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */ 45 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */ 46 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */ 58 /* Media-dependent registers. */ 59 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ 60 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ 61 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. 62 * Lanes B-D are numbered 134-136. */ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/net/dsa/ |
H A D | nxp,sja1105.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at 16 - Vladimir Oltean <vladimir.oltean@nxp.com> 21 - nxp,sja1105e 22 - nxp,sja1105t 23 - nxp,sja1105p 24 - nxp,sja1105q 25 - nxp,sja1105r [all …]
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/openbmc/linux/net/ethtool/ |
H A D | common.c | 1 // SPDX-License-Identifier: GPL-2.0-only 12 [NETIF_F_SG_BIT] = "tx-scatter-gather", 13 [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4", 14 [NETIF_F_HW_CSUM_BIT] = "tx-checksum-ip-generic", 15 [NETIF_F_IPV6_CSUM_BIT] = "tx-checksum-ipv6", 17 [NETIF_F_FRAGLIST_BIT] = "tx-scatter-gather-fraglist", 18 [NETIF_F_HW_VLAN_CTAG_TX_BIT] = "tx-vlan-hw-insert", 20 [NETIF_F_HW_VLAN_CTAG_RX_BIT] = "rx-vlan-hw-parse", 21 [NETIF_F_HW_VLAN_CTAG_FILTER_BIT] = "rx-vlan-filter", 22 [NETIF_F_HW_VLAN_STAG_TX_BIT] = "tx-vlan-stag-hw-insert", [all …]
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/openbmc/u-boot/drivers/usb/eth/ |
H A D | Kconfig | 3 ---help--- 12 ---help--- 19 ---help--- 27 ---help--- 28 Say Y here if you would like to support Microchip LAN75XX Hi-Speed 29 USB 2.0 to 10/100/1000 Gigabit Ethernet controller. 30 Supports 10Base-T/ 100Base-TX/1000Base-T. 37 ---help--- 39 Gen 1 to 10/100/1000 Gigabit Ethernet controller. 40 Supports 10Base-T/ 100Base-TX/1000Base-T. [all …]
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/openbmc/linux/drivers/net/ethernet/atheros/atlx/ |
H A D | atlx.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers 4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved. 5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com> 6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com> 10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved. 25 #define SPEED_100 100 149 /* IRQ Anti-Lost Timer Initial Value Register */ 228 /* MAC Half-Duplex Control Register */ 246 /* Wake-On-Lan control register */ [all …]
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/openbmc/u-boot/include/linux/ |
H A D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * Copyright 2006-2009 Solarflare Communications Inc. 24 #define MDIO_MMD_AN 7 /* Auto-Negotiation */ 44 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */ 45 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */ 52 /* Media-dependent registers. */ 53 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */ 54 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ 55 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. 56 * Lanes B-D are numbered 134-136. */ [all …]
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/openbmc/u-boot/doc/ |
H A D | README.fec_mxc | 1 U-Boot config options used in fec_mxc.c 4 Selects fec_mxc.c to be compiled into u-boot. Can read out the 11 Defaults to MII100 for 100 Base-tx. 12 RGMII selects 1000 Base-tx reduced pin count interface. 13 RMII selects 100 Base-tx reduced pin count interface. 24 Relevant only if PHYLIB not used. Skips auto-negotiation restart. 32 phy. This is usefull if there is a direct MAC <-> MAC connection, for 34 ethernet-switch. 37 if CONFIG_FEC_MXC is defined and the U-Boot environment does not contain the
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | microchip,sparx5-serdes.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Steen Hegelund <steen.hegelund@microchip.com> 21 * Rx built-in fault detector (loss-of-lock/loss-of-signal) 22 * Adjustable tx de-emphasis (FFE) 23 * Tx output amplitude control 31 The SERDES6G is a high-speed SERDES interface, which can operate at 34 * 100 Mbps (100BASE-FX) [all …]
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/openbmc/linux/Documentation/networking/device_drivers/ethernet/3com/ |
H A D | vortex.rst | 1 .. SPDX-License-Identifier: GPL-2.0 20 - Andrew Morton 21 - Netdev mailing list <netdev@vger.kernel.org> 22 - Linux kernel mailing list <linux-kernel@vger.kernel.org> 28 Since kernel 2.3.99-pre6, this driver incorporates the support for the 29 3c575-series Cardbus cards which used to be handled by 3c575_cb.c. 33 - 3c590 Vortex 10Mbps 34 - 3c592 EISA 10Mbps Demon/Vortex 35 - 3c597 EISA Fast Demon/Vortex 36 - 3c595 Vortex 100baseTx [all …]
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/openbmc/u-boot/drivers/net/ |
H A D | ftmac110.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * Faraday 10/100Mbps Ethernet Controller 6 * Dante Su <dantesu@faraday-tech.com> 17 uint32_t txpd; /* 0x18: Tx Poll Demand Register */ 19 uint32_t txba; /* 0x20: Tx Ring Base Address Register */ 20 uint32_t rxba; /* 0x24: Rx Ring Base Address Register */ 43 #define ISR_TXLOST (1 << 5) /* tx lost */ 44 #define ISR_TXOK (1 << 4) /* tx to ethernet */ 45 #define ISR_NOTXBUF (1 << 3) /* out of tx buffer */ 46 #define ISR_TXFIFO (1 << 2) /* tx to fifo */ [all …]
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H A D | e1000.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 5 Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved. 10 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 36 printf("e1000: %s: ERROR: " fmt, (NIC)->name ,##args) 40 printf("e1000: %s: DEBUG: " fmt, (NIC)->name ,##args) 51 writel((value), ((a)->hw_addr + E1000_##reg)) 53 readl((a)->hw_addr + E1000_##reg) 55 writel((value), ((a)->hw_addr + E1000_##reg + ((offset) << 2))) 57 readl((a)->hw_addr + E1000_##reg + ((offset) << 2)) 322 #define IFE_E_PHY_ID 0x02A80330 /* 10/100 PHY */ [all …]
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H A D | smc91111.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /*------------------------------------------------------------------------ 3 . smc91111.h - macros for the LAN91C111 Ethernet Driver 6 . Sysgo Real-Time Solutions, GmbH <www.elinos.com> 27 ---------------------------------------------------------------------------*/ 71 #define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+((r)<<1)))) 72 #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1)))) 74 unsigned int __p = (unsigned int)((a)->iobase + ((p)<<1)); \ 80 #define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r)))) 81 #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r)))) [all …]
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/openbmc/linux/drivers/phy/freescale/ |
H A D | phy-fsl-imx8mq-usb.c | 1 // SPDX-License-Identifier: GPL-2.0+ 56 void __iomem *base; member 71 return DIV_ROUND_CLOSEST(percent - 94U, 2); in phy_tx_vref_tune_from_property() 81 case 100 ... 101: in phy_tx_rise_tune_from_property() 135 percent = min(percent, 100U); in phy_pcs_tx_swing_full_from_property() 137 return (percent * 127) / 100; in phy_pcs_tx_swing_full_from_property() 142 struct device *dev = imx_phy->phy->dev.parent; in imx8m_get_phy_tuning_data() 144 if (device_property_read_u32(dev, "fsl,phy-tx-vref-tune-percent", in imx8m_get_phy_tuning_data() 145 &imx_phy->tx_vref_tune)) in imx8m_get_phy_tuning_data() 146 imx_phy->tx_vref_tune = PHY_TUNE_DEFAULT; in imx8m_get_phy_tuning_data() [all …]
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/openbmc/linux/drivers/net/ethernet/oki-semi/pch_gbe/ |
H A D | pch_gbe_phy.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 1999 - 2010 Intel Corporation. 12 #define PHY_MAX_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ 21 #define PHY_LP_ABILITY 0x05 /* Link Partner Ability (Base Page) */ 23 #define PHY_NEXT_PAGE_TX 0x07 /* Next Page TX */ 25 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Register */ 26 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Register */ 34 #define MII_CR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */ 41 #define MII_CR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */ 57 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */ [all …]
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/openbmc/linux/drivers/net/ethernet/intel/e1000/ |
H A D | e1000_hw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 1999 - 2006 Intel Corporation. */ 131 e1000_igp_cable_length_100 = 100, 422 /* MAC decode size is 128K - This is the size of BAR0 */ 433 #define SPEED_100 100 443 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE) 486 * E1000_RAR_ENTRIES - 1 multicast addresses. 503 /* Receive Descriptor - Extended */ 529 /* Receive Descriptor - Packet Split */ 553 __le16 length[3]; /* length of buffers 1-3 */ [all …]
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/openbmc/linux/drivers/net/ethernet/dlink/ |
H A D | sundance.c | 3 Written 1999-2000 by Donald Becker. 19 [link no longer provides useful info -jgarzik] 27 /* The user-configurable values. 30 /* Maximum number of multicast addresses to filter (vs. rx-all-multicast). 34 /* Set the copy breakpoint for the copy-only-tiny-frames scheme. 37 need a copy-align. */ 45 100mbps_hd 100Mbps half duplex. 46 100mbps_fd 100Mbps full duplex. 50 3 100Mbps half duplex. 51 4 100Mbps full duplex. [all …]
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/openbmc/linux/drivers/net/phy/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 35 Adds support for a set of LED trigger events per-PHY. Link 39 logical-or of all the link speed ones. 61 Currently tested with mpc866ads and mpc8349e-mitx. 88 - ADIN1200 - Robust,Industrial, Low Power 10/100 Ethernet PHY 89 - ADIN1300 - Robust,Industrial, Low Latency 10/100/1000 Gigabit 97 - ADIN1100 - Robust,Industrial, Low Power 10BASE-T1L Ethernet PHY 107 Currently supports the Asix Electronics PHY found in the X-Surf 100 223 Support for the Marvell 88Q2XXX 100/1000BASE-T1 Automotive Ethernet 229 Support for the Marvell 88X2222 Dual-port Multi-speed Ethernet [all …]
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/openbmc/linux/drivers/net/ethernet/intel/igb/ |
H A D | e1000_defines.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright(c) 2007 - 2018 Intel Corporation. */ 62 /* Interrupt acknowledge Auto-mask */ 118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */ 119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */ 184 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */ 186 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */ 188 #define E1000_CTRL_SPD_100 0x00000100 /* Force 100Mb */ 245 #define E1000_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */ 254 /* Constants used to intrepret the masked PCI-X bus speed. */ [all …]
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/openbmc/linux/Documentation/networking/device_drivers/ethernet/intel/ |
H A D | e100.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 4 Linux Base Driver for the Intel(R) PRO/100 Family of Adapters 12 - In This Release 13 - Identifying Your Adapter 14 - Building and Installation 15 - Driver Configuration Parameters 16 - Additional Configurations 17 - Known Issues 18 - Support 24 This file describes the Linux Base Driver for the Intel(R) PRO/100 Family of [all …]
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/openbmc/linux/Documentation/networking/device_drivers/ethernet/ti/ |
H A D | tlan.rst | 1 .. SPDX-License-Identifier: GPL-2.0 9 (C) 1997-1998 Caldera, Inc. 13 (C) 1999-2001 Torben Mathiasen <tmm@image.dk, torben.mathiasen@compaq.com> 31 0e11 ae32 Compaq Netelligent 10/100 TX PCI UTP 34 0e11 ae40 Compaq Netelligent Dual 10/100 TX PCI UTP 35 0e11 ae43 Compaq Netelligent Integrated 10/100 TX UTP 36 0e11 b011 Compaq Netelligent 10/100 TX Embedded UTP 38 0e11 b030 Compaq Netelligent 10/100 TX UTP 41 108d 0012 Olicom OC-2325 42 108d 0013 Olicom OC-2183 [all …]
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/openbmc/u-boot/cmd/ |
H A D | mii.c | 1 // SPDX-License-Identifier: GPL-2.0+ 41 { 11, 11, 0x01, "power-down" }, 50 { 15, 15, 0x01, "100BASE-T4 able" }, 51 { 14, 14, 0x01, "100BASE-X full duplex able" }, 52 { 13, 13, 0x01, "100BASE-X half duplex able" }, 55 { 10, 10, 0x01, "100BASE-T2 full duplex able" }, 56 { 9, 9, 0x01, "100BASE-T2 half duplex able" }, 85 { 9, 9, 0x01, "100BASE-T4 able" }, 86 { 8, 8, 0x01, "100BASE-TX full duplex able" }, 87 { 7, 7, 0x01, "100BASE-TX able" }, [all …]
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