/openbmc/qemu/tests/qemu-iotests/ |
H A D | 250.out | 3 discard 10485760/10485760 bytes at offset 0 9 wrote 10485760/10485760 bytes at offset 0 12 0 0xa00000 0x82f00000 TEST_DIR/t.qcow2 13 0x82a00000 0xa00000 0x500000 TEST_DIR/t.qcow2
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H A D | 179.out | 11 2 MiB (0x200000) bytes not allocated at offset 0 bytes (0x0) 12 2 MiB (0x200000) bytes allocated at offset 2 MiB (0x200000) 13 2 MiB (0x200000) bytes not allocated at offset 4 MiB (0x400000) 14 2 MiB (0x200000) bytes allocated at offset 6 MiB (0x600000) 15 56 MiB (0x3800000) bytes not allocated at offset 8 MiB (0x800000) 16 [{ "start": 0, "length": 2097152, "depth": 0, "present": false, "zero": true, "data": false, "compr… 17 { "start": 2097152, "length": 2097152, "depth": 0, "present": true, "zero": true, "data": false, "c… 18 { "start": 4194304, "length": 2097152, "depth": 0, "present": false, "zero": true, "data": false, "… 19 { "start": 6291456, "length": 2097152, "depth": 0, "present": true, "zero": true, "data": false, "c… 20 { "start": 8388608, "length": 58720256, "depth": 0, "present": false, "zero": true, "data": false, … [all …]
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/openbmc/linux/drivers/virt/nitro_enclaves/ |
H A D | ne_misc_dev_test.c | 6 #define INVALID_VALUE (~0ull) 17 * Add the region from 0x1000 to (0x1000 + 0x200000 - 1): 22 * num = 0 25 {0x1000, 0x200000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE}, 28 * Add the region from 0x200000 to (0x200000 + 0x1000 - 1): 33 * num = 0 36 {0x200000, 0x1000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE}, 39 * Add the region from 0x200000 to (0x200000 + 0x200000 - 1): 46 * {start=0x200000, end=0x3fffff}, // len=0x200000 49 {0x200000, 0x200000, 0, 1, 0x200000, 0x200000}, [all …]
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/openbmc/u-boot/arch/mips/dts/ |
H A D | ci20.dts | 23 reg = <0x0 0x10000000 24 0x30000000 0x30000000>; 53 reg = <1 0 0x1000000>; 56 #size-cells = <0>; 79 partition@0 { 81 reg = <0x0 0x0 0x0 0x800000>; 84 partition@0x800000 { 86 reg = <0x0 0x800000 0x0 0x200000>; 89 partition@0xa00000 { 91 reg = <0x0 0xa00000 0x0 0x200000>; [all …]
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/openbmc/u-boot/include/configs/ |
H A D | ls1088aqds.h | 18 #define CONFIG_SYS_MMC_ENV_DEV 0 20 #define CONFIG_ENV_SIZE 0x20000 21 #define CONFIG_ENV_OFFSET 0x500000 24 #define CONFIG_ENV_SECT_SIZE 0x40000 27 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ 28 #define CONFIG_ENV_SECT_SIZE 0x40000 31 #define CONFIG_SYS_MMC_ENV_DEV 0 32 #define CONFIG_ENV_SIZE 0x2000 34 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) 35 #define CONFIG_ENV_SECT_SIZE 0x20000 [all …]
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H A D | legoev3.h | 29 #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ 35 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) 38 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) 64 #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) 70 #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) 104 "bootenvfile=uEnv.txt\0" \ 105 "fdtfile=da850-lego-ev3.dtb\0" \ 106 "memsize=64M\0" \ 107 "filesyssize=10M\0" \ 108 "verify=n\0" \ [all …]
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H A D | ls1088ardb.h | 12 #define CONFIG_SYS_MMC_ENV_DEV 0 14 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ 15 #define CONFIG_ENV_OFFSET 0x500000 18 #define CONFIG_ENV_SECT_SIZE 0x40000 21 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ 22 #define CONFIG_ENV_SECT_SIZE 0x40000 25 #define CONFIG_SYS_MMC_ENV_DEV 0 26 #define CONFIG_ENV_SIZE 0x2000 29 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x300000) 30 #define CONFIG_ENV_SECT_SIZE 0x20000 [all …]
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/openbmc/u-boot/arch/xtensa/dts/ |
H A D | xtfpga-flash-16m.dtsi | 7 reg = <0x08000000 0x01000000>; 10 partition@0x0 { 12 reg = <0x00000000 0x00400000>; 14 partition@0x400000 { 16 reg = <0x00400000 0x00600000>; 18 partition@0xa00000 { 20 reg = <0x00a00000 0x005e0000>; 22 partition@0xfe0000 { 24 reg = <0x00fe0000 0x00020000>;
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/openbmc/linux/arch/arm/boot/dts/aspeed/ |
H A D | openbmc-flash-layout-128.dtsi | 8 u-boot@0 { 9 reg = <0x0 0xe0000>; // 896KB 14 reg = <0xe0000 0x20000>; // 128KB 19 reg = <0x100000 0x900000>; // 9MB 24 reg = <0xa00000 0x5600000>; // 86MB 29 reg = <0x6000000 0x2000000>; // 32MB
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H A D | openbmc-flash-layout-64.dtsi | 11 u-boot@0 { 12 reg = <0x0 0xe0000>; // 896KB 17 reg = <0xe0000 0x20000>; // 128KB 22 reg = <0x100000 0x900000>; // 9MB 27 reg = <0xa00000 0x2000000>; // 32MB 32 reg = <0x2a00000 0x1600000>; // 22MB
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H A D | openbmc-flash-layout-64-alt.dtsi | 11 u-boot@0 { 12 reg = <0x0 0xe0000>; // 896KB 17 reg = <0xe0000 0x20000>; // 128KB 22 reg = <0x100000 0x900000>; // 9MB 27 reg = <0xa00000 0x2000000>; // 32MB 32 reg = <0x2a00000 0x1600000>; // 22MB
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/openbmc/linux/arch/arm64/boot/dts/hisilicon/ |
H A D | hip05-d02.dts | 17 memory@0 { 19 reg = <0x0 0x00000000 0x0 0x80000000>; 37 debounce-interval = <0>; 54 ranges = <0 0 0x0 0x90000000 0x08000000>, 55 <1 0 0x0 0x98000000 0x08000000>; 57 nor-flash@0,0 { 61 reg = <0 0x0 0x08000000>; 64 partition@0 { 66 reg = <0x0 0x300000>; 70 reg = <0x300000 0xa00000>; [all …]
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/openbmc/linux/arch/arm/boot/dts/moxa/ |
H A D | moxart-uc7112lx.dts | 16 reg = <0x0 0x2000000>; 22 #clock-cells = <0>; 27 flash@80000000,0 { 29 reg = <0x80000000 0x1000000>; 33 partition@0 { 35 reg = <0x0 0x40000>; 39 reg = <0x40000 0x1C0000>; 43 reg = <0x200000 0x800000>; 47 reg = <0xa00000 0x600000>; 55 gpios = <&gpio 27 0x1>; [all …]
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/openbmc/u-boot/board/lego/ev3/ |
H A D | README | 11 The EV3 contains a bootloader in EEPROM that loads u-boot.bin from address 0x0 36 | u-boot.bin | 0x0 | 0x40000 (256KiB) | 37 | da850-lego-ev3.dtb | 0x40000 | 0x10000 (64KiB) | 38 | uImage | 0x50000 | 0x400000 (4MiB) | 39 | rootfs (squashfs) | 0x450000 | 0xa00000 (10MiB) |
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/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-385-linksys-cobra.dts | 18 wan_amber@0 { 20 reg = <0x0>; 25 reg = <0x1>; 30 reg = <0x2>; 35 reg = <0x3>; 40 reg = <0x5>; 45 reg = <0x6>; 50 reg = <0x7>; 55 reg = <0x8>; 60 reg = <0x9>; [all …]
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H A D | armada-385-linksys-caiman.dts | 18 wan_amber@0 { 20 reg = <0x0>; 25 reg = <0x1>; 30 reg = <0x2>; 35 reg = <0x3>; 40 reg = <0x5>; 45 reg = <0x6>; 50 reg = <0x7>; 55 reg = <0x8>; 60 reg = <0x9>; [all …]
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H A D | armada-385-linksys-shelby.dts | 18 wan_amber@0 { 20 reg = <0x0>; 25 reg = <0x1>; 30 reg = <0x2>; 35 reg = <0x3>; 40 reg = <0x5>; 45 reg = <0x6>; 50 reg = <0x7>; 55 reg = <0x8>; 60 reg = <0x9>; [all …]
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H A D | armada-385-linksys-rango.dts | 20 wan_amber@0 { 22 reg = <0x0>; 27 reg = <0x1>; 32 reg = <0x5>; 37 reg = <0x6>; 42 reg = <0x7>; 47 reg = <0x8>; 52 reg = <0x9>; 89 partition@0 { 91 reg = <0x0000000 0x200000>; /* 2MiB */ [all …]
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/openbmc/linux/drivers/net/wireless/intel/iwlwifi/ |
H A D | iwl-io.h | 23 iwl_trans_set_bits_mask(trans, reg, mask, 0); in iwl_clear_bit() 44 iwl_write_prph_delay(trans, ofs, val, 0); in iwl_write_prph() 61 * UMAC periphery address space changed from 0xA00000 to 0xD00000 starting from
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/openbmc/linux/drivers/pci/controller/ |
H A D | pcie-rockchip.h | 30 #define PCIE_CLIENT_BASE 0x0 31 #define PCIE_CLIENT_CONFIG (PCIE_CLIENT_BASE + 0x00) 32 #define PCIE_CLIENT_CONF_ENABLE HIWORD_UPDATE_BIT(0x0001) 33 #define PCIE_CLIENT_CONF_DISABLE HIWORD_UPDATE(0x0001, 0) 34 #define PCIE_CLIENT_LINK_TRAIN_ENABLE HIWORD_UPDATE_BIT(0x0002) 35 #define PCIE_CLIENT_ARI_ENABLE HIWORD_UPDATE_BIT(0x0008) 36 #define PCIE_CLIENT_CONF_LANE_NUM(x) HIWORD_UPDATE(0x0030, ENCODE_LANES(x)) 37 #define PCIE_CLIENT_MODE_RC HIWORD_UPDATE_BIT(0x0040) 38 #define PCIE_CLIENT_MODE_EP HIWORD_UPDATE(0x0040, 0) 39 #define PCIE_CLIENT_GEN_SEL_1 HIWORD_UPDATE(0x0080, 0) [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mtd/ |
H A D | ingenic,nand.yaml | 66 reg = <0x13410000 0x10000>; 69 ranges = <1 0 0x1b000000 0x1000000>, 70 <2 0 0x1a000000 0x1000000>, 71 <3 0 0x19000000 0x1000000>, 72 <4 0 0x18000000 0x1000000>, 73 <5 0 0x17000000 0x1000000>, 74 <6 0 0x16000000 0x1000000>; 80 reg = <1 0 0x1000000>; 83 #size-cells = <0>; 94 pinctrl-0 = <&pins_nemc>; [all …]
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/openbmc/linux/arch/m68k/include/asm/ |
H A D | amigayle.h | 25 #define GAYLE_RAM (0x600000+zTwoBase) 26 #define GAYLE_RAMSIZE (0x400000) 27 #define GAYLE_ATTRIBUTE (0xa00000+zTwoBase) 28 #define GAYLE_ATTRIBUTESIZE (0x020000) 29 #define GAYLE_IO (0xa20000+zTwoBase) /* 16bit and even 8bit registers */ 30 #define GAYLE_IOSIZE (0x010000) 31 #define GAYLE_IO_8BITODD (0xa30000+zTwoBase) /* odd 8bit registers */ 40 u_char pad0[0x1000-1]; 43 u_char pad1[0x1000-1]; 46 u_char pad2[0x1000-1]; [all …]
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/openbmc/linux/sound/soc/sof/mediatek/mt8186/ |
H A D | mt8186.h | 23 #define ADSP_CFGREG_SW_RSTN 0x0000 24 #define SW_DBG_RSTN_C0 BIT(0) 26 #define ADSP_HIFI_IO_CONFIG 0x000C 29 #define ADSP_IRQ_MASK 0x0030 30 #define ADSP_DVFSRC_REQ 0x0040 31 #define ADSP_DDREN_REQ_0 0x0044 32 #define ADSP_SEMAPHORE 0x0064 33 #define ADSP_WDT_CON_C0 0x007C 34 #define ADSP_MBOX_IRQ_EN 0x009C 35 #define DSP_MBOX0_IRQ_EN BIT(0) [all …]
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/openbmc/linux/tools/testing/selftests/powerpc/pmu/ebb/ |
H A D | instruction_count_test.c | 58 if (difference < 0) in do_count_loop() 66 return 0; in do_count_loop() 75 do_count_loop(event, 0, 0, false); in determine_overhead() 78 for (i = 0; i < 100; i++) { in determine_overhead() 79 do_count_loop(event, 0, 0, false); in determine_overhead() 116 event_init_named(&event, 0x400FA, "PM_RUN_INST_CMPL"); in instruction_count() 135 FAIL_IF(do_count_loop(&event, 0x100000, overhead, true)); in instruction_count() 138 FAIL_IF(do_count_loop(&event, 0xa00000, overhead, true)); in instruction_count() 141 FAIL_IF(do_count_loop(&event, 0x6400000, overhead, true)); in instruction_count() 144 FAIL_IF(do_count_loop(&event, 0x40000000, overhead, true)); in instruction_count() [all …]
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/openbmc/linux/drivers/net/ethernet/ti/icssg/ |
H A D | icssg_config.c | 21 #define MII_RT_TX_IPG_100M 0x17 22 #define MII_RT_TX_IPG_1G 0xb 25 #define ICSSG_QUEUE_OFFSET 0xd00 26 #define ICSSG_QUEUE_PEEK_OFFSET 0xe00 27 #define ICSSG_QUEUE_CNT_OFFSET 0xe40 28 #define ICSSG_QUEUE_RESET_OFFSET 0xf40 64 #define FDB_GEN_CFG1 0x60 68 #define FDB_GEN_CFG2 0x64 72 #define FDB_PRU0_EN BIT(0) 93 { PORT_HI_Q_SLICE0, PORT_DESC0_HI, 0x200000, 0 }, [all …]
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