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/openbmc/linux/Documentation/devicetree/bindings/dsp/
H A Dfsl,dsp.yaml155 reg = <0x596e8000 0x88000>;
165 mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
171 reg = <0x92400000 0x1000000>;
175 reg = <0x942f0000 0x8000>;
179 reg = <0x942f8000 0x8000>;
184 reg = <0x94300000 0x100000>;
190 reg = <0x3b6e8000 0x88000>;
199 mboxes = <&mu2 0 0>,
200 <&mu2 1 0>,
201 <&mu2 3 0>;
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dqoriq-fman3-0-1g-0.dtsi3 * QorIQ FMan v3 1g port #0 device tree
11 cell-index = <0x8>;
13 reg = <0x88000 0x1000>;
17 cell-index = <0x28>;
19 reg = <0xa8000 0x1000>;
23 cell-index = <0>;
25 reg = <0xe0000 0x1000>;
33 #size-cells = <0>;
35 reg = <0xe1000 0x1000>;
37 pcsphy0: ethernet-phy@0 {
[all …]
H A Dimx8-ss-audio.dtsi14 ranges = <0x59000000 0x0 0x59000000 0x1000000>;
18 #clock-cells = <0>;
25 reg = <0x59580000 0x10000>;
40 reg = <0x59590000 0x10000>;
50 reg = <0x596e8000 0x88000>;
61 mboxes = <&lsio_mu13 2 0>,
63 <&lsio_mu13 3 0>,
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-fman3-0-10g-2.dtsi3 * QorIQ FMan v3 10g port #2 device tree stub [ controller @ offset 0x400000 ]
11 cell-index = <0x8>;
13 reg = <0x88000 0x1000>;
18 cell-index = <0x28>;
20 reg = <0xa8000 0x1000>;
25 cell-index = <0>;
27 reg = <0xe0000 0x1000>;
36 #size-cells = <0>;
38 reg = <0xe1000 0x1000>;
41 pcsphy0: ethernet-phy@0 {
[all …]
H A Dqoriq-fman-0-1g-0.dtsi2 * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0x8>;
39 reg = <0x88000 0x1000>;
43 cell-index = <0x28>;
45 reg = <0xa8000 0x1000>;
49 cell-index = <0>;
51 reg = <0xe0000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe1120 0xee0>;
62 interrupts = <100 2 0 0>;
[all …]
H A Dqoriq-fman3-1-1g-0.dtsi2 * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x500000 ]
37 cell-index = <0x8>;
39 reg = <0x88000 0x1000>;
43 cell-index = <0x28>;
45 reg = <0xa8000 0x1000>;
49 cell-index = <0>;
51 reg = <0xe0000 0x1000>;
60 #size-cells = <0>;
62 reg = <0xe1000 0x1000>;
65 pcsphy8: ethernet-phy@0 {
[all …]
H A Dqoriq-fman3-0-1g-0.dtsi2 * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0x8>;
39 reg = <0x88000 0x1000>;
43 cell-index = <0x28>;
45 reg = <0xa8000 0x1000>;
49 cell-index = <0>;
51 reg = <0xe0000 0x1000>;
60 #size-cells = <0>;
62 reg = <0xe1000 0x1000>;
65 pcsphy0: ethernet-phy@0 {
[all …]
H A Dqoriq-fman-1-1g-0.dtsi2 * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x500000 ]
37 cell-index = <0x8>;
39 reg = <0x88000 0x1000>;
43 cell-index = <0x28>;
45 reg = <0xa8000 0x1000>;
49 cell-index = <0>;
51 reg = <0xe0000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe1120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman3-0-10g-0-best-effort.dtsi2 * QorIQ FMan v3 1g port #0 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0x8>;
39 reg = <0x88000 0x1000>;
45 cell-index = <0x28>;
47 reg = <0xa8000 0x1000>;
53 cell-index = <0>;
55 reg = <0xe0000 0x1000>;
64 #size-cells = <0>;
66 reg = <0xe1000 0x1000>;
69 pcsphy0: ethernet-phy@0 {
[all …]
H A Dp1023si-post.dtsi37 alloc-ranges = <0 0 0x10 0>;
42 alloc-ranges = <0 0 0x10 0>;
47 alloc-ranges = <0 0 0x10 0>;
54 interrupts = <19 2 0 0>,
55 <16 2 0 0>;
58 /* controller at 0xa000 */
64 bus-range = <0x0 0xff>;
66 interrupts = <16 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dmvebu-pci.txt23 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s
32 registers area. This range entry translates the '0x82000000 0 r' PCI
33 address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part
34 of the internal register window (as identified by MBUS_ID(0xf0,
35 0x01)).
39 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0
79 value is 0.
99 bus-range = <0x00 0xff>;
103 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
104 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Darmada-xp-mv78260.dtsi64 #size-cells = <0>;
67 cpu@0 {
70 reg = <0>;
71 clocks = <&cpuclk 0>;
86 * MV78260 has 3 PCIe units Gen2.0: Two units can be
99 bus-range = <0x00 0xff>;
102 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
103 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
104 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
105 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
[all …]
H A Darmada-xp-mv78460.dtsi65 #size-cells = <0>;
68 cpu@0 {
71 reg = <0>;
72 clocks = <&cpuclk 0>;
103 * MV78460 has 4 PCIe units Gen2.0: Two units can be
116 bus-range = <0x00 0xff>;
119 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
120 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
121 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
122 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-mv78260.dtsi27 #size-cells = <0>;
30 cpu@0 {
33 reg = <0>;
34 clocks = <&cpuclk 0>;
49 * MV78260 has 3 PCIe units Gen2.0: Two units can be
62 bus-range = <0x00 0xff>;
65 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
66 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
67 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
68 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
[all …]
H A Darmada-xp-mv78460.dtsi28 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
35 clocks = <&cpuclk 0>;
66 * MV78460 has 4 PCIe units Gen2.0: Two units can be
79 bus-range = <0x00 0xff>;
82 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
83 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
84 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000 /* Port 0.1 registers */
85 0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000 /* Port 0.2 registers */
[all …]
/openbmc/linux/arch/arm/mach-mv78xx0/
H A Dmv78xx0.h17 * f0800000 PCIe #0 I/O space
29 * fee00000 f0800000 64K PCIe #0 I/O space
39 #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
40 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
41 #define MV78XX0_CORE_REGS_VIRT_BASE IOMEM(0xfe400000)
42 #define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
45 #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
48 #define MV78XX0_REGS_PHYS_BASE 0xf1000000
49 #define MV78XX0_REGS_VIRT_BASE IOMEM(0xfec00000)
52 #define MV78XX0_SRAM_PHYS_BASE (0xf2200000)
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D04625 seq=`basename $0`
34 trap "_cleanup; exit \$status" 0 1 2 3 15
60 local pattern=0
61 local cur_sec=0
63 for ((i=0;i<=$((sectors - 1));i++)); do
71 backing_io 0 32 write | $QEMU_IO "$TEST_IMG" | _filter_qemu_io
84 aio_write -P 10 0x18000 0x2000
87 aio_write -P 11 0x12000 0x2000
88 aio_write -P 12 0x1c000 0x2000
98 aio_write -P 20 0x28000 0x2000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Darm,mhuv2.yaml74 version MHUv2.0, but the later versions do have it.
96 The first field of a tuple signifies the transfer protocol, 0 is reserved
114 arm,mhuv2-protocols = <0 2>, <1 1>, <1 5>, <1 7>;
126 - enum: [ 0, 1 ]
127 - minimum: 0
136 relevant in doorbell protocol, should be 0 otherwise) represents the
142 mboxes = <&mhu 0 5>; // Channel Window Group 0, doorbell 5.
144 mboxes = <&mhu 2 0>; // Channel Window Group 2, data transfer protocol with 1 window.
145 mboxes = <&mhu 3 0>; // Channel Window Group 3, data transfer protocol with 5 windows.
146 mboxes = <&mhu 4 0>; // Channel Window Group 4, data transfer protocol with 7 windows.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dfsl-fman.txt28 FMan block. The offset is 0xc4 from the beginning of the
29 Frame Processing Manager memory map (0xc3000 from the
44 DEVDISR[1] 1 0
49 DCFG_DEVDISR2[6] 1 0
56 DCFG_CCSR_DEVDISR2[24] 1 0
148 muram@0 {
150 ranges = <0 0x000000 0x28000>;
215 cell-index = <0x28>;
217 reg = <0xa8000 0x1000>;
221 cell-index = <0x8>;
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dksi8560.dts33 #size-cells = <0>;
35 PowerPC,8560@0 {
37 reg = <0>;
40 d-cache-size = <0x8000>; /* L1, 32K */
41 i-cache-size = <0x8000>; /* L1, 32K */
42 timebase-frequency = <0>; /* From U-boot */
43 bus-frequency = <0>; /* From U-boot */
44 clock-frequency = <0>; /* From U-boot */
51 reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
58 ranges = <0x00000000 0xfdf00000 0x00100000>;
[all …]
H A Dtqm8560.dts30 #size-cells = <0>;
32 PowerPC,8560@0 {
34 reg = <0>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
48 reg = <0x00000000 0x10000000>;
55 ranges = <0x0 0xe0000000 0x100000>;
56 bus-frequency = <0>;
59 ecm-law@0 {
[all …]
/openbmc/qemu/hw/vfio/
H A Dpci-quirks.c47 { 0x14e4, 0x168e }, /* Broadcom BCM 57810 */
54 for (i = 0 ; i < ARRAY_SIZE(rom_denylist); i++) { in vfio_opt_rom_in_denylist()
127 for (i = 0; i < window->nr_matches; i++) { in vfio_generic_window_quirk_address_write()
243 #define PCI_VENDOR_ID_ATI 0x1002
247 * through VGA register 0x3c3. On newer cards, the I/O port BAR is always
249 * those). Note that on bare metal, a read of 0x3c3 doesn't always return the
306 error_report("Failed to remove vfio ioeventfd for %s+0x%" in vfio_ioeventfd_exit()
307 HWADDR_PRIx"[%d]:0x%"PRIx64" (%m)", in vfio_ioeventfd_exit()
361 if (event_notifier_init(&ioeventfd->e, 0)) { in vfio_ioeventfd_init()
427 3 /* offset 3 bytes from 0x3c0 */, quirk->mem); in vfio_vga_probe_ati_3c3_quirk()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dimx-regs.h11 #define ROMCP_ARB_BASE_ADDR 0x00000000
12 #define ROMCP_ARB_END_ADDR 0x000FFFFF
15 #define GPU_2D_ARB_BASE_ADDR 0x02200000
16 #define GPU_2D_ARB_END_ADDR 0x02203FFF
17 #define OPENVG_ARB_BASE_ADDR 0x02204000
18 #define OPENVG_ARB_END_ADDR 0x02207FFF
20 #define CAAM_ARB_BASE_ADDR 0x00100000
21 #define CAAM_ARB_END_ADDR 0x00107FFF
22 #define GPU_ARB_BASE_ADDR 0x01800000
23 #define GPU_ARB_END_ADDR 0x01803FFF
[all …]
/openbmc/linux/drivers/soc/tegra/cbb/
H A Dtegra234-cbb.c8 * Error types supported by CBB2.0 are:
27 #define FABRIC_EN_CFG_INTERRUPT_ENABLE_0_0 0x0
28 #define FABRIC_EN_CFG_STATUS_0_0 0x40
29 #define FABRIC_EN_CFG_ADDR_INDEX_0_0 0x60
30 #define FABRIC_EN_CFG_ADDR_LOW_0 0x80
31 #define FABRIC_EN_CFG_ADDR_HI_0 0x84
33 #define FABRIC_MN_MASTER_ERR_EN_0 0x200
34 #define FABRIC_MN_MASTER_ERR_FORCE_0 0x204
35 #define FABRIC_MN_MASTER_ERR_STATUS_0 0x208
36 #define FABRIC_MN_MASTER_ERR_OVERFLOW_STATUS_0 0x20c
[all …]
/openbmc/u-boot/env/
H A DKconfig53 a pca9547 i2c mux with address 0x70, channel 3.
171 set, defaults to partition 0, the user area. Common values might be
413 default "0:1" if TI_COMMON_CMD_OPTIONS
414 default "0:auto" if ARCH_ZYNQMP
415 default "0:auto" if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA = -1
417 default "0" if ARCH_AT91
422 "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
425 - "D:0": device D.
454 "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
457 - "D:0": device D.
[all …]

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