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/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/asic_reg/
H A Dgaudi2_blocks_linux_driver.h16 #define mmDCORE0_TPC0_ROM_TABLE_BASE 0x0ull
17 #define DCORE0_TPC0_ROM_TABLE_MAX_OFFSET 0x1000
18 #define DCORE0_TPC0_ROM_TABLE_SECTION 0x1000
19 #define mmDCORE0_TPC0_EML_SPMU_BASE 0x1000ull
20 #define DCORE0_TPC0_EML_SPMU_MAX_OFFSET 0x1000
21 #define DCORE0_TPC0_EML_SPMU_SECTION 0x1000
22 #define mmDCORE0_TPC0_EML_ETF_BASE 0x2000ull
23 #define DCORE0_TPC0_EML_ETF_MAX_OFFSET 0x1000
24 #define DCORE0_TPC0_EML_ETF_SECTION 0x1000
25 #define mmDCORE0_TPC0_EML_STM_BASE 0x3000ull
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dfaraday,ftpci100.yaml18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
19 Technology) and product ID 0x4321.
34 interrupt-map-mask = <0xf800 0 0 7>;
36 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
37 <0x4800 0 0 2 &pci_intc 1>,
38 <0x4800 0 0 3 &pci_intc 2>,
39 <0x4800 0 0 4 &pci_intc 3>,
40 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
41 <0x5000 0 0 2 &pci_intc 2>,
42 <0x5000 0 0 3 &pci_intc 3>,
[all …]
H A Dv3-v360epc-pci.txt18 each be exactly 256MB (0x10000000) in size.
38 reg = <0x62000000 0x10000>, <0x61000000 0x01000000>;
42 bus-range = <0x00 0xff>;
43 ranges = 0x01000000 0 0x00000000 /* I/O space @00000000 */
44 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */
45 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */
46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */
47 0x42000000 0 0x50000000 /* prefetchable memory @50000000 */
48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */
49 dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */
[all …]
/openbmc/linux/drivers/media/i2c/
H A Dsony-btf-mpx.c21 MODULE_PARM_DESC(debug, "debug level 0=off(default) 1=on");
29 * IF/MPX address: 0x42/0x40 0x43/0x44
52 buffer[0] = dev; in mpx_write()
54 buffer[2] = addr & 0xff; in mpx_write()
56 buffer[4] = val & 0xff; in mpx_write()
58 msg.flags = 0; in mpx_write()
62 return 0; in mpx_write()
97 * For Asia, replace the 0x26XX in FM_PRESCALE with 0x14XX.
102 * 0x01 MAIN SUB
103 * 0x03 MAIN MAIN
[all …]
/openbmc/linux/Documentation/devicetree/bindings/security/tpm/
H A Dtpm_tis_mmio.txt15 - reg: The location of the MMIO registers, should be at least 0x5000 bytes
22 reg = <0x90000 0x5000>;
/openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dpamu.txt12 "fsl,pamu-v1.0". The second is "fsl,pamu".
18 PAMU v1.0, on an SOC that has five PAMU devices, the size
19 is 0x5000.
56 For PAMU v1.0, this size is 0x1000.
95 compatible = "fsl,pamu-v1.0", "fsl,pamu";
96 reg = <0x20000 0x5000>;
97 ranges = <0 0x20000 0x5000>;
98 fsl,portid-mapping = <0xf80000>;
102 24 2 0 0
105 pamu0: pamu@0 {
[all …]
/openbmc/linux/drivers/of/unittest-data/
H A Dtests-interrupts.dtsi26 #address-cells = <0>;
50 interrupt-map = <0x5000 1 2 &test_intc0 15>;
64 reg = <0x5000 0x100>;
/openbmc/openbmc/meta-evb/meta-evb-arm/meta-evb-fvp-base/wic/
H A Demmc-fvp.wks.in13 # 0x5000
17 # First partition (u-boot-env) is 4K-aligned, which puts it at offset 0x5000
/openbmc/openbmc/meta-nuvoton/wic/
H A Demmc-nuvoton.wks.in13 # 0x5000
17 # First partition (u-boot-env) is 4K-aligned, which puts it at offset 0x5000
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dintegratorap.dts17 #size-cells = <0>;
19 cpu@0 {
28 reg = <0>;
37 operating-points = <71000 0
38 66000 0
39 60000 0
40 48000 0
41 36000 0
42 24000 0
43 12000 0>;
[all …]
/openbmc/openbmc/meta-aspeed/wic/
H A Demmc-aspeed.wks.in13 # 0x5000
17 # First partition (u-boot-env) is 4K-aligned, which puts it at offset 0x5000
/openbmc/linux/include/linux/mdio/
H A Dmdio-xgene.h15 #define BLOCK_XG_MDIO_CSR_OFFSET 0x5000
16 #define BLOCK_DIAG_CSR_OFFSET 0xd000
17 #define XGENET_CONFIG_REG_ADDR 0x20
19 #define MAC_ADDR_REG_OFFSET 0x00
20 #define MAC_COMMAND_REG_OFFSET 0x04
21 #define MAC_WRITE_REG_OFFSET 0x08
22 #define MAC_READ_REG_OFFSET 0x0c
23 #define MAC_COMMAND_DONE_REG_OFFSET 0x10
25 #define CLKEN_OFFSET 0x08
26 #define SRST_OFFSET 0x00
[all …]
/openbmc/linux/drivers/net/ethernet/dec/tulip/
H A D21142.c21 static u16 t21142_csr13[] = { 0x0001, 0x0009, 0x0009, 0x0000, 0x0001, };
22 u16 t21142_csr14[] = { 0xFFFF, 0x0705, 0x0705, 0x0000, 0x7F3D, };
23 static u16 t21142_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
36 int new_csr6 = 0; in t21142_media_task()
40 if ((csr14 & 0x80) && (csr12 & 0x7000) != 0x5000) in t21142_media_task()
46 if (tulip_check_duplex(dev) < 0) { in t21142_media_task()
70 } else if ((csr12 & 0x7000) != 0x5000) { in t21142_media_task()
77 new_csr6 = 0x82420000; in t21142_media_task()
78 dev->if_port = 0; in t21142_media_task()
79 iowrite32(0, ioaddr + CSR13); in t21142_media_task()
[all …]
/openbmc/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_sleep.S14 ori r7, r7, 0x8000 /* EE */
18 li r10, 0 /* flag that irq handler sets */
21 lwz r8, 0x14(r6) /* intr->main_mask */
22 ori r8, r8, 0x1
23 xori r8, r8, 0x1
24 stw r8, 0x14(r6)
28 li r8, 0x1
29 stw r8, 0x40(r6) /* intr->main_emulate */
39 ori r10, r10, 0x2000
55 ori r10, r10, 0x2000
[all …]
/openbmc/linux/arch/arm/boot/dts/gemini/
H A Dgemini.dtsi23 pinctrl-0 = <&pflash_default_pins>;
31 reg = <0x40000000 0x1000>;
39 offset = <0x0c>;
41 mask = <0xC0000000>;
49 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
159 reg = <0x41000000 0x1000>;
168 reg = <0x42000000 0x100>;
173 pinctrl-0 = <&uart_default_pins>;
179 reg = <0x43000000 0x1000>;
193 reg = <0x45000000 0x100>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Darm,cci-400.yaml24 pattern: "^cci(@[0-9a-f]+)?$"
43 "^slave-if@[0-9a-f]+$":
65 "^pmu@[0-9a-f]+$":
119 arm,hbi = <0x249>;
129 * registers sits at address 0x000000002c090000.
131 * CCI slave interface @0x000000002c091000 is connected to dma
134 * CCI slave interface @0x000000002c094000 is connected to CPUs
137 * CCI slave interface @0x000000002c095000 is connected to CPUs
142 #size-cells = <0>;
145 CPU0: cpu@0 {
[all …]
/openbmc/linux/drivers/net/dsa/mv88e6xxx/
H A Dglobal1.h16 /* Offset 0x00: Switch Global Status Register */
17 #define MV88E6XXX_G1_STS 0x00
18 #define MV88E6352_G1_STS_PPU_STATE 0x8000
19 #define MV88E6185_G1_STS_PPU_STATE_MASK 0xc000
20 #define MV88E6185_G1_STS_PPU_STATE_DISABLED_RST 0x0000
21 #define MV88E6185_G1_STS_PPU_STATE_INITIALIZING 0x4000
22 #define MV88E6185_G1_STS_PPU_STATE_DISABLED 0x8000
23 #define MV88E6185_G1_STS_PPU_STATE_POLLING 0xc000
24 #define MV88E6XXX_G1_STS_INIT_READY 0x0800
34 #define MV88E6XXX_G1_STS_IRQ_EEPROM_DONE 0
[all …]
/openbmc/qemu/include/hw/pci/
H A Dpci_ids.h16 #define PCI_CLASS_NOT_DEFINED 0x0000
17 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001
19 #define PCI_BASE_CLASS_STORAGE 0x01
20 #define PCI_CLASS_STORAGE_SCSI 0x0100
21 #define PCI_CLASS_STORAGE_IDE 0x0101
22 #define PCI_CLASS_STORAGE_FLOPPY 0x0102
23 #define PCI_CLASS_STORAGE_IPI 0x0103
24 #define PCI_CLASS_STORAGE_RAID 0x0104
25 #define PCI_CLASS_STORAGE_ATA 0x0105
26 #define PCI_CLASS_STORAGE_SATA 0x0106
[all …]
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dmarvell.txt11 - phy-names : Should be "0", "1", etc, one number per phandle
17 reg = <0x80000 0x5000>;
20 phy-names = "0", "1";
/openbmc/linux/drivers/net/ethernet/netronome/nfp/nfpcore/
H A Dnfp_dev.h9 #define PCI_VENDOR_ID_CORIGINE 0x1da8
10 #define PCI_DEVICE_ID_NFP3800 0x3800
11 #define PCI_DEVICE_ID_NFP4000 0x4000
12 #define PCI_DEVICE_ID_NFP5000 0x5000
13 #define PCI_DEVICE_ID_NFP6000 0x6000
14 #define PCI_DEVICE_ID_NFP3800_VF 0x3803
15 #define PCI_DEVICE_ID_NFP6000_VF 0x6003
/openbmc/linux/include/linux/qed/
H A Diwarp_common.h16 #define IWARP_ACTIVE_MODE 0
19 #define IWARP_SHARED_QUEUE_PAGE_SIZE (0x8000)
20 #define IWARP_SHARED_QUEUE_PAGE_RQ_PBL_OFFSET (0x4000)
21 #define IWARP_SHARED_QUEUE_PAGE_RQ_PBL_MAX_SIZE (0x1000)
22 #define IWARP_SHARED_QUEUE_PAGE_SQ_PBL_OFFSET (0x5000)
23 #define IWARP_SHARED_QUEUE_PAGE_SQ_PBL_MAX_SIZE (0x3000)
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmediatek,mt7621-memc.yaml31 reg = <0x5000 0x1000>;
/openbmc/qemu/tests/qemu-iotests/
H A D07725 seq=`basename $0`
34 trap "_cleanup; exit \$status" 0 1 2 3 15
57 aio_write -P 10 0x200 0x200
62 off=0x1000
66 aio_write -P 10 $((off + 0x200)) 0x200
68 aio_write -P 11 $((off + 0x400)) 0x200
73 off=$((off + 0x1000))
79 aio_write -P 10 0x5000 0x200
81 aio_write -P 11 0x5200 0x200
82 aio_write -P 12 0x5400 0x200
[all …]
/openbmc/qemu/hw/cpu/
H A Da15mpcore.c43 memory_region_init(&s->container, obj, "a15mp-priv-container", 0x8000); in a15mp_priv_initfn()
69 cpuobj = OBJECT(qemu_get_cpu(0)); in a15mp_priv_realize()
93 for (i = 0; i < s->num_cpu; i++) { in a15mp_priv_realize()
106 for (irq = 0; irq < ARRAY_SIZE(timer_irq); irq++) { in a15mp_priv_realize()
119 * 0x0000-0x0fff -- reserved in a15mp_priv_realize()
120 * 0x1000-0x1fff -- GIC Distributor in a15mp_priv_realize()
121 * 0x2000-0x3fff -- GIC CPU interface in a15mp_priv_realize()
122 * 0x4000-0x4fff -- GIC virtual interface control for this CPU in a15mp_priv_realize()
123 * 0x5000-0x51ff -- GIC virtual interface control for CPU 0 in a15mp_priv_realize()
124 * 0x5200-0x53ff -- GIC virtual interface control for CPU 1 in a15mp_priv_realize()
[all …]
/openbmc/linux/include/uapi/linux/
H A Dbpqether.h11 #define SIOCSBPQETHOPT (SIOCDEVPRIVATE+0) /* reserved */
25 #define SIOCGBPQETHPARAM 0x5000 /* get Level 1 parameters */
26 #define SIOCSBPQETHPARAM 0x5001 /* set */

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