Searched +full:0 +full:x400a8000 (Results 1 – 5 of 5) sorted by relevance
9 - #size-cells: always 019 reg = <0x400a0000 0x100>;21 interrupts = <51 0>;23 #size-cells = <0>;28 reg = <0x400a8000 0x100>;30 interrupts = <50 0>;32 #size-cells = <0>;
62 reg = <0x400a0000 0x8000>, <0x400a8000 0x8000>;
12 #define SLC_NAND_BASE 0x20020000 /* SLC NAND Flash registers base */13 #define SSP0_BASE 0x20084000 /* SSP0 registers base */14 #define SD_CARD_BASE 0x20098000 /* SD card interface registers base */15 #define MLC_NAND_BASE 0x200A8000 /* MLC NAND Flash registers base */16 #define DMA_BASE 0x31000000 /* DMA controller registers base */17 #define USB_BASE 0x31020000 /* USB registers base */18 #define LCD_BASE 0x31040000 /* LCD registers base */19 #define ETHERNET_BASE 0x31060000 /* Ethernet registers base */20 #define EMC_BASE 0x31080000 /* EMC configuration registers base */23 #define CLK_PM_BASE 0x40004000 /* System control registers base */[all …]
20 #size-cells = <0>;22 cpu@0 {25 reg = <0x0>;32 #clock-cells = <0>;39 #clock-cells = <0>;49 ranges = <0x00000000 0x00000000 0x10000000>,50 <0x20000000 0x20000000 0x30000000>,51 <0xe0000000 0xe0000000 0x04000000>;55 reg = <0x08000000 0x20000>;59 ranges = <0x00000000 0x08000000 0x20000>;[all …]
17 * AHB 0 physical base addresses19 #define LPC32XX_SLC_BASE 0x2002000020 #define LPC32XX_SSP0_BASE 0x2008400021 #define LPC32XX_SPI1_BASE 0x2008800022 #define LPC32XX_SSP1_BASE 0x2008C00023 #define LPC32XX_SPI2_BASE 0x2009000024 #define LPC32XX_I2S0_BASE 0x2009400025 #define LPC32XX_SD_BASE 0x2009800026 #define LPC32XX_I2S1_BASE 0x2009C00027 #define LPC32XX_MLC_BASE 0x200A8000[all …]