1*16c4c524SWolfram Sang* NXP PNX I2C Controller 2*16c4c524SWolfram Sang 3*16c4c524SWolfram SangRequired properties: 4*16c4c524SWolfram Sang 5*16c4c524SWolfram Sang - reg: Offset and length of the register set for the device 6*16c4c524SWolfram Sang - compatible: should be "nxp,pnx-i2c" 7*16c4c524SWolfram Sang - interrupts: configure one interrupt line 8*16c4c524SWolfram Sang - #address-cells: always 1 (for i2c addresses) 9*16c4c524SWolfram Sang - #size-cells: always 0 10*16c4c524SWolfram Sang 11*16c4c524SWolfram SangOptional properties: 12*16c4c524SWolfram Sang 13*16c4c524SWolfram Sang - clock-frequency: desired I2C bus clock frequency in Hz, Default: 100000 Hz 14*16c4c524SWolfram Sang 15*16c4c524SWolfram SangExamples: 16*16c4c524SWolfram Sang 17*16c4c524SWolfram Sang i2c1: i2c@400a0000 { 18*16c4c524SWolfram Sang compatible = "nxp,pnx-i2c"; 19*16c4c524SWolfram Sang reg = <0x400a0000 0x100>; 20*16c4c524SWolfram Sang interrupt-parent = <&mic>; 21*16c4c524SWolfram Sang interrupts = <51 0>; 22*16c4c524SWolfram Sang #address-cells = <1>; 23*16c4c524SWolfram Sang #size-cells = <0>; 24*16c4c524SWolfram Sang }; 25*16c4c524SWolfram Sang 26*16c4c524SWolfram Sang i2c2: i2c@400a8000 { 27*16c4c524SWolfram Sang compatible = "nxp,pnx-i2c"; 28*16c4c524SWolfram Sang reg = <0x400a8000 0x100>; 29*16c4c524SWolfram Sang interrupt-parent = <&mic>; 30*16c4c524SWolfram Sang interrupts = <50 0>; 31*16c4c524SWolfram Sang #address-cells = <1>; 32*16c4c524SWolfram Sang #size-cells = <0>; 33*16c4c524SWolfram Sang clock-frequency = <100000>; 34*16c4c524SWolfram Sang }; 35