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/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-pnx.txt9 - #size-cells: always 0
19 reg = <0x400a0000 0x100>;
21 interrupts = <51 0>;
23 #size-cells = <0>;
28 reg = <0x400a8000 0x100>;
30 interrupts = <50 0>;
32 #size-cells = <0>;
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dsprd-mailbox.yaml62 reg = <0x400a0000 0x8000>, <0x400a8000 0x8000>;
/openbmc/u-boot/arch/arm/include/asm/arch-lpc32xx/
H A Dcpu.h12 #define SLC_NAND_BASE 0x20020000 /* SLC NAND Flash registers base */
13 #define SSP0_BASE 0x20084000 /* SSP0 registers base */
14 #define SD_CARD_BASE 0x20098000 /* SD card interface registers base */
15 #define MLC_NAND_BASE 0x200A8000 /* MLC NAND Flash registers base */
16 #define DMA_BASE 0x31000000 /* DMA controller registers base */
17 #define USB_BASE 0x31020000 /* USB registers base */
18 #define LCD_BASE 0x31040000 /* LCD registers base */
19 #define ETHERNET_BASE 0x31060000 /* Ethernet registers base */
20 #define EMC_BASE 0x31080000 /* EMC configuration registers base */
23 #define CLK_PM_BASE 0x40004000 /* System control registers base */
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dklondike.dts16 dcr-parent = <&{/cpus/cpu@0}>;
25 #size-cells = <0>;
27 cpu@0 {
30 reg = <0x00000000>;
44 reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */
50 cell-index = <0>;
51 dcr-reg = <0x0c0 0x010>;
52 #address-cells = <0>;
53 #size-cells = <0>;
61 dcr-reg = <0x0d0 0x010>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc32xx.dtsi20 #size-cells = <0>;
22 cpu@0 {
25 reg = <0x0>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
49 ranges = <0x00000000 0x00000000 0x10000000>,
50 <0x20000000 0x20000000 0x30000000>,
51 <0xe0000000 0xe0000000 0x04000000>;
55 reg = <0x08000000 0x20000>;
59 ranges = <0x00000000 0x08000000 0x20000>;
[all …]
/openbmc/qemu/hw/mips/
H A Djazz.c78 address_space_read(&address_space_memory, 0x90000071, in rtc_read()
86 uint8_t buf = val & 0xff; in rtc_write()
87 address_space_write(&address_space_memory, 0x90000071, in rtc_write()
104 return 0xff; in dma_dummy_read()
144 sysbus_mmio_map(sysbus, 0, 0x80001000); in mips_jazz_init_net()
145 sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(rc4030, 4)); in mips_jazz_init_net()
149 checksum = 0; in mips_jazz_init_net()
150 for (i = 0; i < 6; i++) { in mips_jazz_init_net()
153 if (checksum > 0xff) { in mips_jazz_init_net()
154 checksum = (checksum + 1) & 0xff; in mips_jazz_init_net()
[all …]
/openbmc/linux/arch/arm/mach-lpc32xx/
H A Dlpc32xx.h17 * AHB 0 physical base addresses
19 #define LPC32XX_SLC_BASE 0x20020000
20 #define LPC32XX_SSP0_BASE 0x20084000
21 #define LPC32XX_SPI1_BASE 0x20088000
22 #define LPC32XX_SSP1_BASE 0x2008C000
23 #define LPC32XX_SPI2_BASE 0x20090000
24 #define LPC32XX_I2S0_BASE 0x20094000
25 #define LPC32XX_SD_BASE 0x20098000
26 #define LPC32XX_I2S1_BASE 0x2009C000
27 #define LPC32XX_MLC_BASE 0x200A8000
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]